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1 /* |
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2 Access Dallas 1-Wire Devices with ATMEL AVRs |
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3 Author of the initial code: Peter Dannegger (danni(at)specs.de) |
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4 modified by Martin Thomas (mthomas(at)rhrk.uni-kl.de) |
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5 9/2004 - use of delay.h, optional bus configuration at runtime |
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6 10/2009 - additional delay in ow_bit_io for recovery |
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7 5/2010 - timing modifcations, additonal config-values and comments, |
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8 use of atomic.h macros, internal pull-up support |
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9 7/2010 - added method to skip recovery time after last bit transfered |
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10 via ow_command_skip_last_recovery |
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11 */ |
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12 |
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13 |
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14 #include <avr/io.h> |
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15 #include <util/delay.h> |
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16 #include <util/atomic.h> |
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17 |
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18 #include "onewire.h" |
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19 |
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20 #ifdef OW_ONE_BUS |
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21 |
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22 #define OW_GET_IN() ( OW_IN & (1<<OW_PIN)) |
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23 #define OW_OUT_LOW() ( OW_OUT &= (~(1 << OW_PIN)) ) |
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24 #define OW_OUT_HIGH() ( OW_OUT |= (1 << OW_PIN) ) |
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25 #define OW_DIR_IN() ( OW_DDR &= (~(1 << OW_PIN )) ) |
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26 #define OW_DIR_OUT() ( OW_DDR |= (1 << OW_PIN) ) |
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27 |
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28 #else |
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29 |
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30 /* set bus-config with ow_set_bus() */ |
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31 uint8_t OW_PIN_MASK; |
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32 volatile uint8_t* OW_IN; |
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33 volatile uint8_t* OW_OUT; |
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34 volatile uint8_t* OW_DDR; |
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35 |
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36 #define OW_GET_IN() ( *OW_IN & OW_PIN_MASK ) |
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37 #define OW_OUT_LOW() ( *OW_OUT &= (uint8_t) ~OW_PIN_MASK ) |
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38 #define OW_OUT_HIGH() ( *OW_OUT |= (uint8_t) OW_PIN_MASK ) |
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39 #define OW_DIR_IN() ( *OW_DDR &= (uint8_t) ~OW_PIN_MASK ) |
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40 #define OW_DIR_OUT() ( *OW_DDR |= (uint8_t) OW_PIN_MASK ) |
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41 |
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42 void ow_set_bus(volatile uint8_t* in, |
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43 volatile uint8_t* out, |
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44 volatile uint8_t* ddr, |
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45 uint8_t pin) |
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46 { |
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47 OW_DDR=ddr; |
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48 OW_OUT=out; |
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49 OW_IN=in; |
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50 OW_PIN_MASK = (1 << pin); |
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51 ow_reset(); |
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52 } |
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53 |
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54 #endif |
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55 |
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56 uint8_t ow_input_pin_state() |
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57 { |
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58 return OW_GET_IN(); |
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59 } |
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60 |
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61 void ow_parasite_enable(void) |
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62 { |
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63 OW_OUT_HIGH(); |
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64 OW_DIR_OUT(); |
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65 } |
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66 |
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67 void ow_parasite_disable(void) |
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68 { |
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69 OW_DIR_IN(); |
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70 #if (!OW_USE_INTERNAL_PULLUP) |
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71 OW_OUT_LOW(); |
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72 #endif |
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73 } |
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74 |
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75 |
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76 uint8_t ow_reset(void) |
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77 { |
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78 uint8_t err; |
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79 |
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80 OW_OUT_LOW(); |
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81 OW_DIR_OUT(); // pull OW-Pin low for 480us |
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82 _delay_us(480); |
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83 |
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84 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { |
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85 // set Pin as input - wait for clients to pull low |
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86 OW_DIR_IN(); // input |
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87 #if OW_USE_INTERNAL_PULLUP |
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88 OW_OUT_HIGH(); |
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89 #endif |
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90 |
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91 _delay_us(64); // was 66 |
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92 err = OW_GET_IN(); // no presence detect |
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93 // if err!=0: nobody pulled to low, still high |
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94 } |
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95 |
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96 // after a delay the clients should release the line |
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97 // and input-pin gets back to high by pull-up-resistor |
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98 _delay_us(480 - 64); // was 480-66 |
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99 if( OW_GET_IN() == 0 ) { |
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100 err = 1; // short circuit, expected low but got high |
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101 } |
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102 |
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103 return err; |
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104 } |
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105 |
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106 |
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107 /* Timing issue when using runtime-bus-selection (!OW_ONE_BUS): |
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108 The master should sample at the end of the 15-slot after initiating |
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109 the read-time-slot. The variable bus-settings need more |
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110 cycles than the constant ones so the delays had to be shortened |
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111 to achive a 15uS overall delay |
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112 Setting/clearing a bit in I/O Register needs 1 cyle in OW_ONE_BUS |
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113 but around 14 cyles in configureable bus (us-Delay is 4 cyles per uS) */ |
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114 static uint8_t ow_bit_io_intern( uint8_t b, uint8_t with_parasite_enable ) |
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115 { |
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116 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { |
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117 #if OW_USE_INTERNAL_PULLUP |
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118 OW_OUT_LOW(); |
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119 #endif |
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120 OW_DIR_OUT(); // drive bus low |
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121 _delay_us(2); // T_INT > 1usec accoding to timing-diagramm |
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122 if ( b ) { |
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123 OW_DIR_IN(); // to write "1" release bus, resistor pulls high |
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124 #if OW_USE_INTERNAL_PULLUP |
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125 OW_OUT_HIGH(); |
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126 #endif |
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127 } |
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128 |
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129 // "Output data from the DS18B20 is valid for 15usec after the falling |
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130 // edge that initiated the read time slot. Therefore, the master must |
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131 // release the bus and then sample the bus state within 15ussec from |
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132 // the start of the slot." |
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133 _delay_us(15-2-OW_CONF_DELAYOFFSET); |
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134 |
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135 if( OW_GET_IN() == 0 ) { |
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136 b = 0; // sample at end of read-timeslot |
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137 } |
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138 |
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139 _delay_us(60-15-2+OW_CONF_DELAYOFFSET); |
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140 #if OW_USE_INTERNAL_PULLUP |
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141 OW_OUT_HIGH(); |
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142 #endif |
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143 OW_DIR_IN(); |
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144 |
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145 if ( with_parasite_enable ) { |
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146 ow_parasite_enable(); |
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147 } |
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148 |
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149 } /* ATOMIC_BLOCK */ |
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150 |
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151 _delay_us(OW_RECOVERY_TIME); // may be increased for longer wires |
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152 |
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153 return b; |
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154 } |
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155 |
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156 uint8_t ow_bit_io( uint8_t b ) |
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157 { |
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158 return ow_bit_io_intern( b & 1, 0 ); |
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159 } |
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160 |
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161 uint8_t ow_byte_wr( uint8_t b ) |
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162 { |
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163 uint8_t i = 8, j; |
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164 |
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165 do { |
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166 j = ow_bit_io( b & 1 ); |
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167 b >>= 1; |
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168 if( j ) { |
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169 b |= 0x80; |
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170 } |
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171 } while( --i ); |
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172 |
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173 return b; |
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174 } |
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175 |
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176 uint8_t ow_byte_wr_with_parasite_enable( uint8_t b ) |
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177 { |
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178 uint8_t i = 8, j; |
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179 |
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180 do { |
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181 if ( i != 1 ) { |
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182 j = ow_bit_io_intern( b & 1, 0 ); |
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183 } else { |
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184 j = ow_bit_io_intern( b & 1, 1 ); |
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185 } |
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186 b >>= 1; |
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187 if( j ) { |
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188 b |= 0x80; |
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189 } |
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190 } while( --i ); |
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191 |
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192 return b; |
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193 } |
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194 |
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195 |
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196 uint8_t ow_byte_rd( void ) |
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197 { |
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198 // read by sending only "1"s, so bus gets released |
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199 // after the init low-pulse in every slot |
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200 return ow_byte_wr( 0xFF ); |
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201 } |
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202 |
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203 |
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204 uint8_t ow_rom_search( uint8_t diff, uint8_t *id ) |
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205 { |
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206 uint8_t i, j, next_diff; |
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207 uint8_t b; |
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208 |
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209 if( ow_reset() ) { |
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210 return OW_PRESENCE_ERR; // error, no device found <--- early exit! |
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211 } |
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212 |
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213 ow_byte_wr( OW_SEARCH_ROM ); // ROM search command |
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214 next_diff = OW_LAST_DEVICE; // unchanged on last device |
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215 |
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216 i = OW_ROMCODE_SIZE * 8; // 8 bytes |
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217 |
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218 do { |
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219 j = 8; // 8 bits |
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220 do { |
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221 b = ow_bit_io( 1 ); // read bit |
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222 if( ow_bit_io( 1 ) ) { // read complement bit |
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223 if( b ) { // 0b11 |
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224 return OW_DATA_ERR; // data error <--- early exit! |
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225 } |
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226 } |
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227 else { |
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228 if( !b ) { // 0b00 = 2 devices |
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229 if( diff > i || ((*id & 1) && diff != i) ) { |
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230 b = 1; // now 1 |
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231 next_diff = i; // next pass 0 |
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232 } |
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233 } |
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234 } |
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235 ow_bit_io( b ); // write bit |
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236 *id >>= 1; |
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237 if( b ) { |
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238 *id |= 0x80; // store bit |
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239 } |
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240 |
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241 i--; |
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242 |
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243 } while( --j ); |
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244 |
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245 id++; // next byte |
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246 |
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247 } while( i ); |
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248 |
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249 return next_diff; // to continue search |
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250 } |
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251 |
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252 |
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253 static void ow_command_intern( uint8_t command, uint8_t *id, uint8_t with_parasite_enable ) |
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254 { |
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255 uint8_t i; |
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256 |
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257 ow_reset(); |
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258 |
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259 if( id ) { |
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260 ow_byte_wr( OW_MATCH_ROM ); // to a single device |
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261 i = OW_ROMCODE_SIZE; |
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262 do { |
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263 ow_byte_wr( *id ); |
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264 id++; |
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265 } while( --i ); |
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266 } |
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267 else { |
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268 ow_byte_wr( OW_SKIP_ROM ); // to all devices |
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269 } |
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270 |
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271 if ( with_parasite_enable ) { |
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272 ow_byte_wr_with_parasite_enable( command ); |
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273 } else { |
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274 ow_byte_wr( command ); |
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275 } |
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276 } |
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277 |
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278 void ow_command( uint8_t command, uint8_t *id ) |
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279 { |
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280 ow_command_intern( command, id, 0); |
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281 } |
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282 |
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283 void ow_command_with_parasite_enable( uint8_t command, uint8_t *id ) |
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284 { |
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285 ow_command_intern( command, id, 1 ); |
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286 } |
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287 |
