# HG changeset patch
# User Matt Johnston <matt@ucc.asn.au>
# Date 1340548234 -28800
# Node ID 5d86f1182f628139cd261d26f3018d0f6650a462
# Parent  53b24a353e13c61b529f4811fbcd2fc2e1a9ea6e
add "awake" and "reset" functions

diff -r 53b24a353e13 -r 5d86f1182f62 main.c
--- a/main.c	Sun Jun 24 17:22:26 2012 +0800
+++ b/main.c	Sun Jun 24 22:30:34 2012 +0800
@@ -7,6 +7,7 @@
 #include <util/delay.h>
 #include <avr/pgmspace.h>
 #include <avr/eeprom.h>
+#include <avr/wdt.h>
 #include <util/crc16.h>
 
 // for DWORD of get_fattime()
@@ -115,8 +116,15 @@
 static void
 setup_chip()
 {
+    cli();
+
+    // stop watchdog timer (might have been used to cause a reset)
+    wdt_reset();
+    MCUSR &= ~_BV(WDRF);
+    WDTCSR |= _BV(WDCE) | _BV(WDE);
+    WDTCSR = 0;
+
     // Set clock to 2mhz
-    cli();
     CLKPR = _BV(CLKPCE);
     // divide by 4
     CLKPR = _BV(CLKPS1);
@@ -294,6 +302,23 @@
 }
 
 static void
+cmd_awake()
+{
+    comms_timeout = WAKE_SECS;
+    printf_P(PSTR("awake %hu\n"), WAKE_SECS);
+}
+
+static void
+cmd_reset()
+{
+    printf_P(PSTR("reset\n"));
+    _delay_ms(100);
+    cli(); // disable interrupts 
+    wdt_enable(WDTO_15MS); // enable watchdog 
+    while(1); // wait for watchdog to reset processor 
+}
+
+static void
 cmd_measure()
 {
     printf_P(PSTR("measuring\n"));
@@ -466,10 +491,18 @@
     {
         cmd_add_all();
     }
+    else if (strcmp_P(readbuf, PSTR("awake"))== 0)
+    {
+        cmd_awake();
+    }
     else if (strcmp_P(readbuf, PSTR("init")) == 0)
     {
         cmd_init();
     }
+    else if (strcmp_P(readbuf, PSTR("reset")) == 0)
+    {
+        cmd_reset();
+    }
     else
     {
         printf_P(PSTR("Bad command\n"));
@@ -479,6 +512,7 @@
 ISR(INT0_vect)
 {
     need_comms = 1;
+    comms_timeout = WAKE_SECS;
     blink();
     _delay_ms(100);
     blink();
@@ -728,7 +762,6 @@
     printf_P(PSTR("Bad interrupt\n"));
 }
 
-
 int main(void)
 {
     setup_chip();