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1 #include <stdio.h> |
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2 #include <string.h> |
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3 #include <stddef.h> |
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4 #include <stdbool.h> |
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5 #include <stdlib.h> |
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6 #include <avr/io.h> |
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7 #include <avr/interrupt.h> |
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8 #include <avr/sleep.h> |
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9 #include <util/delay.h> |
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10 #include <avr/pgmspace.h> |
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11 #include <avr/eeprom.h> |
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12 #include <avr/wdt.h> |
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13 #include <util/atomic.h> |
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14 #include <util/crc16.h> |
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15 |
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16 //#include "simple_ds18b20.h" |
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17 //#include "onewire.h" |
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18 |
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19 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
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20 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) |
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21 |
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22 // TICK should be 8 or less (8 untested). all timers need |
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23 // to be a multiple. |
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24 |
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25 #define TICK 1 |
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26 // we have 1024 prescaler, 32768 crystal. |
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27 #define SLEEP_COMPARE (32*TICK-1) |
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28 |
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29 #define KEYLEN 20 |
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30 |
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31 #define VALUE_NOSENSOR 0x07D0 // 125 degrees |
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32 #define VALUE_BROKEN 0x07D1 // 125.0625 |
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33 |
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34 #define OVERSHOOT_MAX_DIV 1800.0 // 30 mins |
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35 #define WORT_INVALID_TIME 900 // 15 mins |
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36 // fridge min/max are only used if the wort sensor is invalid |
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37 #define FRIDGE_AIR_MIN_RANGE 40 // 4º |
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38 #define FRIDGE_AIR_MAX_RANGE 40 // 4º |
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39 |
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40 #define BAUD 19200 |
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41 #define UBRR ((F_CPU)/8/(BAUD)-1) |
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42 |
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43 #define PORT_LED PORTC |
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44 #define DDR_LED DDRC |
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45 #define PIN_LED PC4 |
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46 |
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47 #define PORT_SHDN PORTD |
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48 #define DDR_SHDN DDRD |
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49 #define PIN_SHDN PD7 |
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50 |
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51 #define PORT_FRIDGE PORTD |
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52 #define DDR_FRIDGE DDRD |
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53 #define PIN_FRIDGE PD6 |
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54 |
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55 // total amount of 16bit values available for measurements. |
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56 // adjust emperically, be sure to allow enough stack space too |
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57 #define TOTAL_MEASUREMENTS 800 |
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58 |
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59 // each sensor slot uses 8 bytes |
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60 #define MAX_SENSORS 6 |
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61 |
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62 // fixed at 8, have a shorter name |
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63 #define ID_LEN OW_ROMCODE_SIZE |
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64 |
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65 // #define HAVE_UART_ECHO |
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66 |
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67 // stores a value of clock_epoch combined with the remainder of TCNT2, |
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68 // for 1/32 second accuracy |
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69 struct epoch_ticks |
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70 { |
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71 uint32_t ticks; |
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72 // remainder |
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73 uint8_t rem; |
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74 }; |
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75 |
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76 // eeprom-settable parameters, default values defined here. |
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77 // all timeouts should be a multiple of TICK |
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78 static uint32_t watchdog_long_limit = 60*60*24; |
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79 static uint32_t watchdog_short_limit = 0; |
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80 static uint32_t newboot_limit = 60*10; |
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81 |
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82 // avr proves itself |
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83 static uint8_t avr_keys[NKEYS][KEYLEN] = {0}; |
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84 |
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85 |
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86 // ---- Atomic guards required accessing these variables |
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87 // clock_epoch in seconds |
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88 static uint32_t clock_epoch; |
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89 // watchdog counts up |
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90 static uint32_t watchdog_long_count; |
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91 static uint32_t watchdog_short_count; |
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92 // newboot counts down - it's a one-shot |
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93 static uint32_t newboot_count; |
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94 // ---- End atomic guards required |
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95 |
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96 // boolean flags |
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97 static uint8_t watchdog_long_hit; |
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98 static uint8_t watchdog_short_hit; |
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99 static uint8_t newboot_hit; |
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100 |
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101 static uint8_t readpos; |
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102 static char readbuf[50]; |
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103 static uint8_t have_cmd; |
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104 |
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105 int uart_putchar(char c, FILE *stream); |
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106 static void long_delay(int ms); |
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107 static void blink(); |
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108 static uint16_t adc_vcc(); |
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109 |
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110 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
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111 _FDEV_SETUP_WRITE); |
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112 |
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113 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ |
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114 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) |
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115 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) |
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116 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) |
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117 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } |
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118 |
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119 #define EXPECT_MAGIC 0xdf83 |
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120 |
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121 struct __attribute__ ((__packed__)) __eeprom_data { |
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122 uint32_t watchdog_long_limit; |
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123 uint32_t watchdog_short_limit; |
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124 uint32_t newboot_limit; |
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125 |
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126 uint8_t avr_key[NKEYS][KEYLEN]; |
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127 |
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128 uint16_t magic; |
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129 }; |
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130 |
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131 static void deep_sleep(); |
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132 |
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133 // Very first setup |
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134 static void |
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135 setup_chip() |
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136 { |
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137 cli(); |
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138 |
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139 // stop watchdog timer (might have been used to cause a reset) |
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140 wdt_reset(); |
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141 MCUSR &= ~_BV(WDRF); |
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142 WDTCSR |= _BV(WDCE) | _BV(WDE); |
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143 WDTCSR = 0; |
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144 |
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145 // set to 8S, in case sha1 is slow etc. |
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146 wdt_enable(WDTO_8S); |
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147 |
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148 // Set clock to 2mhz |
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149 CLKPR = _BV(CLKPCE); |
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150 // divide by 4 |
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151 CLKPR = _BV(CLKPS1); |
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152 |
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153 // enable pullups |
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154 // XXX matt pihelp |
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155 PORTB = 0xff; // XXX change when using SPI |
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156 PORTD = 0xff; |
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157 PORTC = 0xff; |
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158 |
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159 // 3.3v power for bluetooth and SD |
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160 DDR_LED |= _BV(PIN_LED); |
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161 |
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162 // set pullup |
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163 PORTD |= _BV(PD2); |
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164 // INT0 setup |
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165 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? |
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166 EIMSK = _BV(INT0); |
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167 |
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168 // comparator disable |
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169 ACSR = _BV(ACD); |
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170 |
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171 // disable adc pin input buffers |
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172 DIDR0 = 0x3F; // acd0-adc5 |
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173 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 |
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174 |
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175 sei(); |
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176 } |
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177 |
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178 static void |
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179 get_epoch_ticks(struct epoch_ticks *t) |
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180 { |
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181 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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182 { |
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183 t->ticks = clock_epoch; |
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184 t->rem = TCNT2; |
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185 } |
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186 } |
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187 |
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188 static void |
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189 setup_tick_counter() |
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190 { |
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191 // set up counter2. |
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192 // COM21 COM20 Set OC2 on Compare Match (p116) |
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193 // WGM21 Clear counter on compare |
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194 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); |
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195 // toggle on match |
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196 TCCR2A = _BV(COM2A0); |
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197 // CS22 CS21 CS20 clk/1024 |
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198 TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20); |
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199 // set async mode |
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200 ASSR |= _BV(AS2); |
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201 TCNT2 = 0; |
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202 OCR2A = SLEEP_COMPARE; |
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203 // interrupt |
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204 TIMSK2 = _BV(OCIE2A); |
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205 } |
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206 |
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207 static void |
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208 uart_on() |
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209 { |
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210 // Power reduction register |
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211 PRR &= ~_BV(PRUSART0); |
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212 |
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213 // All of this needs to be done each time after turning off the PRR |
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214 // baud rate |
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215 UBRR0H = (unsigned char)(UBRR >> 8); |
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216 UBRR0L = (unsigned char)UBRR; |
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217 // set 2x clock, improves accuracy of UBRR |
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218 UCSR0A |= _BV(U2X0); |
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219 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); |
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220 //8N1 |
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221 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); |
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222 uart_enabled = 1; |
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223 } |
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224 |
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225 static void |
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226 uart_off() |
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227 { |
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228 // Turn off interrupts and disable tx/rx |
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229 UCSR0B = 0; |
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230 uart_enabled = 0; |
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231 |
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232 // Power reduction register |
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233 PRR |= _BV(PRUSART0); |
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234 } |
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235 |
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236 int |
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237 uart_putchar(char c, FILE *stream) |
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238 { |
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239 if (!uart_enabled) |
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240 { |
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241 return EOF; |
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242 } |
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243 // XXX could perhaps sleep in the loop for power. |
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244 if (c == '\n') |
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245 { |
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246 loop_until_bit_is_set(UCSR0A, UDRE0); |
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247 UDR0 = '\r'; |
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248 } |
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249 loop_until_bit_is_set(UCSR0A, UDRE0); |
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250 UDR0 = c; |
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251 if (stream == crc_stdout) |
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252 { |
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253 crc_out = _crc_ccitt_update(crc_out, c); |
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254 } |
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255 if (c == '\r') |
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256 { |
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257 loop_until_bit_is_set(UCSR0A, UDRE0); |
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258 UDR0 = '\n'; |
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259 if (stream == crc_stdout) |
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260 { |
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261 crc_out = _crc_ccitt_update(crc_out, '\n'); |
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262 } |
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263 } |
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264 return (unsigned char)c; |
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265 } |
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266 |
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267 static void |
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268 cmd_reset() |
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269 { |
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270 printf_P(PSTR("reset\n")); |
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271 _delay_ms(100); |
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272 cli(); // disable interrupts |
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273 wdt_enable(WDTO_15MS); // enable watchdog |
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274 while(1); // wait for watchdog to reset processor |
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275 } |
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276 |
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277 |
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278 |
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279 static void |
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280 cmd_get_params() |
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281 { |
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282 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot; |
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283 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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284 { |
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285 cur_watchdog_long = watchdot_long_count; |
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286 cur_watchdog_short = watchdot_short_count; |
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287 cur_newboot = newboot_limit_count; |
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288 } |
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289 |
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290 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu)\n"), |
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291 watchdog_long_limit, |
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292 watchdog_long_count, |
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293 watchdog_short_limit, |
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294 watchdog_short_count, |
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295 newboot_limit, |
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296 newboot_count); |
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297 } |
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298 |
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299 static void |
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300 cmd_set_params(const char *params) |
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301 { |
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302 uint32_t new_watchdog_long_limit; |
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303 uint32_t new_watchdog_short_limit; |
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304 uint32_t new_newboot_limit; |
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305 |
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306 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), |
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307 &new_watchdog_long_limit, |
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308 &new_watchdog_short_limit, |
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309 &new_newboot_limit); |
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310 |
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311 |
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312 if (ret != 3) |
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313 { |
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314 printf_P(PSTR("Bad values\n")); |
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315 } |
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316 else |
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317 { |
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318 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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319 { |
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320 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); |
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321 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); |
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322 eeprom_write(new_newboot_limit, newboot_limit); |
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323 uint16_t magic = EXPECT_MAGIC; |
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324 eeprom_write(magic, magic); |
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325 } |
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326 printf_P(PSTR("set_params for next boot\n")); |
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327 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), |
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328 new_watchdog_long_limit, |
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329 new_watchdog_short_limit, |
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330 new_newboot_limit); |
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331 |
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332 } |
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333 } |
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334 |
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335 uint8_t from_hex(char c) |
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336 { |
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337 if (c >= '0' && c <= '9') { |
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338 return c-'0'; |
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339 } |
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340 if (c >= 'a' && c <= 'f') { |
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341 return c-'a' + 0xa; |
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342 } |
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343 if (c >= 'A' && c <= 'F') { |
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344 return c-'A' + 0xa; |
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345 } |
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346 return 0; |
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347 } |
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348 |
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349 static void |
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350 cmd_set_avr_key(const char *params) |
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351 { |
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352 // "N HEXKEY" |
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353 if (strlen(params)) != KEYLEN*2+2) { |
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354 printf_P(PSTR("Wrong length key\n")); |
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355 return; |
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356 } |
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357 |
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358 uint8_t new_key[KEYLEN]; |
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359 for (int i = 0, p = 0; i < KEYLEN; i++, p += 2) |
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360 { |
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361 new_key[i] = (fromhex(params[p]) << 4) | fromhex(params[p+1]); |
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362 } |
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363 } |
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364 |
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365 static void |
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366 load_params() |
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367 { |
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368 uint16_t magic; |
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369 eeprom_read(magic, magic); |
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370 if (magic == EXPECT_MAGIC) |
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371 { |
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372 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
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373 eeprom_read(watchdog_short_limit, watchdog_short_limit); |
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374 eeprom_read(netboot_limit); |
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375 eeprom_read(avr_key); |
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376 } |
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377 } |
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378 |
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379 // returns true if eeprom was written |
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380 static bool |
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381 set_initial_eeprom() |
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382 { |
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383 uint16_t magic; |
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384 eeprom_read(magic, magic); |
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385 if (magic == EXPECT_MAGIC) |
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386 { |
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387 return false; |
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388 } |
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389 |
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390 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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391 { |
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392 eeprom_write(measure_wake, measure_wake); |
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393 eeprom_write(comms_wake, comms_wake); |
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394 eeprom_write(wake_secs, wake_secs); |
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395 eeprom_write(fridge_setpoint, fridge_setpoint); |
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396 eeprom_write(fridge_difference, fridge_difference); |
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397 eeprom_write(fridge_delay, fridge_delay); |
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398 eeprom_write(overshoot_delay, overshoot_delay); |
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399 eeprom_write(overshoot_factor, overshoot_factor); |
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400 magic = EXPECT_MAGIC; |
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401 eeprom_write(magic, magic); |
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402 } |
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403 |
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404 return true; |
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405 } |
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406 |
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407 static void |
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408 read_handler() |
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409 { |
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410 if (strcmp_P(readbuf, PSTR("fetch")) == 0) |
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411 { |
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412 cmd_fetch(); |
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413 } |
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414 else if (strcmp_P(readbuf, PSTR("clear")) == 0) |
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415 { |
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416 cmd_clear(); |
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417 } |
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418 else if (strcmp_P(readbuf, PSTR("btoff")) == 0) |
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419 { |
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420 cmd_btoff(); |
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421 } |
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422 else if (strcmp_P(readbuf, PSTR("measure")) == 0) |
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423 { |
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424 cmd_measure(); |
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425 } |
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426 else if (strcmp_P(readbuf, PSTR("sensors")) == 0) |
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427 { |
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428 cmd_sensors(); |
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429 } |
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430 else if (strcmp_P(readbuf, PSTR("get_params")) == 0) |
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431 { |
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432 cmd_get_params(); |
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433 } |
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434 else if (strncmp_P(readbuf, PSTR("set_params "), 11) == 0) |
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435 { |
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436 cmd_set_params(&readbuf[11]); |
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437 } |
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438 else if (strcmp_P(readbuf, PSTR("awake")) == 0) |
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439 { |
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440 cmd_awake(); |
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441 } |
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442 else if (strncmp_P(readbuf, PSTR("fridge_setpoint "), 16) == 0) |
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443 { |
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444 cmd_set_fridge_setpoint(&readbuf[16]); |
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445 } |
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446 else if (strncmp_P(readbuf, PSTR("fridge_diff "), 12) == 0) |
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447 { |
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448 cmd_set_fridge_difference(&readbuf[12]); |
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449 } |
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450 else if (strncmp_P(readbuf, PSTR("fridge_delay "), 13) == 0) |
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451 { |
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452 cmd_set_fridge_delay(&readbuf[13]); |
|
|
453 } |
|
|
454 else if (strncmp_P(readbuf, PSTR("overshoot_delay "), 16) == 0) |
|
|
455 { |
|
|
456 cmd_set_overshoot_delay(&readbuf[16]); |
|
|
457 } |
|
|
458 else if (strncmp_P(readbuf, PSTR("overshoot_factor "), 17) == 0) |
|
|
459 { |
|
|
460 cmd_set_overshoot_factor(&readbuf[17]); |
|
|
461 } |
|
|
462 else if (strcmp_P(readbuf, PSTR("reset")) == 0) |
|
|
463 { |
|
|
464 cmd_reset(); |
|
|
465 } |
|
|
466 else |
|
|
467 { |
|
|
468 printf_P(PSTR("Bad command '%s'\n"), readbuf); |
|
|
469 } |
|
|
470 } |
|
|
471 |
|
|
472 ISR(INT0_vect) |
|
|
473 { |
|
|
474 button_pressed = 1; |
|
|
475 blink(); |
|
|
476 _delay_ms(100); |
|
|
477 blink(); |
|
|
478 } |
|
|
479 |
|
|
480 |
|
|
481 ISR(USART_RX_vect) |
|
|
482 { |
|
|
483 char c = UDR0; |
|
|
484 #ifdef HAVE_UART_ECHO |
|
|
485 uart_putchar(c, NULL); |
|
|
486 #endif |
|
|
487 if (c == '\r' || c == '\n') |
|
|
488 { |
|
|
489 if (readpos > 0) |
|
|
490 { |
|
|
491 readbuf[readpos] = '\0'; |
|
|
492 have_cmd = 1; |
|
|
493 readpos = 0; |
|
|
494 } |
|
|
495 } |
|
|
496 else |
|
|
497 { |
|
|
498 readbuf[readpos] = c; |
|
|
499 readpos++; |
|
|
500 if (readpos >= sizeof(readbuf)) |
|
|
501 { |
|
|
502 readpos = 0; |
|
|
503 } |
|
|
504 } |
|
|
505 } |
|
|
506 |
|
|
507 ISR(TIMER2_COMPA_vect) |
|
|
508 { |
|
|
509 TCNT2 = 0; |
|
|
510 |
|
|
511 clock_epoch += TICK; |
|
|
512 |
|
1
|
513 // watchdogs count up, continuous |
|
|
514 if (watchdog_long_limit > 0) { |
|
|
515 watchdog_count += TICK; |
|
|
516 if (watchdog_long_count >= watchdog_long_limit) |
|
|
517 { |
|
|
518 watchdog_long_count = 0; |
|
|
519 watchdog_long_hit = 1; |
|
|
520 } |
|
0
|
521 } |
|
|
522 |
|
1
|
523 if (watchdog_short_limit > 0) { |
|
|
524 watchdog_count += TICK; |
|
|
525 if (watchdog_short_count >= watchdog_short_limit) |
|
|
526 { |
|
|
527 watchdog_short_count = 0; |
|
|
528 watchdog_short_hit = 1; |
|
|
529 } |
|
0
|
530 } |
|
|
531 |
|
1
|
532 // newboot counts down, oneshot. |
|
|
533 if (newboot_count > 0) |
|
0
|
534 { |
|
1
|
535 newboot_count--; |
|
|
536 if (newboot_count == 0) |
|
|
537 { |
|
|
538 newboot_hit = 1; |
|
|
539 } |
|
0
|
540 } |
|
1
|
541 |
|
0
|
542 } |
|
|
543 |
|
|
544 static void |
|
|
545 deep_sleep() |
|
|
546 { |
|
|
547 // p119 of manual |
|
|
548 OCR2A = SLEEP_COMPARE; |
|
|
549 loop_until_bit_is_clear(ASSR, OCR2AUB); |
|
|
550 |
|
|
551 set_sleep_mode(SLEEP_MODE_PWR_SAVE); |
|
|
552 sleep_mode(); |
|
|
553 } |
|
|
554 |
|
|
555 static void |
|
|
556 idle_sleep() |
|
|
557 { |
|
|
558 set_sleep_mode(SLEEP_MODE_IDLE); |
|
|
559 sleep_mode(); |
|
|
560 } |
|
|
561 |
|
|
562 static uint16_t |
|
|
563 adc_vcc() |
|
|
564 { |
|
|
565 PRR &= ~_BV(PRADC); |
|
|
566 |
|
|
567 // /16 prescaler |
|
|
568 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
|
|
569 |
|
|
570 // set to measure 1.1 reference |
|
|
571 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); |
|
|
572 // average a number of samples |
|
|
573 uint16_t sum = 0; |
|
|
574 uint8_t num = 0; |
|
|
575 for (uint8_t n = 0; n < 20; n++) |
|
|
576 { |
|
|
577 ADCSRA |= _BV(ADSC); |
|
|
578 loop_until_bit_is_clear(ADCSRA, ADSC); |
|
|
579 |
|
|
580 uint8_t low_11 = ADCL; |
|
|
581 uint8_t high_11 = ADCH; |
|
|
582 uint16_t val = low_11 + (high_11 << 8); |
|
|
583 |
|
|
584 if (n >= 4) |
|
|
585 { |
|
|
586 sum += val; |
|
|
587 num++; |
|
|
588 } |
|
|
589 } |
|
|
590 ADCSRA = 0; |
|
|
591 PRR |= _BV(PRADC); |
|
|
592 |
|
|
593 //float res_volts = 1.1 * 1024 * num / sum; |
|
|
594 //return 1000 * res_volts; |
|
|
595 return ((uint32_t)1100*1024*num) / sum; |
|
|
596 } |
|
|
597 |
|
|
598 static void |
|
|
599 do_comms() |
|
|
600 { |
|
|
601 // avoid receiving rubbish, perhaps |
|
|
602 uart_on(); |
|
|
603 |
|
|
604 // write sd card here? same 3.3v regulator... |
|
|
605 |
|
1
|
606 while (1) |
|
0
|
607 { |
|
1
|
608 wdt_reset(); |
|
0
|
609 if (have_cmd) |
|
|
610 { |
|
|
611 have_cmd = 0; |
|
|
612 read_handler(); |
|
|
613 continue; |
|
|
614 } |
|
|
615 |
|
|
616 // wait for commands from the master |
|
|
617 idle_sleep(); |
|
|
618 } |
|
|
619 } |
|
|
620 |
|
|
621 static void |
|
|
622 blink() |
|
|
623 { |
|
|
624 PORT_LED &= ~_BV(PIN_LED); |
|
|
625 _delay_ms(1); |
|
|
626 PORT_LED |= _BV(PIN_LED); |
|
|
627 } |
|
|
628 |
|
|
629 static void |
|
|
630 long_delay(int ms) |
|
|
631 { |
|
|
632 int iter = ms / 100; |
|
|
633 |
|
|
634 for (int i = 0; i < iter; i++) |
|
|
635 { |
|
|
636 _delay_ms(100); |
|
|
637 } |
|
|
638 } |
|
|
639 |
|
|
640 ISR(BADISR_vect) |
|
|
641 { |
|
|
642 //uart_on(); |
|
|
643 printf_P(PSTR("Bad interrupt\n")); |
|
|
644 } |
|
|
645 |
|
|
646 int main(void) |
|
|
647 { |
|
|
648 setup_chip(); |
|
|
649 blink(); |
|
|
650 |
|
|
651 stdout = &mystdout; |
|
|
652 uart_on(); |
|
|
653 |
|
|
654 printf(PSTR("Started.\n")); |
|
|
655 |
|
|
656 load_params(); |
|
|
657 |
|
|
658 setup_tick_counter(); |
|
|
659 |
|
|
660 sei(); |
|
|
661 |
|
1
|
662 // doesn't return |
|
|
663 do_comms(); |
|
0
|
664 |
|
|
665 return 0; /* never reached */ |
|
|
666 } |
