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1 #include <stdio.h> |
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2 #include <string.h> |
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3 #include <stddef.h> |
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4 #include <stdbool.h> |
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5 #include <stdlib.h> |
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6 #include <avr/io.h> |
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7 #include <avr/interrupt.h> |
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8 #include <avr/sleep.h> |
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9 #include <util/delay.h> |
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10 #include <avr/pgmspace.h> |
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11 #include <avr/eeprom.h> |
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12 #include <avr/wdt.h> |
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13 #include <util/atomic.h> |
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14 #include <util/crc16.h> |
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15 |
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2
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16 #include "hmac-sha1.h" |
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17 |
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1
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18 //#include "simple_ds18b20.h" |
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19 //#include "onewire.h" |
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20 |
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21 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
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22 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) |
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23 |
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24 // TICK should be 8 or less (8 untested). all timers need |
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25 // to be a multiple. |
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26 |
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27 #define TICK 1 |
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28 #define SLEEP_COMPARE (2000000/64) // == 31250 exactly |
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29 #define NKEYS 6 |
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30 #define KEYLEN 20 |
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31 |
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32 #define BAUD 19200 |
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33 #define UBRR ((F_CPU)/8/(BAUD)-1) |
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34 |
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35 // XXX |
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36 #define PORT_PI_BOOT PORTD |
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37 #define DDR_PI_BOOT DDRD |
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4
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38 #define PIN_PI_BOOT PD5 |
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39 |
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40 // XXX |
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41 #define PORT_PI_RESET PORTD |
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42 #define DDR_PI_RESET DDRD |
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43 #define PIN_PI_RESET PD6 |
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44 |
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45 |
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4
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46 #define PORT_LED PORTD |
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47 #define DDR_LED DDRD |
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48 #define PIN_LED PD7 |
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49 |
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50 // #define HAVE_UART_ECHO |
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51 |
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52 // stores a value of clock_epoch combined with the remainder of TCNT2, |
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53 // for 1/32 second accuracy |
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54 struct epoch_ticks |
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55 { |
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56 uint32_t ticks; |
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57 // remainder |
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58 uint8_t rem; |
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59 }; |
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60 |
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61 // eeprom-settable parameters, default values defined here. |
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62 // all timeouts should be a multiple of TICK |
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63 static uint32_t watchdog_long_limit = (60L*60*24); |
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64 static uint32_t watchdog_short_limit = 0; |
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65 static uint32_t newboot_limit = 60*10; |
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66 |
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67 // avr proves itself |
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68 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
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69 |
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70 // ---- Atomic guards required accessing these variables |
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71 // clock_epoch in seconds |
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72 static uint32_t clock_epoch; |
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73 // watchdog counts up |
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74 static uint32_t watchdog_long_count; |
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75 static uint32_t watchdog_short_count; |
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76 // newboot counts down |
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77 static uint32_t newboot_count; |
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78 // oneshot counts down |
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79 static uint32_t oneshot_count; |
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80 |
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81 // ---- End atomic guards required |
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82 |
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83 // boolean flags |
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84 static uint8_t watchdog_long_hit; |
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85 static uint8_t watchdog_short_hit; |
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86 static uint8_t newboot_hit; |
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87 static uint8_t oneshot_hit; |
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88 |
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89 static uint8_t readpos; |
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90 static char readbuf[50]; |
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91 static uint8_t have_cmd; |
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92 |
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93 int uart_putchar(char c, FILE *stream); |
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94 static void long_delay(int ms); |
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95 static void blink(); |
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96 static uint16_t adc_vcc(); |
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97 static void set_pi_boot_normal(uint8_t normal); |
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98 |
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99 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
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100 _FDEV_SETUP_WRITE); |
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101 |
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102 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ |
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103 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) |
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104 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) |
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105 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) |
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106 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } |
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107 |
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108 #define EXPECT_MAGIC 0xdf83 |
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109 |
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110 struct __attribute__ ((__packed__)) __eeprom_data { |
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111 uint32_t watchdog_long_limit; |
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112 uint32_t watchdog_short_limit; |
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113 uint32_t newboot_limit; |
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114 |
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115 uint8_t avr_keys[NKEYS][KEYLEN]; |
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116 |
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117 uint16_t magic; |
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118 }; |
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119 |
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120 // Very first setup |
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121 static void |
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122 setup_chip() |
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123 { |
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124 cli(); |
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125 |
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126 // stop watchdog timer (might have been used to cause a reset) |
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127 wdt_reset(); |
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128 MCUSR &= ~_BV(WDRF); |
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129 WDTCSR |= _BV(WDCE) | _BV(WDE); |
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130 WDTCSR = 0; |
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131 |
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132 // set to 8S, in case sha1 is slow etc. |
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133 wdt_enable(WDTO_8S); |
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134 |
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135 // Set clock to 2mhz |
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136 CLKPR = _BV(CLKPCE); |
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137 CLKPR = _BV(CLKPS1); |
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138 |
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139 // enable pullups |
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140 // XXX matt pihelp |
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141 PORTB = 0xff; // XXX change when using SPI |
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142 PORTD = 0xff; |
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143 PORTC = 0xff; |
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144 |
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145 // 3.3v power for bluetooth and SD |
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146 DDR_LED |= _BV(PIN_LED); |
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147 |
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148 // set pullup |
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149 PORTD |= _BV(PD2); |
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150 // INT0 setup |
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151 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? |
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152 EIMSK = _BV(INT0); |
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153 |
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154 // comparator disable |
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155 ACSR = _BV(ACD); |
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156 |
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157 // disable adc pin input buffers |
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158 DIDR0 = 0x3F; // acd0-adc5 |
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159 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 |
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160 |
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161 sei(); |
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162 } |
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163 |
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164 static void |
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165 get_epoch_ticks(struct epoch_ticks *t) |
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166 { |
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167 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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168 { |
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169 t->ticks = clock_epoch; |
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170 t->rem = TCNT2; |
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171 } |
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172 } |
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173 |
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174 static void |
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175 setup_tick_counter() |
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176 { |
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177 // set up counter1 |
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178 |
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179 // set up counter2. |
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180 // COM21 COM20 Set OC2 on Compare Match (p116) |
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181 // WGM21 Clear counter on compare |
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182 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); |
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183 // toggle on match |
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184 TCCR1A = _BV(COM1A0); |
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185 // systemclock/1024 |
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186 TCCR1B = _BV(CS12) | _BV(CS10); |
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187 TCNT1 = 0; |
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188 OCR1A = SLEEP_COMPARE; |
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189 // interrupt |
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190 TIMSK1 = _BV(OCIE1A); |
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191 } |
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192 |
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193 static void |
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194 uart_on() |
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195 { |
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196 // Power reduction register |
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197 PRR &= ~_BV(PRUSART0); |
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198 |
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199 // All of this needs to be done each time after turning off the PRR |
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200 // baud rate |
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201 UBRR0H = (unsigned char)(UBRR >> 8); |
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202 UBRR0L = (unsigned char)UBRR; |
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203 // set 2x clock, improves accuracy of UBRR |
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204 UCSR0A |= _BV(U2X0); |
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205 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); |
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206 //8N1 |
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207 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); |
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208 } |
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209 |
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210 static void |
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211 uart_off() |
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212 { |
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213 // Turn off interrupts and disable tx/rx |
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214 UCSR0B = 0; |
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215 |
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216 // Power reduction register |
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217 PRR |= _BV(PRUSART0); |
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218 } |
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219 |
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220 int |
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221 uart_putchar(char c, FILE *stream) |
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222 { |
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223 // XXX could perhaps sleep in the loop for power. |
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224 if (c == '\n') |
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225 { |
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226 loop_until_bit_is_set(UCSR0A, UDRE0); |
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227 UDR0 = '\r'; |
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228 } |
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229 loop_until_bit_is_set(UCSR0A, UDRE0); |
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230 UDR0 = c; |
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231 if (c == '\r') |
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232 { |
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233 loop_until_bit_is_set(UCSR0A, UDRE0); |
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234 UDR0 = '\n'; |
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235 } |
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236 return (unsigned char)c; |
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237 } |
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238 |
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239 static void |
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240 cmd_reset() |
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241 { |
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242 printf_P(PSTR("reset\n")); |
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243 _delay_ms(100); |
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244 cli(); // disable interrupts |
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245 wdt_enable(WDTO_15MS); // enable watchdog |
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246 while(1); // wait for watchdog to reset processor |
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247 } |
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248 |
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249 static void |
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250 cmd_newboot() |
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251 { |
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252 set_pi_boot_normal(1); |
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253 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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254 { |
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255 newboot_count = newboot_limit; |
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256 } |
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257 printf_P(PSTR("newboot for %d secs"), newboot_limit); |
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258 } |
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259 |
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260 |
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261 |
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262 static void |
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263 cmd_get_params() |
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264 { |
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265 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
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266 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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267 { |
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268 cur_watchdog_long = watchdog_long_count; |
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269 cur_watchdog_short = watchdog_short_count; |
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270 cur_newboot = newboot_count; |
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271 cur_oneshot = oneshot_count; |
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272 } |
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273 |
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274 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu) oneshot (%lu)\n"), |
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275 watchdog_long_limit, |
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276 cur_watchdog_long, |
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277 watchdog_short_limit, |
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278 cur_watchdog_short, |
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279 newboot_limit, |
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280 cur_newboot, |
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281 cur_oneshot); |
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282 } |
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283 |
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284 static void |
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285 cmd_set_params(const char *params) |
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286 { |
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287 uint32_t new_watchdog_long_limit; |
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288 uint32_t new_watchdog_short_limit; |
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289 uint32_t new_newboot_limit; |
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290 |
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291 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), |
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292 &new_watchdog_long_limit, |
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293 &new_watchdog_short_limit, |
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294 &new_newboot_limit); |
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295 |
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296 |
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297 if (ret != 3) |
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298 { |
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299 printf_P(PSTR("Bad values\n")); |
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300 } |
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301 else |
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302 { |
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303 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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304 { |
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305 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); |
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306 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); |
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307 eeprom_write(new_newboot_limit, newboot_limit); |
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308 uint16_t magic = EXPECT_MAGIC; |
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309 eeprom_write(magic, magic); |
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310 } |
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311 printf_P(PSTR("set_params for next boot\n")); |
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312 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), |
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313 new_watchdog_long_limit, |
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314 new_watchdog_short_limit, |
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315 new_newboot_limit); |
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316 |
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317 } |
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318 } |
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319 |
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1
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320 uint8_t from_hex(char c) |
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321 { |
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322 if (c >= '0' && c <= '9') { |
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323 return c-'0'; |
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324 } |
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325 if (c >= 'a' && c <= 'f') { |
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326 return c-'a' + 0xa; |
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327 } |
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328 if (c >= 'A' && c <= 'F') { |
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329 return c-'A' + 0xa; |
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330 } |
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331 return 0; |
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332 } |
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333 |
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334 static void |
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335 printhex_nibble(const unsigned char b, FILE *stream) |
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336 { |
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337 unsigned char c = b & 0x0f; |
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338 if ( c > 9 ) { |
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339 c += 'A'-10; |
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340 } |
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341 else { |
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342 c += '0'; |
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343 } |
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344 fputc(c, stream); |
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345 } |
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346 |
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347 void |
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348 printhex_byte(const unsigned char b, FILE *stream) |
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349 { |
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350 printhex_nibble( b >> 4, stream); |
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351 printhex_nibble( b, stream); |
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352 } |
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353 |
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354 void |
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355 printhex(uint8_t *id, uint8_t n, FILE *stream) |
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356 { |
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357 for (uint8_t i = 0; i < n; i++) |
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358 { |
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359 if (i > 0) |
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360 { |
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361 fputc(' ', stream); |
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362 } |
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363 printhex_byte(id[i], stream); |
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364 } |
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365 } |
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366 |
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367 static int8_t |
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368 parse_key(const char *params, uint8_t *key_index, uint8_t bytes[KEYLEN]) |
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369 { |
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370 // "N HEXKEY" |
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371 if (strlen(params) != KEYLEN*2+2) { |
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372 printf_P(PSTR("Wrong length key\n")); |
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373 return -1; |
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374 } |
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375 |
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376 if (params[1] != ' ') |
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377 { |
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378 printf_P(PSTR("Missing space\n")); |
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379 return -1; |
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380 } |
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381 |
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382 *key_index = from_hex(params[0]); |
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383 if (*key_index >= NKEYS) |
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384 { |
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385 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); |
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386 return -1; |
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387 } |
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388 |
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389 for (int i = 0, p = 0; i < KEYLEN; i++, p += 2) |
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390 { |
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391 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); |
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392 } |
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393 return 0; |
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394 } |
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395 |
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1
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396 static void |
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397 cmd_set_avr_key(const char *params) |
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398 { |
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2
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399 uint8_t new_key[KEYLEN]; |
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400 uint8_t key_index; |
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401 if (parse_key(params, &key_index, new_key) != 0) |
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402 { |
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1
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403 return; |
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0
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404 } |
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2
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405 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
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406 eeprom_write(avr_keys, avr_keys); |
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407 } |
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408 |
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409 static void |
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410 cmd_hmac(const char *params) |
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411 { |
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412 uint8_t data[KEYLEN]; |
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413 uint8_t key_index; |
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414 if (parse_key(params, &key_index, data) != 0) |
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415 { |
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416 printf_P(PSTR("FAIL: Bad input\n")); |
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417 } |
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0
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418 |
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2
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419 hmac_sha1_ctx_t ctx; |
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420 hmac_sha1_init(&ctx, avr_keys[key_index], KEYLEN); |
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421 hmac_sha1_lastBlock(&ctx, data, KEYLEN); |
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422 hmac_sha1_final(data, &ctx); |
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423 |
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424 printf_P(PSTR("HMAC: ")); |
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425 printhex(data, KEYLEN, stdout); |
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426 fputc('\n', stdout); |
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427 } |
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428 |
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429 static void |
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430 cmd_oneshot_reboot(const char *params) |
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431 { |
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432 uint32_t new_delay = strtoul(params, NULL, 10); |
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433 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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1
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434 { |
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2
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435 oneshot_count = new_delay; |
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1
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436 } |
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2
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437 printf_P(PSTR("oneshot delay %lu\n"), new_delay); |
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0
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438 } |
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439 |
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440 static void |
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441 load_params() |
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442 { |
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443 uint16_t magic; |
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444 eeprom_read(magic, magic); |
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445 if (magic == EXPECT_MAGIC) |
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446 { |
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1
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447 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
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448 eeprom_read(watchdog_short_limit, watchdog_short_limit); |
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2
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449 eeprom_read(newboot_limit, newboot_limit); |
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1
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450 } |
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2
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451 |
|
|
452 eeprom_read(avr_keys, avr_keys); |
|
0
|
453 } |
|
|
454 |
|
2
|
455 static void |
|
|
456 cmd_vcc() |
|
0
|
457 { |
|
2
|
458 uint16_t vcc = adc_vcc(); |
|
|
459 printf_P("vcc: %u mV\n", vcc); |
|
0
|
460 } |
|
|
461 |
|
|
462 static void |
|
|
463 read_handler() |
|
|
464 { |
|
2
|
465 if (strcmp_P(readbuf, PSTR("get_params")) == 0) |
|
0
|
466 { |
|
|
467 cmd_get_params(); |
|
|
468 } |
|
|
469 else if (strncmp_P(readbuf, PSTR("set_params "), 11) == 0) |
|
|
470 { |
|
|
471 cmd_set_params(&readbuf[11]); |
|
|
472 } |
|
2
|
473 else if (strncmp_P(readbuf, PSTR("set_key "), 8) == 0) |
|
0
|
474 { |
|
2
|
475 cmd_set_avr_key(&readbuf[8]); |
|
0
|
476 } |
|
2
|
477 else if (strncmp_P(readbuf, PSTR("oneshot "), 8) == 0) |
|
0
|
478 { |
|
2
|
479 cmd_oneshot_reboot(&readbuf[8]); |
|
0
|
480 } |
|
2
|
481 else if (strncmp_P(readbuf, PSTR("hmac "), 5) == 0) |
|
0
|
482 { |
|
2
|
483 cmd_hmac(&readbuf[5]); |
|
0
|
484 } |
|
2
|
485 else if (strcmp_P(readbuf, PSTR("vcc")) == 0) |
|
0
|
486 { |
|
2
|
487 cmd_vcc(); |
|
0
|
488 } |
|
|
489 else if (strcmp_P(readbuf, PSTR("reset")) == 0) |
|
|
490 { |
|
|
491 cmd_reset(); |
|
|
492 } |
|
4
|
493 else if (strcmp_P(readbuf, PSTR("newboot")) == 0) |
|
|
494 { |
|
|
495 cmd_newboot(); |
|
|
496 } |
|
0
|
497 else |
|
|
498 { |
|
|
499 printf_P(PSTR("Bad command '%s'\n"), readbuf); |
|
|
500 } |
|
|
501 } |
|
|
502 |
|
|
503 ISR(INT0_vect) |
|
|
504 { |
|
|
505 blink(); |
|
|
506 _delay_ms(100); |
|
|
507 blink(); |
|
|
508 } |
|
|
509 |
|
|
510 |
|
|
511 ISR(USART_RX_vect) |
|
|
512 { |
|
|
513 char c = UDR0; |
|
|
514 #ifdef HAVE_UART_ECHO |
|
|
515 uart_putchar(c, NULL); |
|
|
516 #endif |
|
|
517 if (c == '\r' || c == '\n') |
|
|
518 { |
|
|
519 if (readpos > 0) |
|
|
520 { |
|
|
521 readbuf[readpos] = '\0'; |
|
|
522 have_cmd = 1; |
|
|
523 readpos = 0; |
|
|
524 } |
|
|
525 } |
|
|
526 else |
|
|
527 { |
|
|
528 readbuf[readpos] = c; |
|
|
529 readpos++; |
|
|
530 if (readpos >= sizeof(readbuf)) |
|
|
531 { |
|
|
532 readpos = 0; |
|
|
533 } |
|
|
534 } |
|
|
535 } |
|
|
536 |
|
2
|
537 ISR(TIMER1_COMPA_vect) |
|
0
|
538 { |
|
2
|
539 TCNT1 = 0; |
|
0
|
540 |
|
|
541 clock_epoch += TICK; |
|
|
542 |
|
1
|
543 // watchdogs count up, continuous |
|
|
544 if (watchdog_long_limit > 0) { |
|
2
|
545 watchdog_long_count += TICK; |
|
1
|
546 if (watchdog_long_count >= watchdog_long_limit) |
|
|
547 { |
|
|
548 watchdog_long_count = 0; |
|
|
549 watchdog_long_hit = 1; |
|
|
550 } |
|
0
|
551 } |
|
|
552 |
|
1
|
553 if (watchdog_short_limit > 0) { |
|
2
|
554 watchdog_short_count += TICK; |
|
1
|
555 if (watchdog_short_count >= watchdog_short_limit) |
|
|
556 { |
|
|
557 watchdog_short_count = 0; |
|
|
558 watchdog_short_hit = 1; |
|
|
559 } |
|
0
|
560 } |
|
|
561 |
|
2
|
562 // newboot counts down |
|
1
|
563 if (newboot_count > 0) |
|
0
|
564 { |
|
2
|
565 newboot_count-=TICK; |
|
|
566 if (newboot_count <= 0) |
|
1
|
567 { |
|
|
568 newboot_hit = 1; |
|
2
|
569 newboot_count = 0; |
|
1
|
570 } |
|
0
|
571 } |
|
1
|
572 |
|
2
|
573 if (oneshot_count > 0) |
|
|
574 { |
|
|
575 oneshot_count-=TICK; |
|
|
576 if (oneshot_count <= 0) |
|
|
577 { |
|
|
578 oneshot_hit = 1; |
|
|
579 oneshot_count = 0; |
|
|
580 } |
|
|
581 } |
|
0
|
582 } |
|
|
583 |
|
|
584 static void |
|
|
585 idle_sleep() |
|
|
586 { |
|
|
587 set_sleep_mode(SLEEP_MODE_IDLE); |
|
|
588 sleep_mode(); |
|
|
589 } |
|
|
590 |
|
|
591 static uint16_t |
|
|
592 adc_vcc() |
|
|
593 { |
|
|
594 PRR &= ~_BV(PRADC); |
|
|
595 |
|
|
596 // /16 prescaler |
|
|
597 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
|
|
598 |
|
|
599 // set to measure 1.1 reference |
|
|
600 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); |
|
|
601 // average a number of samples |
|
|
602 uint16_t sum = 0; |
|
|
603 uint8_t num = 0; |
|
|
604 for (uint8_t n = 0; n < 20; n++) |
|
|
605 { |
|
|
606 ADCSRA |= _BV(ADSC); |
|
|
607 loop_until_bit_is_clear(ADCSRA, ADSC); |
|
|
608 |
|
|
609 uint8_t low_11 = ADCL; |
|
|
610 uint8_t high_11 = ADCH; |
|
|
611 uint16_t val = low_11 + (high_11 << 8); |
|
|
612 |
|
|
613 if (n >= 4) |
|
|
614 { |
|
|
615 sum += val; |
|
|
616 num++; |
|
|
617 } |
|
|
618 } |
|
|
619 ADCSRA = 0; |
|
|
620 PRR |= _BV(PRADC); |
|
|
621 |
|
|
622 //float res_volts = 1.1 * 1024 * num / sum; |
|
|
623 //return 1000 * res_volts; |
|
|
624 return ((uint32_t)1100*1024*num) / sum; |
|
|
625 } |
|
|
626 |
|
|
627 static void |
|
2
|
628 reboot_pi() |
|
|
629 { |
|
|
630 // pull it low for 30ms |
|
|
631 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
|
632 DDR_PI_RESET |= _BV(PIN_PI_RESET); |
|
|
633 _delay_ms(30); |
|
|
634 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
|
635 } |
|
|
636 |
|
|
637 static void |
|
|
638 set_pi_boot_normal(uint8_t normal) |
|
|
639 { |
|
|
640 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
|
|
641 if (normal) |
|
|
642 { |
|
|
643 // tristate |
|
|
644 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
|
|
645 } |
|
|
646 else |
|
|
647 { |
|
|
648 // pull it low |
|
|
649 DDR_PI_RESET |= _BV(PIN_PI_BOOT); |
|
|
650 |
|
|
651 } |
|
|
652 } |
|
|
653 |
|
|
654 static void |
|
|
655 check_flags() |
|
|
656 { |
|
|
657 if (watchdog_long_hit |
|
|
658 || watchdog_short_hit |
|
|
659 || oneshot_hit) |
|
|
660 { |
|
|
661 reboot_pi(); |
|
|
662 } |
|
|
663 |
|
|
664 if (newboot_hit) { |
|
|
665 set_pi_boot_normal(0); |
|
|
666 } |
|
|
667 |
|
|
668 watchdog_long_hit = 0; |
|
|
669 watchdog_short_hit = 0; |
|
|
670 newboot_hit = 0; |
|
|
671 oneshot_hit = 0; |
|
|
672 } |
|
|
673 |
|
|
674 static void |
|
0
|
675 do_comms() |
|
|
676 { |
|
|
677 // avoid receiving rubbish, perhaps |
|
|
678 uart_on(); |
|
|
679 |
|
|
680 // write sd card here? same 3.3v regulator... |
|
|
681 |
|
1
|
682 while (1) |
|
0
|
683 { |
|
1
|
684 wdt_reset(); |
|
2
|
685 |
|
|
686 check_flags(); |
|
|
687 |
|
0
|
688 if (have_cmd) |
|
|
689 { |
|
|
690 have_cmd = 0; |
|
|
691 read_handler(); |
|
|
692 continue; |
|
|
693 } |
|
|
694 |
|
|
695 // wait for commands from the master |
|
|
696 idle_sleep(); |
|
|
697 } |
|
|
698 } |
|
|
699 |
|
|
700 static void |
|
|
701 blink() |
|
|
702 { |
|
|
703 PORT_LED &= ~_BV(PIN_LED); |
|
|
704 _delay_ms(1); |
|
|
705 PORT_LED |= _BV(PIN_LED); |
|
|
706 } |
|
|
707 |
|
|
708 static void |
|
|
709 long_delay(int ms) |
|
|
710 { |
|
|
711 int iter = ms / 100; |
|
|
712 |
|
|
713 for (int i = 0; i < iter; i++) |
|
|
714 { |
|
|
715 _delay_ms(100); |
|
|
716 } |
|
|
717 } |
|
|
718 |
|
|
719 ISR(BADISR_vect) |
|
|
720 { |
|
|
721 //uart_on(); |
|
|
722 printf_P(PSTR("Bad interrupt\n")); |
|
|
723 } |
|
|
724 |
|
|
725 int main(void) |
|
|
726 { |
|
|
727 setup_chip(); |
|
|
728 blink(); |
|
|
729 |
|
|
730 stdout = &mystdout; |
|
|
731 uart_on(); |
|
|
732 |
|
|
733 printf(PSTR("Started.\n")); |
|
|
734 |
|
2
|
735 set_pi_boot_normal(0); |
|
|
736 |
|
0
|
737 load_params(); |
|
|
738 |
|
|
739 setup_tick_counter(); |
|
|
740 |
|
|
741 sei(); |
|
|
742 |
|
1
|
743 // doesn't return |
|
|
744 do_comms(); |
|
0
|
745 |
|
|
746 return 0; /* never reached */ |
|
|
747 } |
