Mercurial > templog
annotate main.c @ 55:8e897a682208
untested code to log voltage and internal temperature
| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Sun, 24 Jun 2012 23:47:56 +0800 |
| parents | 0d3d14af55c2 |
| children | 5100e0bdadad |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 13 | 3 #include <stddef.h> |
| 1 | 4 #include <avr/io.h> |
| 5 #include <avr/interrupt.h> | |
| 6 #include <avr/sleep.h> | |
| 7 | 7 #include <util/delay.h> |
| 6 | 8 #include <avr/pgmspace.h> |
| 13 | 9 #include <avr/eeprom.h> |
|
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
10 #include <avr/wdt.h> |
| 0 | 11 #include <util/crc16.h> |
| 12 | |
| 12 | 13 // for DWORD of get_fattime() |
| 3 | 14 #include "integer.h" |
| 12 | 15 |
| 16 #include "simple_ds18b20.h" | |
| 13 | 17 #include "onewire.h" |
| 3 | 18 |
| 0 | 19 // configuration params |
| 20 // - measurement interval | |
| 21 // - transmit interval | |
| 22 // - bluetooth params | |
| 23 // - number of sensors (and range?) | |
| 24 | |
| 1 | 25 // 1 second. we have 1024 prescaler, 32768 crystal. |
| 2 | 26 #define SLEEP_COMPARE 32 |
| 33 | 27 // limited to uint16_t |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
28 #define MEASURE_WAKE 60 |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
29 |
| 13 | 30 #define VALUE_NOSENSOR -9000 |
| 31 #define VALUE_BROKEN -8000 | |
| 32 | |
| 33 | 33 // limited to uint16_t |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
34 #define COMMS_WAKE 3600 // XXX testing |
| 33 | 35 // limited to uint8_t |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
36 #define WAKE_SECS 60 // XXX testing |
| 2 | 37 |
| 10 | 38 #define BAUD 19200 |
| 7 | 39 #define UBRR ((F_CPU)/8/(BAUD)-1) |
| 40 | |
| 41 #define PORT_LED PORTC | |
| 42 #define DDR_LED DDRC | |
| 43 #define PIN_LED PC4 | |
| 1 | 44 |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
45 #define PORT_SHDN PORTD |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
46 #define DDR_SHDN DDRD |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
47 #define PIN_SHDN PD7 |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
48 |
| 33 | 49 // limited to uint16_t |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
50 // XXX - increasing this to 300 causes strange failures, |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
51 // not sure why |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
52 #define NUM_MEASUREMENTS 280 |
| 33 | 53 // limited to uint8_t |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
54 #define MAX_SENSORS 3 |
| 6 | 55 |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
56 // fixed at 8, have a shorter name |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
57 #define ID_LEN OW_ROMCODE_SIZE |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
58 |
| 33 | 59 // #define HAVE_UART_ECHO |
| 60 | |
| 10 | 61 int uart_putchar(char c, FILE *stream); |
| 14 | 62 static void long_delay(int ms); |
|
24
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
63 static void blink(); |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
64 static void adc_internal(uint16_t *millivolt_vcc, uint16_t *int_temp); |
| 14 | 65 |
| 0 | 66 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
| 67 _FDEV_SETUP_WRITE); | |
| 68 | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
69 uint16_t crc_out; |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
70 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
71 _FDEV_SETUP_WRITE); |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
72 // convenience |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
73 static FILE *crc_stdout = &_crc_stdout; |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
74 |
| 17 | 75 static uint16_t n_measurements; |
| 13 | 76 // stored as decidegrees |
| 14 | 77 static int16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS]; |
|
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
78 static uint32_t first_measurement_clock; |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
79 // last_measurement_clock is redundant but checks that we're not missing |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
80 // samples |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
81 static uint32_t last_measurement_clock; |
| 0 | 82 |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
83 // boolean flags |
| 17 | 84 static uint8_t need_measurement; |
| 85 static uint8_t need_comms; | |
| 40 | 86 static uint8_t uart_enabled; |
| 1 | 87 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
88 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0 |
| 17 | 89 static uint8_t comms_timeout; |
| 1 | 90 |
| 17 | 91 static uint8_t readpos; |
| 0 | 92 static char readbuf[30]; |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
93 static uint8_t have_cmd; |
| 0 | 94 |
| 33 | 95 static uint16_t measure_count; |
| 17 | 96 static uint16_t comms_count; |
| 97 | |
| 98 static uint32_t clock_epoch; | |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
99 |
| 13 | 100 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ |
| 101 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 102 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 103 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 104 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 105 | |
| 106 #define EXPECT_MAGIC 0x67c9 | |
| 107 | |
| 108 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 109 uint16_t magic; | |
| 110 uint8_t n_sensors; | |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
111 uint8_t sensor_id[MAX_SENSORS][ID_LEN]; |
| 13 | 112 }; |
| 113 | |
| 8 | 114 #define DEBUG(str) printf_P(PSTR(str)) |
| 115 | |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
116 static void deep_sleep(); |
| 1 | 117 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
118 // Very first setup |
| 18 | 119 static void |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
120 setup_chip() |
| 18 | 121 { |
|
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
122 cli(); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
123 |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
124 // stop watchdog timer (might have been used to cause a reset) |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
125 wdt_reset(); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
126 MCUSR &= ~_BV(WDRF); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
127 WDTCSR |= _BV(WDCE) | _BV(WDE); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
128 WDTCSR = 0; |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
129 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
130 // Set clock to 2mhz |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
131 CLKPR = _BV(CLKPCE); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
132 // divide by 4 |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
133 CLKPR = _BV(CLKPS1); |
|
52
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
134 |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
135 // enable pullups |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
136 PORTB = 0xff; // XXX change when using SPI |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
137 PORTD = 0xff; |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
138 PORTC = 0xff; |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
139 |
| 19 | 140 // 3.3v power for bluetooth and SD |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
141 DDR_LED |= _BV(PIN_LED); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
142 DDR_SHDN |= _BV(PIN_SHDN); |
| 19 | 143 |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
144 // set pullup |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
145 PORTD |= _BV(PD2); |
| 41 | 146 // INT0 setup |
|
52
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
147 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? |
| 41 | 148 EIMSK = _BV(INT0); |
|
52
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
149 |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
150 // comparator disable |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
151 ACSR = _BV(ACD); |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
152 |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
153 // disable adc pin input buffers |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
154 DIDR0 = 0x3F; // acd0-adc5 |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
155 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
156 |
|
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
157 sei(); |
| 18 | 158 } |
| 159 | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
160 static void |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
161 set_aux_power(uint8_t on) |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
162 { |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
163 if (on) |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
164 { |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
165 PORT_SHDN &= ~_BV(PIN_SHDN); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
166 } |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
167 else |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
168 { |
| 44 | 169 PORT_SHDN |= _BV(PIN_SHDN); |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
170 } |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
171 } |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
172 |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
173 static void |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
174 setup_tick_counter() |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
175 { |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
176 // set up counter2. |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
177 // COM21 COM20 Set OC2 on Compare Match (p116) |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
178 // WGM21 Clear counter on compare |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
179 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
180 // toggle on match |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
181 TCCR2A = _BV(COM2A0); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
182 // CS22 CS21 CS20 clk/1024 |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
183 TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
184 // set async mode |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
185 ASSR |= _BV(AS2); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
186 TCNT2 = 0; |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
187 OCR2A = SLEEP_COMPARE; |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
188 // interrupt |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
189 TIMSK2 = _BV(OCIE2A); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
190 } |
| 18 | 191 |
| 0 | 192 static void |
| 7 | 193 uart_on() |
| 0 | 194 { |
| 8 | 195 // Power reduction register |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
196 PRR &= ~_BV(PRUSART0); |
| 8 | 197 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
198 // All of this needs to be done each time after turning off the PRR |
| 0 | 199 // baud rate |
| 7 | 200 UBRR0H = (unsigned char)(UBRR >> 8); |
| 201 UBRR0L = (unsigned char)UBRR; | |
| 202 // set 2x clock, improves accuracy of UBRR | |
| 203 UCSR0A |= _BV(U2X0); | |
| 6 | 204 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); |
| 0 | 205 //8N1 |
| 7 | 206 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); |
| 41 | 207 uart_enabled = 1; |
| 6 | 208 } |
| 209 | |
| 210 static void | |
| 211 uart_off() | |
| 212 { | |
| 213 // Turn of interrupts and disable tx/rx | |
| 214 UCSR0B = 0; | |
| 41 | 215 uart_enabled = 0; |
| 6 | 216 |
| 217 // Power reduction register | |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
218 PRR |= _BV(PRUSART0); |
| 0 | 219 } |
| 220 | |
| 10 | 221 int |
| 0 | 222 uart_putchar(char c, FILE *stream) |
| 223 { | |
| 41 | 224 if (!uart_enabled) |
| 225 { | |
| 226 return EOF; | |
| 227 } | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
228 // XXX could perhaps sleep in the loop for power. |
| 8 | 229 if (c == '\n') |
| 230 { | |
| 10 | 231 loop_until_bit_is_set(UCSR0A, UDRE0); |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
232 UDR0 = '\r'; |
| 8 | 233 } |
| 2 | 234 loop_until_bit_is_set(UCSR0A, UDRE0); |
| 235 UDR0 = c; | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
236 if (stream == crc_stdout) |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
237 { |
|
26
d3e5934fe55c
- Move crc16 to utils and fix it
Matt Johnston <matt@ucc.asn.au>
parents:
25
diff
changeset
|
238 crc_out = _crc_ccitt_update(crc_out, c); |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
239 } |
| 10 | 240 if (c == '\r') |
| 241 { | |
| 242 loop_until_bit_is_set(UCSR0A, UDRE0); | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
243 UDR0 = '\n'; |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
244 if (stream == crc_stdout) |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
245 { |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
246 crc_out = _crc_ccitt_update(crc_out, '\n'); |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
247 } |
| 10 | 248 } |
| 40 | 249 return (unsigned char)c; |
| 0 | 250 } |
| 251 | |
| 252 static void | |
| 253 cmd_fetch() | |
| 254 { | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
255 crc_out = 0; |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
256 uint8_t n_sensors; |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
257 eeprom_read(n_sensors, n_sensors); |
| 13 | 258 |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
259 uint16_t millivolt_vcc, int_temp; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
260 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
261 adc_internal(&millivolt_vcc, &int_temp); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
262 |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
263 fprintf_P(crc_stdout, PSTR("START\n")); |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
264 fprintf_P(crc_stdout, PSTR("now=%lu\n" |
|
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
265 "time_step=%hu\n" |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
266 "first_time=%lu\n" |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
267 "last_time=%lu\n" |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
268 "voltage=%hu\n" |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
269 "avrtemp=%hu\n"), |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
270 clock_epoch, |
|
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
271 (uint16_t)MEASURE_WAKE, |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
272 first_measurement_clock, |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
273 last_measurement_clock, |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
274 millivolt_vcc, |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
275 int_temp |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
276 ); |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
277 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors); |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
278 for (uint8_t s = 0; s < n_sensors; s++) |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
279 { |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
280 uint8_t id[ID_LEN]; |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
281 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s); |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
282 eeprom_read_to(id, sensor_id[s], ID_LEN); |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
283 printhex(id, ID_LEN, crc_stdout); |
|
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
284 fputc('\n', crc_stdout); |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
285 } |
|
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
286 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements); |
| 14 | 287 for (uint16_t n = 0; n < n_measurements; n++) |
| 0 | 288 { |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
289 fprintf_P(crc_stdout, PSTR("meas%hu="), n); |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
290 for (uint8_t s = 0; s < n_sensors; s++) |
| 13 | 291 { |
|
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
292 fprintf_P(crc_stdout, PSTR(" %hu"), measurements[n][s]); |
| 13 | 293 } |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
294 fputc('\n', crc_stdout); |
| 0 | 295 } |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
296 fprintf_P(crc_stdout, PSTR("END\n")); |
|
25
2943f62c8e62
- Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents:
24
diff
changeset
|
297 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out); |
| 0 | 298 } |
| 299 | |
| 300 static void | |
| 301 cmd_clear() | |
| 302 { | |
| 7 | 303 n_measurements = 0; |
| 32 | 304 printf_P(PSTR("cleared\n")); |
| 0 | 305 } |
| 306 | |
| 307 static void | |
| 308 cmd_btoff() | |
| 309 { | |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
310 comms_count = 0; |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
311 printf_P(PSTR("off:%hu\n"), COMMS_WAKE); |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
312 _delay_ms(100); |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
313 comms_timeout = 0; |
| 0 | 314 } |
| 315 | |
| 316 static void | |
|
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
317 cmd_awake() |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
318 { |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
319 comms_timeout = WAKE_SECS; |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
320 printf_P(PSTR("awake %hu\n"), WAKE_SECS); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
321 } |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
322 |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
323 static void |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
324 cmd_reset() |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
325 { |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
326 printf_P(PSTR("reset\n")); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
327 _delay_ms(100); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
328 cli(); // disable interrupts |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
329 wdt_enable(WDTO_15MS); // enable watchdog |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
330 while(1); // wait for watchdog to reset processor |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
331 } |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
332 |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
333 static void |
| 12 | 334 cmd_measure() |
| 335 { | |
| 33 | 336 printf_P(PSTR("measuring\n")); |
| 12 | 337 need_measurement = 1; |
| 338 } | |
| 339 | |
| 340 static void | |
| 341 cmd_sensors() | |
| 342 { | |
| 343 uint8_t ret = simple_ds18b20_start_meas(NULL); | |
| 14 | 344 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret); |
| 345 long_delay(DS18B20_TCONV_12BIT); | |
| 12 | 346 simple_ds18b20_read_all(); |
| 347 } | |
| 348 | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
349 #if 0 |
| 13 | 350 // 0 on success |
| 351 static uint8_t | |
| 352 get_hex_string(const char *hex, uint8_t *out, uint8_t size) | |
| 353 { | |
| 354 uint8_t upper; | |
| 355 uint8_t o; | |
| 356 for (uint8_t i = 0, z = 0; o < size; i++) | |
| 357 { | |
| 358 uint8_t h = hex[i]; | |
| 359 if (h >= 'A' && h <= 'F') | |
| 360 { | |
| 361 // lower case | |
| 362 h += 0x20; | |
| 363 } | |
| 364 uint8_t nibble; | |
| 365 if (h >= '0' && h <= '9') | |
| 366 { | |
| 367 nibble = h - '0'; | |
| 368 } | |
| 369 else if (h >= 'a' && h <= 'f') | |
| 370 { | |
| 371 nibble = 10 + h - 'a'; | |
| 372 } | |
| 373 else if (h == ' ' || h == ':') | |
| 374 { | |
| 375 continue; | |
| 376 } | |
| 377 else | |
| 378 { | |
| 379 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]); | |
| 380 return 1; | |
| 381 } | |
| 382 | |
| 383 if (z % 2 == 0) | |
| 384 { | |
| 385 upper = nibble << 4; | |
| 386 } | |
| 387 else | |
| 388 { | |
| 389 out[o] = upper | nibble; | |
| 390 o++; | |
| 391 } | |
| 392 | |
| 393 z++; | |
| 394 } | |
| 395 | |
| 396 if (o != size) | |
| 397 { | |
| 398 printf_P(PSTR("Short hex\n")); | |
| 399 return 1; | |
| 400 } | |
| 401 return 0; | |
| 402 } | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
403 #endif |
| 13 | 404 |
| 405 static void | |
| 406 add_sensor(uint8_t *id) | |
| 407 { | |
| 408 uint8_t n; | |
| 409 eeprom_read(n, n_sensors); | |
| 410 if (n < MAX_SENSORS) | |
| 411 { | |
| 412 cli(); | |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
413 eeprom_write_from(id, sensor_id[n], ID_LEN); |
| 13 | 414 n++; |
| 415 eeprom_write(n, n_sensors); | |
| 416 sei(); | |
| 417 printf_P(PSTR("Added sensor %d : "), n); | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
418 printhex(id, ID_LEN, stdout); |
| 13 | 419 putchar('\n'); |
| 420 } | |
| 421 else | |
| 422 { | |
| 423 printf_P(PSTR("Too many sensors\n")); | |
| 424 } | |
| 425 } | |
| 426 | |
| 427 static void | |
| 428 cmd_add_all() | |
| 429 { | |
| 41 | 430 uint8_t id[OW_ROMCODE_SIZE]; |
| 13 | 431 printf_P("Adding all\n"); |
| 432 ow_reset(); | |
| 41 | 433 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; ) |
| 434 { | |
| 435 diff = ow_rom_search( diff, &id[0] ); | |
| 436 if( diff == OW_PRESENCE_ERR ) { | |
| 437 printf_P( PSTR("No Sensor found\r") ); | |
| 438 return; | |
| 439 } | |
| 440 | |
| 441 if( diff == OW_DATA_ERR ) { | |
| 442 printf_P( PSTR("Bus Error\r") ); | |
| 443 return; | |
| 444 } | |
| 13 | 445 add_sensor(id); |
| 446 } | |
| 447 } | |
| 448 | |
| 449 static void | |
| 450 cmd_init() | |
| 451 { | |
| 452 printf_P(PSTR("Resetting sensor list\n")); | |
| 453 uint8_t zero = 0; | |
| 454 cli(); | |
| 455 eeprom_write(zero, n_sensors); | |
| 456 sei(); | |
| 457 printf_P(PSTR("Done.\n")); | |
| 458 } | |
| 459 | |
| 460 static void | |
| 461 check_first_startup() | |
| 462 { | |
| 463 uint16_t magic; | |
| 464 eeprom_read(magic, magic); | |
| 465 if (magic != EXPECT_MAGIC) | |
| 466 { | |
| 467 printf_P(PSTR("First boot, looking for sensors...\n")); | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
468 // in case of power fumbles don't want to reset during eeprom write, |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
469 long_delay(2); |
| 13 | 470 cmd_init(); |
| 471 cmd_add_all(); | |
| 14 | 472 cli(); |
| 473 magic = EXPECT_MAGIC; | |
| 474 eeprom_write(magic, magic); | |
| 475 sei(); | |
| 13 | 476 } |
| 477 } | |
| 478 | |
| 12 | 479 static void |
| 0 | 480 read_handler() |
| 481 { | |
| 6 | 482 if (strcmp_P(readbuf, PSTR("fetch")) == 0) |
| 0 | 483 { |
| 484 cmd_fetch(); | |
| 485 } | |
| 6 | 486 else if (strcmp_P(readbuf, PSTR("clear")) == 0) |
| 0 | 487 { |
| 488 cmd_clear(); | |
| 489 } | |
| 6 | 490 else if (strcmp_P(readbuf, PSTR("btoff")) == 0) |
| 0 | 491 { |
| 492 cmd_btoff(); | |
| 493 } | |
| 12 | 494 else if (strcmp_P(readbuf, PSTR("measure")) == 0) |
| 495 { | |
| 496 cmd_measure(); | |
| 497 } | |
| 498 else if (strcmp_P(readbuf, PSTR("sensors")) == 0) | |
| 499 { | |
| 500 cmd_sensors(); | |
| 501 } | |
| 13 | 502 else if (strcmp_P(readbuf, PSTR("addall"))== 0) |
| 503 { | |
| 504 cmd_add_all(); | |
| 505 } | |
|
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
506 else if (strcmp_P(readbuf, PSTR("awake"))== 0) |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
507 { |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
508 cmd_awake(); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
509 } |
| 13 | 510 else if (strcmp_P(readbuf, PSTR("init")) == 0) |
| 511 { | |
| 512 cmd_init(); | |
| 513 } | |
|
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
514 else if (strcmp_P(readbuf, PSTR("reset")) == 0) |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
515 { |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
516 cmd_reset(); |
|
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
517 } |
| 0 | 518 else |
| 519 { | |
| 6 | 520 printf_P(PSTR("Bad command\n")); |
| 0 | 521 } |
| 522 } | |
| 523 | |
|
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
524 ISR(INT0_vect) |
| 18 | 525 { |
| 41 | 526 need_comms = 1; |
|
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
527 comms_timeout = WAKE_SECS; |
|
24
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
528 blink(); |
|
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
529 _delay_ms(100); |
|
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
530 blink(); |
| 18 | 531 } |
| 532 | |
| 533 | |
| 2 | 534 ISR(USART_RX_vect) |
| 0 | 535 { |
| 2 | 536 char c = UDR0; |
| 33 | 537 #ifdef HAVE_UART_ECHO |
| 12 | 538 uart_putchar(c, NULL); |
| 33 | 539 #endif |
|
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
540 if (c == '\r' || c == '\n') |
| 0 | 541 { |
|
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
542 if (readpos > 0) |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
543 { |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
544 readbuf[readpos] = '\0'; |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
545 have_cmd = 1; |
|
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
546 readpos = 0; |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
547 } |
| 0 | 548 } |
| 549 else | |
| 550 { | |
| 551 readbuf[readpos] = c; | |
| 552 readpos++; | |
| 553 if (readpos >= sizeof(readbuf)) | |
| 554 { | |
| 555 readpos = 0; | |
| 556 } | |
| 557 } | |
| 558 } | |
| 559 | |
| 2 | 560 ISR(TIMER2_COMPA_vect) |
| 1 | 561 { |
| 14 | 562 TCNT2 = 0; |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
563 measure_count ++; |
| 41 | 564 comms_count ++; |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
565 |
| 17 | 566 clock_epoch ++; |
| 567 | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
568 if (comms_timeout != 0) |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
569 { |
| 44 | 570 comms_timeout--; |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
571 } |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
572 |
| 14 | 573 if (measure_count >= MEASURE_WAKE) |
| 1 | 574 { |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
575 measure_count = 0; |
| 1 | 576 need_measurement = 1; |
| 577 } | |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
578 |
| 41 | 579 if (comms_count >= COMMS_WAKE) |
| 580 { | |
| 581 comms_count = 0; | |
| 582 need_comms = 1; | |
| 583 } | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
584 |
| 1 | 585 } |
| 586 | |
| 3 | 587 DWORD get_fattime (void) |
| 588 { | |
| 589 return 0; | |
| 590 } | |
| 591 | |
| 1 | 592 static void |
| 593 deep_sleep() | |
| 594 { | |
| 595 // p119 of manual | |
| 2 | 596 OCR2A = SLEEP_COMPARE; |
| 597 loop_until_bit_is_clear(ASSR, OCR2AUB); | |
| 1 | 598 |
| 599 set_sleep_mode(SLEEP_MODE_PWR_SAVE); | |
| 600 sleep_mode(); | |
| 601 } | |
| 602 | |
| 603 static void | |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
604 idle_sleep() |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
605 { |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
606 set_sleep_mode(SLEEP_MODE_IDLE); |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
607 sleep_mode(); |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
608 } |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
609 |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
610 static void |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
611 adc_internal(uint16_t *millivolt_vcc, uint16_t *int_temp) |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
612 { |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
613 PRR &= ~_BV(PRADC); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
614 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
615 // left adjust |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
616 ADMUX = _BV(ADLAR); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
617 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
618 // ADPS2 = /16 prescaler, 62khz at 1mhz clock |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
619 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
620 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
621 // set to measure 1.1 reference |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
622 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
623 ADCSRA |= _BV(ADSC); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
624 loop_until_bit_is_clear(ADCSRA, ADSC); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
625 uint8_t low_11 = ADCL; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
626 uint8_t high_11 = ADCH; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
627 uint16_t f_11 = low_11 + (high_11 << 8); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
628 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
629 float res_volts = 1.1 * 1024 / f_11; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
630 *millivolt_vcc = 1000 * res_volts; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
631 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
632 // measure AVR internal temperature against 1.1 ref. |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
633 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(REFS1) | _BV(REFS0); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
634 ADCSRA |= _BV(ADSC); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
635 loop_until_bit_is_clear(ADCSRA, ADSC); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
636 uint16_t res_internal = ADCL; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
637 res_internal |= ADCH << 8; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
638 float internal_volts = res_internal * (1.1 / 1024.0); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
639 // decidegrees |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
640 *int_temp = (internal_volts - 2.73) * 1000; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
641 |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
642 PRR |= _BV(PRADC); |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
643 ADCSRA = 0; |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
644 } |
|
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
645 |
| 14 | 646 #if 0 |
| 647 // untested | |
| 6 | 648 static void |
| 649 do_adc_335() | |
| 650 { | |
| 8 | 651 //PRR &= ~_BV(PRADC); |
| 6 | 652 |
| 653 ADMUX = _BV(ADLAR); | |
| 654 | |
| 655 // ADPS2 = /16 prescaler, 62khz at 1mhz clock | |
| 656 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 657 | |
| 658 // measure value | |
| 659 ADCSRA |= _BV(ADSC); | |
| 660 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 661 uint8_t low = ADCL; | |
| 662 uint8_t high = ADCH; | |
| 663 uint16_t f_measure = low + (high << 8); | |
| 664 | |
| 665 // set to measure 1.1 reference | |
| 666 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 667 ADCSRA |= _BV(ADSC); | |
| 668 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 669 uint8_t low_11 = ADCL; | |
| 670 uint8_t high_11 = ADCH; | |
| 671 uint16_t f_11 = low_11 + (high_11 << 8); | |
| 672 | |
| 673 float res_volts = 1.1 * f_measure / f_11; | |
| 674 | |
| 675 // 10mV/degree | |
| 676 // scale to 1/5 degree units above 0C | |
| 677 int temp = (res_volts - 2.73) * 500; | |
| 13 | 678 // XXX fixme |
| 679 //measurements[n_measurements] = temp; | |
| 6 | 680 // XXX something if it hits the limit |
| 681 | |
| 682 // measure AVR internal temperature against 1.1 ref. | |
| 683 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(REFS1) | _BV(REFS0); | |
| 684 ADCSRA |= _BV(ADSC); | |
| 685 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 686 uint16_t res_internal = ADCL; | |
| 687 res_internal |= ADCH << 8; | |
| 688 | |
| 689 float internal_volts = res_internal * (1.1 / 1024.0); | |
| 690 | |
| 691 // 1mV/degree | |
| 692 int internal_temp = (internal_volts - 2.73) * 5000; | |
| 13 | 693 // XXX fixme |
| 694 //internal_measurements[n_measurements] = internal_temp; | |
| 6 | 695 |
| 696 printf_P("measure %d: external %d, internal %d, 1.1 %d\n", | |
| 697 n_measurements, temp, internal_temp, f_11); | |
| 698 | |
| 699 n_measurements++; | |
| 8 | 700 //PRR |= _BV(PRADC); |
| 6 | 701 } |
| 14 | 702 #endif |
| 6 | 703 |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
704 static void |
| 1 | 705 do_measurement() |
| 706 { | |
| 13 | 707 uint8_t n_sensors; |
| 708 eeprom_read(n_sensors, n_sensors); | |
| 709 | |
|
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
710 simple_ds18b20_start_meas(NULL); |
| 13 | 711 _delay_ms(DS18B20_TCONV_12BIT); |
| 712 | |
| 713 if (n_measurements == NUM_MEASUREMENTS) | |
| 714 { | |
| 715 n_measurements = 0; | |
| 716 } | |
| 6 | 717 |
| 14 | 718 for (uint8_t s = 0; s < MAX_SENSORS; s++) |
| 13 | 719 { |
| 720 int16_t decicelsius; | |
| 14 | 721 if (s >= n_sensors) |
| 13 | 722 { |
| 723 decicelsius = VALUE_NOSENSOR; | |
| 724 } | |
| 725 else | |
| 726 { | |
|
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
727 uint8_t id[ID_LEN]; |
|
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
728 eeprom_read_to(id, sensor_id[s], ID_LEN); |
| 13 | 729 |
| 730 uint8_t ret = simple_ds18b20_read_decicelsius(id, &decicelsius); | |
| 731 if (ret != DS18X20_OK) | |
| 732 { | |
| 733 decicelsius = VALUE_BROKEN; | |
| 734 } | |
| 735 } | |
| 14 | 736 measurements[n_measurements][s] = decicelsius; |
| 13 | 737 } |
|
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
738 |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
739 if (n_measurements == 0) |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
740 { |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
741 first_measurement_clock = clock_epoch; |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
742 } |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
743 last_measurement_clock = clock_epoch; |
|
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
744 |
| 14 | 745 n_measurements++; |
| 12 | 746 //do_adc_335(); |
| 1 | 747 } |
| 748 | |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
749 static void |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
750 do_comms() |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
751 { |
| 41 | 752 // turn on bluetooth |
|
24
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
753 set_aux_power(1); |
| 7 | 754 uart_on(); |
| 41 | 755 |
| 756 // write sd card here? same 3.3v regulator... | |
| 757 | |
| 758 for (comms_timeout = WAKE_SECS; comms_timeout > 0; ) | |
| 759 { | |
| 6 | 760 if (need_measurement) |
| 761 { | |
| 14 | 762 need_measurement = 0; |
| 6 | 763 do_measurement(); |
| 44 | 764 continue; |
| 6 | 765 } |
| 766 | |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
767 if (have_cmd) |
|
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
768 { |
|
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
769 have_cmd = 0; |
|
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
770 read_handler(); |
| 44 | 771 continue; |
|
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
772 } |
|
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
773 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
774 // wait for commands from the master |
| 41 | 775 idle_sleep(); |
| 776 } | |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
777 |
| 6 | 778 uart_off(); |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
779 // in case bluetooth takes time to flush |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
780 _delay_ms(100); |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
781 set_aux_power(0); |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
782 } |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
783 |
| 7 | 784 static void |
| 785 blink() | |
| 786 { | |
| 787 PORT_LED &= ~_BV(PIN_LED); | |
| 9 | 788 _delay_ms(1); |
| 7 | 789 PORT_LED |= _BV(PIN_LED); |
| 790 } | |
| 791 | |
| 792 static void | |
| 793 long_delay(int ms) | |
| 794 { | |
| 795 int iter = ms / 100; | |
| 796 | |
| 797 for (int i = 0; i < iter; i++) | |
| 798 { | |
| 799 _delay_ms(100); | |
| 800 } | |
| 801 } | |
| 802 | |
| 8 | 803 ISR(BADISR_vect) |
| 804 { | |
| 14 | 805 //uart_on(); |
| 8 | 806 printf_P(PSTR("Bad interrupt\n")); |
| 807 } | |
| 808 | |
| 0 | 809 int main(void) |
| 810 { | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
811 setup_chip(); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
812 blink(); |
| 9 | 813 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
814 set_aux_power(0); |
| 7 | 815 |
| 6 | 816 stdout = &mystdout; |
| 7 | 817 uart_on(); |
| 818 | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
819 printf(PSTR("Started.\n")); |
| 13 | 820 |
| 821 check_first_startup(); | |
| 822 | |
| 8 | 823 uart_off(); |
| 0 | 824 |
| 6 | 825 // turn off everything except timer2 |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
826 PRR = _BV(PRTWI) | _BV(PRTIM0) | _BV(PRTIM1) | _BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC); |
| 8 | 827 |
| 828 // for testing | |
| 829 uart_on(); | |
| 830 | |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
831 setup_tick_counter(); |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
832 |
| 12 | 833 sei(); |
| 8 | 834 |
|
25
2943f62c8e62
- Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents:
24
diff
changeset
|
835 need_comms = 1; |
|
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
836 need_measurement = 1; |
|
25
2943f62c8e62
- Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents:
24
diff
changeset
|
837 |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
838 for(;;) |
|
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
839 { |
| 1 | 840 if (need_measurement) |
| 841 { | |
| 14 | 842 need_measurement = 0; |
| 1 | 843 do_measurement(); |
| 41 | 844 continue; |
| 1 | 845 } |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
846 |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
847 if (need_comms) |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
848 { |
|
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
849 need_comms = 0; |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
850 do_comms(); |
| 41 | 851 continue; |
|
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
852 } |
|
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
853 |
| 41 | 854 deep_sleep(); |
|
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
855 if (clock_epoch % 60 == 0) |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
856 { |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
857 blink(); |
|
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
858 } |
| 0 | 859 } |
| 12 | 860 |
| 0 | 861 return 0; /* never reached */ |
| 862 } |