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1 #include <stdio.h> |
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2 #include <string.h> |
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3 #include <stddef.h> |
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4 #include <stdbool.h> |
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5 #include <stdlib.h> |
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6 #include <avr/io.h> |
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7 #include <avr/interrupt.h> |
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8 #include <avr/sleep.h> |
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9 #include <util/delay.h> |
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10 #include <avr/pgmspace.h> |
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11 #include <avr/eeprom.h> |
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12 #include <avr/wdt.h> |
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13 #include <util/atomic.h> |
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14 #include <util/crc16.h> |
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15 |
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16 #include "hmac-sha1.h" |
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17 #include "aes.h" |
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18 |
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19 //#include "simple_ds18b20.h" |
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20 //#include "onewire.h" |
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21 |
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22 LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); |
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23 |
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24 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
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25 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) |
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26 |
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27 // TICK should be 8 or less (8 untested). all timers need |
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28 // to be a multiple. |
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29 |
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30 #define TICK 1 |
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31 #define SLEEP_COMPARE (2000000/64) // == 31250 exactly |
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32 #define NKEYS 10 |
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33 #define HMACLEN 20 |
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34 #define AESLEN 16 |
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35 #define KEYLEN HMACLEN |
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36 |
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37 #define BAUD 19200 |
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38 #define UBRR ((F_CPU)/8/(BAUD)-1) |
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39 |
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40 #define PORT_PI_BOOT PORTD |
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41 #define DDR_PI_BOOT DDRD |
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4
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42 #define PIN_PI_BOOT PD5 |
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43 |
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44 #define PORT_PI_RESET PORTD |
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45 #define DDR_PI_RESET DDRD |
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46 #define PIN_PI_RESET PD6 |
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47 |
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48 #define PORT_LED PORTD |
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49 #define DDR_LED DDRD |
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50 #define PIN_LED PD7 |
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51 |
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52 // #define HAVE_UART_ECHO |
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53 |
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7
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54 // stores a value of clock_epoch combined with the remainder of TCNT1, |
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55 // for 1/32 second accuracy |
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56 struct epoch_ticks |
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57 { |
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58 uint32_t ticks; |
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59 // remainder |
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60 uint8_t rem; |
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61 }; |
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62 |
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63 // eeprom-settable parameters, default values defined here. |
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64 // all timeouts should be a multiple of TICK |
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65 static uint32_t watchdog_long_limit = (60L*60*24); |
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66 static uint32_t watchdog_short_limit = 0; |
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67 static uint32_t newboot_limit = 60*10; |
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68 |
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69 // avr proves itself |
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70 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
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71 |
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72 // ---- Atomic guards required accessing these variables |
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73 // clock_epoch in seconds |
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74 static uint32_t clock_epoch; |
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75 // watchdog counts up |
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76 static uint32_t watchdog_long_count; |
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77 static uint32_t watchdog_short_count; |
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78 // newboot counts down |
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79 static uint32_t newboot_count; |
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80 // oneshot counts down |
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81 static uint32_t oneshot_count; |
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82 |
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83 // ---- End atomic guards required |
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84 |
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85 // boolean flags |
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86 static uint8_t watchdog_long_hit; |
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87 static uint8_t watchdog_short_hit; |
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88 static uint8_t newboot_hit; |
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89 static uint8_t oneshot_hit; |
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90 |
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91 static uint8_t readpos; |
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92 static char readbuf[50]; |
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93 static uint8_t have_cmd; |
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94 |
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95 int uart_putchar(char c, FILE *stream); |
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96 static void long_delay(int ms); |
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97 static void blink(); |
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98 static uint16_t adc_vcc(); |
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99 static void set_pi_boot_normal(uint8_t normal); |
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100 |
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101 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
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102 _FDEV_SETUP_WRITE); |
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103 |
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104 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ |
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105 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) |
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106 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) |
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107 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) |
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108 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } |
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109 |
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110 #define EXPECT_MAGIC 0xdf83 |
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111 |
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112 struct __attribute__ ((__packed__)) __eeprom_data { |
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113 uint32_t watchdog_long_limit; |
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114 uint32_t watchdog_short_limit; |
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115 uint32_t newboot_limit; |
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116 |
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117 uint8_t avr_keys[NKEYS][KEYLEN]; |
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118 |
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119 uint16_t magic; |
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120 }; |
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121 |
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122 // Very first setup |
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123 static void |
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124 setup_chip() |
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125 { |
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126 cli(); |
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127 |
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128 // stop watchdog timer (might have been used to cause a reset) |
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129 wdt_reset(); |
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130 MCUSR &= ~_BV(WDRF); |
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131 WDTCSR |= _BV(WDCE) | _BV(WDE); |
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132 WDTCSR = 0; |
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133 |
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134 // set to 8S, in case sha1 is slow etc. |
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135 wdt_enable(WDTO_8S); |
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136 |
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137 // Set clock to 2mhz |
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138 CLKPR = _BV(CLKPCE); |
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139 CLKPR = _BV(CLKPS1); |
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140 |
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141 // enable pullups |
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142 // XXX matt pihelp |
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143 //PORTB = 0xff; // XXX change when using SPI |
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144 //PORTD = 0xff; |
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145 //PORTC = 0xff; |
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146 |
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147 // 3.3v power for bluetooth and SD |
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148 DDR_LED |= _BV(PIN_LED); |
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149 |
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150 #if 0 |
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151 // set pullup |
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152 PORTD |= _BV(PD2); |
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153 // INT0 setup |
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154 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? |
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155 EIMSK = _BV(INT0); |
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156 #endif |
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157 |
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158 // comparator disable |
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159 ACSR = _BV(ACD); |
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160 |
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161 // disable adc pin input buffers |
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162 DIDR0 = 0x3F; // acd0-adc5 |
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163 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 |
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164 |
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165 sei(); |
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166 } |
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167 |
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168 static void |
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169 get_epoch_ticks(struct epoch_ticks *t) |
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170 { |
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171 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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172 { |
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173 t->ticks = clock_epoch; |
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174 t->rem = TCNT1; |
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175 } |
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176 } |
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177 |
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178 static void |
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179 setup_tick_counter() |
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180 { |
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181 // set up counter1 |
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182 |
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183 // set up counter2. |
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184 // COM21 COM20 Set OC2 on Compare Match (p116) |
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185 // WGM21 Clear counter on compare |
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186 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); |
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187 // toggle on match |
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188 TCCR1A = _BV(COM1A0); |
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189 #ifdef SIM_DEBUG |
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190 // systemclock/8 |
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191 TCCR1B = _BV(CS11); |
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192 #else |
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193 // systemclock/64 |
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194 TCCR1B = _BV(CS11) | _BV(CS10); |
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195 #endif |
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196 TCNT1 = 0; |
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197 OCR1A = SLEEP_COMPARE; |
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198 // interrupt |
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199 TIMSK1 = _BV(OCIE1A); |
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200 } |
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201 |
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202 static void |
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203 uart_on() |
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204 { |
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205 // Power reduction register |
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206 PRR &= ~_BV(PRUSART0); |
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207 |
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208 // All of this needs to be done each time after turning off the PRR |
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209 // baud rate |
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210 UBRR0H = (unsigned char)(UBRR >> 8); |
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211 UBRR0L = (unsigned char)UBRR; |
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212 // set 2x clock, improves accuracy of UBRR |
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213 UCSR0A |= _BV(U2X0); |
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214 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); |
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215 //8N1 |
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216 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); |
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217 } |
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218 |
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219 static void |
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220 uart_off() |
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221 { |
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222 // Turn off interrupts and disable tx/rx |
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223 UCSR0B = 0; |
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224 |
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225 // Power reduction register |
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226 PRR |= _BV(PRUSART0); |
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227 } |
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228 |
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229 int |
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230 uart_putchar(char c, FILE *stream) |
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231 { |
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232 // XXX could perhaps sleep in the loop for power. |
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233 if (c == '\n') |
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234 { |
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235 loop_until_bit_is_set(UCSR0A, UDRE0); |
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236 UDR0 = '\r'; |
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237 } |
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238 loop_until_bit_is_set(UCSR0A, UDRE0); |
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239 UDR0 = c; |
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240 if (c == '\r') |
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241 { |
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242 loop_until_bit_is_set(UCSR0A, UDRE0); |
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243 UDR0 = '\n'; |
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244 } |
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245 return (unsigned char)c; |
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246 } |
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247 |
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248 static void |
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249 cmd_reset() |
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250 { |
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251 printf_P(PSTR("reset\n")); |
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252 _delay_ms(100); |
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253 cli(); // disable interrupts |
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254 wdt_enable(WDTO_15MS); // enable watchdog |
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255 while(1); // wait for watchdog to reset processor |
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256 } |
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257 |
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258 static void |
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259 cmd_newboot() |
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260 { |
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261 set_pi_boot_normal(1); |
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262 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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263 { |
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264 newboot_count = newboot_limit; |
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265 } |
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266 printf_P(PSTR("newboot for %d secs"), newboot_limit); |
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267 } |
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268 |
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269 |
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270 |
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271 static void |
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272 cmd_get_params() |
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273 { |
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274 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
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275 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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276 { |
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277 cur_watchdog_long = watchdog_long_count; |
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278 cur_watchdog_short = watchdog_short_count; |
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279 cur_newboot = newboot_count; |
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280 cur_oneshot = oneshot_count; |
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281 } |
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282 |
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283 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu) oneshot (%lu)\n"), |
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284 watchdog_long_limit, |
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285 cur_watchdog_long, |
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286 watchdog_short_limit, |
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287 cur_watchdog_short, |
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288 newboot_limit, |
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289 cur_newboot, |
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290 cur_oneshot); |
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291 } |
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292 |
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293 static void |
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294 cmd_set_params(const char *params) |
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295 { |
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296 uint32_t new_watchdog_long_limit; |
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297 uint32_t new_watchdog_short_limit; |
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298 uint32_t new_newboot_limit; |
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299 |
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300 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), |
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301 &new_watchdog_long_limit, |
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302 &new_watchdog_short_limit, |
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303 &new_newboot_limit); |
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304 |
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305 |
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306 if (ret != 3) |
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307 { |
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1
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308 printf_P(PSTR("Bad values\n")); |
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309 } |
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310 else |
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311 { |
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312 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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313 { |
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314 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); |
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315 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); |
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316 eeprom_write(new_newboot_limit, newboot_limit); |
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317 uint16_t magic = EXPECT_MAGIC; |
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318 eeprom_write(magic, magic); |
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0
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319 } |
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1
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320 printf_P(PSTR("set_params for next boot\n")); |
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321 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), |
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322 new_watchdog_long_limit, |
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323 new_watchdog_short_limit, |
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324 new_newboot_limit); |
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325 |
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326 } |
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327 } |
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0
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328 |
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1
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329 uint8_t from_hex(char c) |
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330 { |
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331 if (c >= '0' && c <= '9') { |
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332 return c-'0'; |
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333 } |
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334 if (c >= 'a' && c <= 'f') { |
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335 return c-'a' + 0xa; |
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336 } |
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337 if (c >= 'A' && c <= 'F') { |
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338 return c-'A' + 0xa; |
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339 } |
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340 return 0; |
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341 } |
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342 |
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2
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343 static void |
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344 printhex_nibble(const unsigned char b, FILE *stream) |
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345 { |
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346 unsigned char c = b & 0x0f; |
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347 if ( c > 9 ) { |
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348 c += 'A'-10; |
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349 } |
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350 else { |
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351 c += '0'; |
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352 } |
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353 fputc(c, stream); |
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354 } |
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355 |
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356 void |
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357 printhex_byte(const unsigned char b, FILE *stream) |
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358 { |
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359 printhex_nibble( b >> 4, stream); |
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360 printhex_nibble( b, stream); |
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361 } |
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362 |
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363 void |
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364 printhex(uint8_t *id, uint8_t n, FILE *stream) |
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365 { |
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366 for (uint8_t i = 0; i < n; i++) |
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367 { |
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368 if (i > 0) |
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369 { |
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370 fputc(' ', stream); |
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371 } |
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372 printhex_byte(id[i], stream); |
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373 } |
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374 } |
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375 |
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376 static int8_t |
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5
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377 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
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378 uint8_t bytes_len) |
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2
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379 { |
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380 // "N HEXKEY" |
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5
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381 if (strlen(params) != bytes_len*2 + 2) { |
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2
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382 printf_P(PSTR("Wrong length key\n")); |
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383 return -1; |
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384 } |
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385 |
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386 if (params[1] != ' ') |
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387 { |
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388 printf_P(PSTR("Missing space\n")); |
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389 return -1; |
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390 } |
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391 |
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392 *key_index = from_hex(params[0]); |
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393 if (*key_index >= NKEYS) |
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394 { |
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395 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); |
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396 return -1; |
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397 } |
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398 |
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5
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399 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
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2
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400 { |
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401 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); |
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402 } |
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403 return 0; |
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404 } |
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405 |
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1
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406 static void |
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407 cmd_set_avr_key(const char *params) |
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408 { |
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2
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409 uint8_t new_key[KEYLEN]; |
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410 uint8_t key_index; |
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5
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411 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
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2
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412 { |
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1
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413 return; |
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0
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414 } |
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2
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415 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
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8
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416 #ifndef SIM_DEBUG |
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2
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417 eeprom_write(avr_keys, avr_keys); |
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8
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418 #endif |
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2
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419 } |
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420 |
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421 static void |
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422 cmd_hmac(const char *params) |
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423 { |
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7
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424 uint8_t indata[HMACLEN]; |
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425 uint8_t outdata[HMACLEN]; |
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2
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426 uint8_t key_index; |
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7
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427 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
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2
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428 { |
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429 printf_P(PSTR("FAIL: Bad input\n")); |
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5
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430 return; |
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2
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431 } |
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0
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432 |
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7
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433 if (key_index % 2 != 0) |
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5
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434 { |
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435 printf_P(PSTR("Only hmac with even keys\n")); |
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436 return; |
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437 } |
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438 |
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8
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439 #ifndef SIM_DEBUG |
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5
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440 long_delay(200); |
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8
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441 #endif |
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5
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442 |
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7
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443 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, HMACLEN*8); |
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2
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444 |
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445 printf_P(PSTR("HMAC: ")); |
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7
|
446 printhex(outdata, HMACLEN, stdout); |
|
5
|
447 fputc('\n', stdout); |
|
|
448 } |
|
|
449 |
|
|
450 static void |
|
|
451 cmd_decrypt(const char *params) |
|
|
452 { |
|
|
453 uint8_t data[HMACLEN+AESLEN]; |
|
|
454 uint8_t output[HMACLEN]; |
|
|
455 uint8_t key_index; |
|
|
456 if (parse_key(params, &key_index, data, sizeof(data)) != 0) |
|
|
457 { |
|
|
458 printf_P(PSTR("FAIL: Bad input\n")); |
|
|
459 return; |
|
|
460 } |
|
|
461 |
|
7
|
462 if (key_index % 2 == 0) |
|
5
|
463 { |
|
|
464 printf_P(PSTR("Only decrypt with odd keys\n")); |
|
|
465 return; |
|
|
466 } |
|
|
467 |
|
8
|
468 #ifndef SIM_DEBUG |
|
5
|
469 long_delay(200); |
|
8
|
470 #endif |
|
7
|
471 |
|
5
|
472 // check the signature |
|
8
|
473 hmac_sha1(output, avr_keys[key_index+1], KEYLEN*8, &data[HMACLEN], AESLEN*8); |
|
5
|
474 |
|
|
475 if (memcmp(output, data, HMACLEN) != 0) { |
|
|
476 printf_P(PSTR("FAIL: hmac mismatch\n")); |
|
|
477 } |
|
|
478 |
|
|
479 uint8_t expkey[AES_EXPKEY_SIZE]; |
|
|
480 ExpandKey(avr_keys[key_index], expkey); |
|
|
481 Decrypt(&data[HMACLEN], expkey, output); |
|
|
482 |
|
|
483 printf_P(PSTR("DECRYPTED: ")); |
|
|
484 printhex(output, AESLEN, stdout); |
|
2
|
485 fputc('\n', stdout); |
|
|
486 } |
|
|
487 |
|
|
488 static void |
|
|
489 cmd_oneshot_reboot(const char *params) |
|
|
490 { |
|
|
491 uint32_t new_delay = strtoul(params, NULL, 10); |
|
|
492 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
|
1
|
493 { |
|
2
|
494 oneshot_count = new_delay; |
|
1
|
495 } |
|
2
|
496 printf_P(PSTR("oneshot delay %lu\n"), new_delay); |
|
0
|
497 } |
|
|
498 |
|
|
499 static void |
|
|
500 load_params() |
|
|
501 { |
|
|
502 uint16_t magic; |
|
|
503 eeprom_read(magic, magic); |
|
|
504 if (magic == EXPECT_MAGIC) |
|
|
505 { |
|
1
|
506 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
|
|
507 eeprom_read(watchdog_short_limit, watchdog_short_limit); |
|
2
|
508 eeprom_read(newboot_limit, newboot_limit); |
|
1
|
509 } |
|
2
|
510 |
|
|
511 eeprom_read(avr_keys, avr_keys); |
|
0
|
512 } |
|
|
513 |
|
2
|
514 static void |
|
|
515 cmd_vcc() |
|
0
|
516 { |
|
2
|
517 uint16_t vcc = adc_vcc(); |
|
|
518 printf_P("vcc: %u mV\n", vcc); |
|
0
|
519 } |
|
|
520 |
|
|
521 static void |
|
|
522 read_handler() |
|
|
523 { |
|
2
|
524 if (strcmp_P(readbuf, PSTR("get_params")) == 0) |
|
0
|
525 { |
|
|
526 cmd_get_params(); |
|
|
527 } |
|
|
528 else if (strncmp_P(readbuf, PSTR("set_params "), 11) == 0) |
|
|
529 { |
|
|
530 cmd_set_params(&readbuf[11]); |
|
|
531 } |
|
2
|
532 else if (strncmp_P(readbuf, PSTR("set_key "), 8) == 0) |
|
0
|
533 { |
|
2
|
534 cmd_set_avr_key(&readbuf[8]); |
|
0
|
535 } |
|
2
|
536 else if (strncmp_P(readbuf, PSTR("oneshot "), 8) == 0) |
|
0
|
537 { |
|
2
|
538 cmd_oneshot_reboot(&readbuf[8]); |
|
0
|
539 } |
|
2
|
540 else if (strncmp_P(readbuf, PSTR("hmac "), 5) == 0) |
|
0
|
541 { |
|
2
|
542 cmd_hmac(&readbuf[5]); |
|
0
|
543 } |
|
5
|
544 else if (strncmp_P(readbuf, PSTR("decrypt "), 8) == 0) |
|
|
545 { |
|
|
546 cmd_hmac(&readbuf[8]); |
|
|
547 } |
|
2
|
548 else if (strcmp_P(readbuf, PSTR("vcc")) == 0) |
|
0
|
549 { |
|
2
|
550 cmd_vcc(); |
|
0
|
551 } |
|
|
552 else if (strcmp_P(readbuf, PSTR("reset")) == 0) |
|
|
553 { |
|
|
554 cmd_reset(); |
|
|
555 } |
|
4
|
556 else if (strcmp_P(readbuf, PSTR("newboot")) == 0) |
|
|
557 { |
|
|
558 cmd_newboot(); |
|
|
559 } |
|
0
|
560 else |
|
|
561 { |
|
|
562 printf_P(PSTR("Bad command '%s'\n"), readbuf); |
|
|
563 } |
|
|
564 } |
|
|
565 |
|
|
566 ISR(INT0_vect) |
|
|
567 { |
|
|
568 blink(); |
|
|
569 _delay_ms(100); |
|
|
570 blink(); |
|
|
571 } |
|
|
572 |
|
|
573 ISR(USART_RX_vect) |
|
|
574 { |
|
|
575 char c = UDR0; |
|
|
576 #ifdef HAVE_UART_ECHO |
|
|
577 uart_putchar(c, NULL); |
|
|
578 #endif |
|
|
579 if (c == '\r' || c == '\n') |
|
|
580 { |
|
|
581 if (readpos > 0) |
|
|
582 { |
|
|
583 readbuf[readpos] = '\0'; |
|
|
584 have_cmd = 1; |
|
|
585 readpos = 0; |
|
|
586 } |
|
|
587 } |
|
|
588 else |
|
|
589 { |
|
|
590 readbuf[readpos] = c; |
|
|
591 readpos++; |
|
|
592 if (readpos >= sizeof(readbuf)) |
|
|
593 { |
|
|
594 readpos = 0; |
|
|
595 } |
|
|
596 } |
|
|
597 } |
|
|
598 |
|
2
|
599 ISR(TIMER1_COMPA_vect) |
|
0
|
600 { |
|
2
|
601 TCNT1 = 0; |
|
0
|
602 |
|
|
603 clock_epoch += TICK; |
|
|
604 |
|
1
|
605 // watchdogs count up, continuous |
|
|
606 if (watchdog_long_limit > 0) { |
|
2
|
607 watchdog_long_count += TICK; |
|
1
|
608 if (watchdog_long_count >= watchdog_long_limit) |
|
|
609 { |
|
|
610 watchdog_long_count = 0; |
|
|
611 watchdog_long_hit = 1; |
|
|
612 } |
|
0
|
613 } |
|
|
614 |
|
1
|
615 if (watchdog_short_limit > 0) { |
|
2
|
616 watchdog_short_count += TICK; |
|
1
|
617 if (watchdog_short_count >= watchdog_short_limit) |
|
|
618 { |
|
|
619 watchdog_short_count = 0; |
|
|
620 watchdog_short_hit = 1; |
|
|
621 } |
|
0
|
622 } |
|
|
623 |
|
2
|
624 // newboot counts down |
|
1
|
625 if (newboot_count > 0) |
|
0
|
626 { |
|
2
|
627 newboot_count-=TICK; |
|
|
628 if (newboot_count <= 0) |
|
1
|
629 { |
|
|
630 newboot_hit = 1; |
|
2
|
631 newboot_count = 0; |
|
1
|
632 } |
|
0
|
633 } |
|
1
|
634 |
|
2
|
635 if (oneshot_count > 0) |
|
|
636 { |
|
|
637 oneshot_count-=TICK; |
|
|
638 if (oneshot_count <= 0) |
|
|
639 { |
|
|
640 oneshot_hit = 1; |
|
|
641 oneshot_count = 0; |
|
|
642 } |
|
|
643 } |
|
0
|
644 } |
|
|
645 |
|
|
646 static void |
|
|
647 idle_sleep() |
|
|
648 { |
|
|
649 set_sleep_mode(SLEEP_MODE_IDLE); |
|
|
650 sleep_mode(); |
|
|
651 } |
|
|
652 |
|
|
653 static uint16_t |
|
|
654 adc_vcc() |
|
|
655 { |
|
|
656 PRR &= ~_BV(PRADC); |
|
|
657 |
|
|
658 // /16 prescaler |
|
|
659 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
|
|
660 |
|
|
661 // set to measure 1.1 reference |
|
|
662 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); |
|
|
663 // average a number of samples |
|
|
664 uint16_t sum = 0; |
|
|
665 uint8_t num = 0; |
|
|
666 for (uint8_t n = 0; n < 20; n++) |
|
|
667 { |
|
|
668 ADCSRA |= _BV(ADSC); |
|
|
669 loop_until_bit_is_clear(ADCSRA, ADSC); |
|
|
670 |
|
|
671 uint8_t low_11 = ADCL; |
|
|
672 uint8_t high_11 = ADCH; |
|
|
673 uint16_t val = low_11 + (high_11 << 8); |
|
|
674 |
|
|
675 if (n >= 4) |
|
|
676 { |
|
|
677 sum += val; |
|
|
678 num++; |
|
|
679 } |
|
|
680 } |
|
|
681 ADCSRA = 0; |
|
|
682 PRR |= _BV(PRADC); |
|
|
683 |
|
|
684 //float res_volts = 1.1 * 1024 * num / sum; |
|
|
685 //return 1000 * res_volts; |
|
|
686 return ((uint32_t)1100*1024*num) / sum; |
|
|
687 } |
|
|
688 |
|
|
689 static void |
|
2
|
690 reboot_pi() |
|
|
691 { |
|
|
692 // pull it low for 30ms |
|
|
693 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
|
694 DDR_PI_RESET |= _BV(PIN_PI_RESET); |
|
|
695 _delay_ms(30); |
|
|
696 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
|
697 } |
|
|
698 |
|
|
699 static void |
|
|
700 set_pi_boot_normal(uint8_t normal) |
|
|
701 { |
|
|
702 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
|
|
703 if (normal) |
|
|
704 { |
|
|
705 // tristate |
|
|
706 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
|
|
707 } |
|
|
708 else |
|
|
709 { |
|
|
710 // pull it low |
|
|
711 DDR_PI_RESET |= _BV(PIN_PI_BOOT); |
|
|
712 |
|
|
713 } |
|
|
714 } |
|
|
715 |
|
|
716 static void |
|
|
717 check_flags() |
|
|
718 { |
|
|
719 if (watchdog_long_hit |
|
|
720 || watchdog_short_hit |
|
|
721 || oneshot_hit) |
|
|
722 { |
|
|
723 reboot_pi(); |
|
|
724 } |
|
|
725 |
|
|
726 if (newboot_hit) { |
|
|
727 set_pi_boot_normal(0); |
|
|
728 } |
|
|
729 |
|
|
730 watchdog_long_hit = 0; |
|
|
731 watchdog_short_hit = 0; |
|
|
732 newboot_hit = 0; |
|
|
733 oneshot_hit = 0; |
|
|
734 } |
|
|
735 |
|
|
736 static void |
|
0
|
737 do_comms() |
|
|
738 { |
|
|
739 // avoid receiving rubbish, perhaps |
|
|
740 uart_on(); |
|
|
741 |
|
|
742 // write sd card here? same 3.3v regulator... |
|
|
743 |
|
1
|
744 while (1) |
|
0
|
745 { |
|
1
|
746 wdt_reset(); |
|
2
|
747 |
|
|
748 check_flags(); |
|
|
749 |
|
0
|
750 if (have_cmd) |
|
|
751 { |
|
|
752 have_cmd = 0; |
|
|
753 read_handler(); |
|
|
754 continue; |
|
|
755 } |
|
|
756 |
|
|
757 // wait for commands from the master |
|
|
758 idle_sleep(); |
|
|
759 } |
|
|
760 } |
|
|
761 |
|
|
762 static void |
|
|
763 blink() |
|
|
764 { |
|
|
765 PORT_LED &= ~_BV(PIN_LED); |
|
|
766 _delay_ms(1); |
|
|
767 PORT_LED |= _BV(PIN_LED); |
|
|
768 } |
|
|
769 |
|
|
770 static void |
|
|
771 long_delay(int ms) |
|
|
772 { |
|
|
773 int iter = ms / 100; |
|
|
774 |
|
|
775 for (int i = 0; i < iter; i++) |
|
|
776 { |
|
|
777 _delay_ms(100); |
|
|
778 } |
|
|
779 } |
|
|
780 |
|
|
781 ISR(BADISR_vect) |
|
|
782 { |
|
|
783 //uart_on(); |
|
|
784 printf_P(PSTR("Bad interrupt\n")); |
|
|
785 } |
|
|
786 |
|
|
787 int main(void) |
|
|
788 { |
|
|
789 setup_chip(); |
|
|
790 blink(); |
|
|
791 |
|
|
792 stdout = &mystdout; |
|
|
793 uart_on(); |
|
|
794 |
|
5
|
795 printf(PSTR("Pi Watchdog\nMatt Johnston [email protected]")); |
|
0
|
796 |
|
2
|
797 set_pi_boot_normal(0); |
|
|
798 |
|
0
|
799 load_params(); |
|
|
800 |
|
|
801 setup_tick_counter(); |
|
|
802 |
|
|
803 sei(); |
|
|
804 |
|
8
|
805 #if 0 |
|
|
806 // encryption test |
|
|
807 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); |
|
|
808 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); |
|
|
809 cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
|
|
810 #endif |
|
|
811 |
|
1
|
812 // doesn't return |
|
|
813 do_comms(); |
|
0
|
814 |
|
|
815 return 0; /* never reached */ |
|
|
816 } |
