Mercurial > pihelp
annotate main.c @ 14:c17f2e4a7a8b
merge
| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Wed, 12 Jun 2013 23:49:27 +0800 |
| parents | aec45c673a60 |
| children | 915be6f0ff13 |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 3 #include <stddef.h> | |
| 4 #include <stdbool.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <avr/io.h> | |
| 7 #include <avr/interrupt.h> | |
| 8 #include <avr/sleep.h> | |
| 9 #include <util/delay.h> | |
| 10 #include <avr/pgmspace.h> | |
| 11 #include <avr/eeprom.h> | |
| 12 #include <avr/wdt.h> | |
| 13 #include <util/atomic.h> | |
| 14 #include <util/crc16.h> | |
| 15 | |
| 2 | 16 #include "hmac-sha1.h" |
| 5 | 17 #include "aes.h" |
| 2 | 18 |
| 1 | 19 //#include "simple_ds18b20.h" |
| 20 //#include "onewire.h" | |
| 0 | 21 |
| 5 | 22 LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); |
| 23 | |
| 0 | 24 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
| 25 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
| 26 | |
| 27 // TICK should be 8 or less (8 untested). all timers need | |
| 28 // to be a multiple. | |
| 29 | |
| 1 | 30 #define TICK 1 |
| 2 | 31 #define SLEEP_COMPARE (2000000/64) // == 31250 exactly |
| 5 | 32 #define NKEYS 10 |
| 33 #define HMACLEN 20 | |
| 34 #define AESLEN 16 | |
| 35 #define KEYLEN HMACLEN | |
| 1 | 36 |
| 0 | 37 #define BAUD 19200 |
| 38 #define UBRR ((F_CPU)/8/(BAUD)-1) | |
| 39 | |
| 2 | 40 #define PORT_PI_BOOT PORTD |
| 41 #define DDR_PI_BOOT DDRD | |
| 4 | 42 #define PIN_PI_BOOT PD5 |
| 2 | 43 |
| 44 #define PORT_PI_RESET PORTD | |
| 45 #define DDR_PI_RESET DDRD | |
| 46 #define PIN_PI_RESET PD6 | |
| 47 | |
| 4 | 48 #define PORT_LED PORTD |
| 49 #define DDR_LED DDRD | |
| 50 #define PIN_LED PD7 | |
| 0 | 51 |
| 52 // #define HAVE_UART_ECHO | |
| 53 | |
| 7 | 54 // stores a value of clock_epoch combined with the remainder of TCNT1, |
| 0 | 55 // for 1/32 second accuracy |
| 56 struct epoch_ticks | |
| 57 { | |
| 58 uint32_t ticks; | |
| 59 // remainder | |
| 60 uint8_t rem; | |
| 61 }; | |
| 62 | |
| 1 | 63 // eeprom-settable parameters, default values defined here. |
| 64 // all timeouts should be a multiple of TICK | |
| 2 | 65 static uint32_t watchdog_long_limit = (60L*60*24); |
| 1 | 66 static uint32_t watchdog_short_limit = 0; |
| 67 static uint32_t newboot_limit = 60*10; | |
| 0 | 68 |
| 1 | 69 // avr proves itself |
| 2 | 70 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
| 0 | 71 |
| 72 // ---- Atomic guards required accessing these variables | |
| 73 // clock_epoch in seconds | |
| 74 static uint32_t clock_epoch; | |
| 1 | 75 // watchdog counts up |
| 76 static uint32_t watchdog_long_count; | |
| 77 static uint32_t watchdog_short_count; | |
| 2 | 78 // newboot counts down |
| 1 | 79 static uint32_t newboot_count; |
| 2 | 80 // oneshot counts down |
| 81 static uint32_t oneshot_count; | |
| 82 | |
| 0 | 83 // ---- End atomic guards required |
| 84 | |
| 85 // boolean flags | |
| 1 | 86 static uint8_t watchdog_long_hit; |
| 87 static uint8_t watchdog_short_hit; | |
| 88 static uint8_t newboot_hit; | |
| 2 | 89 static uint8_t oneshot_hit; |
| 0 | 90 |
| 91 static uint8_t readpos; | |
| 1 | 92 static char readbuf[50]; |
| 0 | 93 static uint8_t have_cmd; |
| 94 | |
| 95 int uart_putchar(char c, FILE *stream); | |
| 96 static void long_delay(int ms); | |
| 97 static void blink(); | |
| 98 static uint16_t adc_vcc(); | |
| 2 | 99 static void set_pi_boot_normal(uint8_t normal); |
| 0 | 100 |
| 101 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, | |
| 102 _FDEV_SETUP_WRITE); | |
| 103 | |
| 104 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
| 105 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 106 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 107 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 108 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 109 | |
| 1 | 110 #define EXPECT_MAGIC 0xdf83 |
| 0 | 111 |
| 112 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 1 | 113 uint32_t watchdog_long_limit; |
| 114 uint32_t watchdog_short_limit; | |
| 115 uint32_t newboot_limit; | |
| 0 | 116 |
| 2 | 117 uint8_t avr_keys[NKEYS][KEYLEN]; |
| 0 | 118 |
| 119 uint16_t magic; | |
| 120 }; | |
| 121 | |
| 122 // Very first setup | |
| 123 static void | |
| 124 setup_chip() | |
| 125 { | |
| 126 cli(); | |
| 127 | |
| 128 // stop watchdog timer (might have been used to cause a reset) | |
| 129 wdt_reset(); | |
| 130 MCUSR &= ~_BV(WDRF); | |
| 131 WDTCSR |= _BV(WDCE) | _BV(WDE); | |
| 132 WDTCSR = 0; | |
| 133 | |
| 1 | 134 // set to 8S, in case sha1 is slow etc. |
| 135 wdt_enable(WDTO_8S); | |
| 136 | |
| 0 | 137 // Set clock to 2mhz |
| 138 CLKPR = _BV(CLKPCE); | |
| 139 CLKPR = _BV(CLKPS1); | |
| 140 | |
| 141 // enable pullups | |
| 1 | 142 // XXX matt pihelp |
| 5 | 143 //PORTB = 0xff; // XXX change when using SPI |
| 144 //PORTD = 0xff; | |
| 145 //PORTC = 0xff; | |
| 0 | 146 |
| 147 // 3.3v power for bluetooth and SD | |
| 148 DDR_LED |= _BV(PIN_LED); | |
| 149 | |
| 5 | 150 #if 0 |
| 0 | 151 // set pullup |
| 152 PORTD |= _BV(PD2); | |
| 153 // INT0 setup | |
| 154 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
| 155 EIMSK = _BV(INT0); | |
| 5 | 156 #endif |
| 0 | 157 |
| 158 // comparator disable | |
| 159 ACSR = _BV(ACD); | |
| 160 | |
| 161 // disable adc pin input buffers | |
| 162 DIDR0 = 0x3F; // acd0-adc5 | |
| 163 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
| 164 | |
| 165 sei(); | |
| 166 } | |
| 167 | |
| 168 static void | |
| 169 get_epoch_ticks(struct epoch_ticks *t) | |
| 170 { | |
| 171 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 172 { | |
| 173 t->ticks = clock_epoch; | |
| 7 | 174 t->rem = TCNT1; |
| 0 | 175 } |
| 176 } | |
| 177 | |
| 178 static void | |
| 179 setup_tick_counter() | |
| 180 { | |
| 2 | 181 // set up counter1 |
| 182 | |
| 0 | 183 // set up counter2. |
| 184 // COM21 COM20 Set OC2 on Compare Match (p116) | |
| 185 // WGM21 Clear counter on compare | |
| 186 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
| 187 // toggle on match | |
| 2 | 188 TCCR1A = _BV(COM1A0); |
| 8 | 189 #ifdef SIM_DEBUG |
| 190 // systemclock/8 | |
| 191 TCCR1B = _BV(CS11); | |
| 192 #else | |
| 7 | 193 // systemclock/64 |
| 194 TCCR1B = _BV(CS11) | _BV(CS10); | |
| 8 | 195 #endif |
| 2 | 196 TCNT1 = 0; |
| 197 OCR1A = SLEEP_COMPARE; | |
| 0 | 198 // interrupt |
| 2 | 199 TIMSK1 = _BV(OCIE1A); |
| 0 | 200 } |
| 201 | |
| 202 static void | |
| 203 uart_on() | |
| 204 { | |
| 205 // Power reduction register | |
| 206 PRR &= ~_BV(PRUSART0); | |
| 207 | |
| 208 // All of this needs to be done each time after turning off the PRR | |
| 209 // baud rate | |
| 210 UBRR0H = (unsigned char)(UBRR >> 8); | |
| 211 UBRR0L = (unsigned char)UBRR; | |
| 212 // set 2x clock, improves accuracy of UBRR | |
| 213 UCSR0A |= _BV(U2X0); | |
| 214 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
| 215 //8N1 | |
| 216 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
| 217 } | |
| 218 | |
| 219 static void | |
| 220 uart_off() | |
| 221 { | |
| 222 // Turn off interrupts and disable tx/rx | |
| 223 UCSR0B = 0; | |
| 224 | |
| 225 // Power reduction register | |
| 226 PRR |= _BV(PRUSART0); | |
| 227 } | |
| 228 | |
| 229 int | |
| 230 uart_putchar(char c, FILE *stream) | |
| 231 { | |
| 232 // XXX could perhaps sleep in the loop for power. | |
| 233 if (c == '\n') | |
| 234 { | |
| 235 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 236 UDR0 = '\r'; | |
| 237 } | |
| 238 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 239 UDR0 = c; | |
| 240 if (c == '\r') | |
| 241 { | |
| 242 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 243 UDR0 = '\n'; | |
| 244 } | |
| 245 return (unsigned char)c; | |
| 246 } | |
| 247 | |
| 248 static void | |
| 249 cmd_reset() | |
| 250 { | |
| 251 printf_P(PSTR("reset\n")); | |
| 252 _delay_ms(100); | |
| 253 cli(); // disable interrupts | |
| 254 wdt_enable(WDTO_15MS); // enable watchdog | |
| 255 while(1); // wait for watchdog to reset processor | |
| 256 } | |
| 257 | |
| 2 | 258 static void |
| 259 cmd_newboot() | |
| 260 { | |
| 261 set_pi_boot_normal(1); | |
| 262 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 263 { | |
| 264 newboot_count = newboot_limit; | |
| 265 } | |
| 266 printf_P(PSTR("newboot for %d secs"), newboot_limit); | |
| 267 } | |
| 268 | |
| 1 | 269 |
| 0 | 270 |
| 271 static void | |
| 1 | 272 cmd_get_params() |
| 0 | 273 { |
| 2 | 274 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
| 1 | 275 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
| 276 { | |
| 2 | 277 cur_watchdog_long = watchdog_long_count; |
| 278 cur_watchdog_short = watchdog_short_count; | |
| 279 cur_newboot = newboot_count; | |
| 280 cur_oneshot = oneshot_count; | |
| 1 | 281 } |
| 282 | |
| 2 | 283 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu) oneshot (%lu)\n"), |
| 1 | 284 watchdog_long_limit, |
| 2 | 285 cur_watchdog_long, |
| 1 | 286 watchdog_short_limit, |
| 2 | 287 cur_watchdog_short, |
| 1 | 288 newboot_limit, |
| 2 | 289 cur_newboot, |
| 290 cur_oneshot); | |
| 0 | 291 } |
| 292 | |
| 293 static void | |
| 1 | 294 cmd_set_params(const char *params) |
| 0 | 295 { |
| 1 | 296 uint32_t new_watchdog_long_limit; |
| 297 uint32_t new_watchdog_short_limit; | |
| 298 uint32_t new_newboot_limit; | |
| 299 | |
| 300 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
| 301 &new_watchdog_long_limit, | |
| 302 &new_watchdog_short_limit, | |
| 303 &new_newboot_limit); | |
| 304 | |
| 305 | |
| 306 if (ret != 3) | |
| 0 | 307 { |
| 1 | 308 printf_P(PSTR("Bad values\n")); |
| 309 } | |
| 310 else | |
| 311 { | |
| 312 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 313 { | |
| 314 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
| 315 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
| 316 eeprom_write(new_newboot_limit, newboot_limit); | |
| 317 uint16_t magic = EXPECT_MAGIC; | |
| 318 eeprom_write(magic, magic); | |
| 0 | 319 } |
| 1 | 320 printf_P(PSTR("set_params for next boot\n")); |
| 321 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
| 322 new_watchdog_long_limit, | |
| 323 new_watchdog_short_limit, | |
| 324 new_newboot_limit); | |
| 325 | |
| 326 } | |
| 327 } | |
| 0 | 328 |
| 1 | 329 uint8_t from_hex(char c) |
| 330 { | |
| 331 if (c >= '0' && c <= '9') { | |
| 332 return c-'0'; | |
| 333 } | |
| 334 if (c >= 'a' && c <= 'f') { | |
| 335 return c-'a' + 0xa; | |
| 336 } | |
| 337 if (c >= 'A' && c <= 'F') { | |
| 338 return c-'A' + 0xa; | |
| 339 } | |
| 340 return 0; | |
| 341 } | |
| 342 | |
| 2 | 343 static void |
| 344 printhex_nibble(const unsigned char b, FILE *stream) | |
| 345 { | |
| 346 unsigned char c = b & 0x0f; | |
| 347 if ( c > 9 ) { | |
| 348 c += 'A'-10; | |
| 349 } | |
| 350 else { | |
| 351 c += '0'; | |
| 352 } | |
| 353 fputc(c, stream); | |
| 354 } | |
| 355 | |
| 356 void | |
| 357 printhex_byte(const unsigned char b, FILE *stream) | |
| 358 { | |
| 359 printhex_nibble( b >> 4, stream); | |
| 360 printhex_nibble( b, stream); | |
| 361 } | |
| 362 | |
| 363 void | |
| 364 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
| 365 { | |
| 366 for (uint8_t i = 0; i < n; i++) | |
| 367 { | |
| 368 if (i > 0) | |
| 369 { | |
| 370 fputc(' ', stream); | |
| 371 } | |
| 372 printhex_byte(id[i], stream); | |
| 373 } | |
| 374 } | |
| 375 | |
| 376 static int8_t | |
| 5 | 377 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
| 378 uint8_t bytes_len) | |
| 2 | 379 { |
| 380 // "N HEXKEY" | |
| 5 | 381 if (strlen(params) != bytes_len*2 + 2) { |
| 2 | 382 printf_P(PSTR("Wrong length key\n")); |
| 383 return -1; | |
| 384 } | |
| 385 | |
| 386 if (params[1] != ' ') | |
| 387 { | |
| 388 printf_P(PSTR("Missing space\n")); | |
| 389 return -1; | |
| 390 } | |
| 391 | |
| 392 *key_index = from_hex(params[0]); | |
| 393 if (*key_index >= NKEYS) | |
| 394 { | |
| 395 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
| 396 return -1; | |
| 397 } | |
| 398 | |
| 5 | 399 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
| 2 | 400 { |
| 401 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
| 402 } | |
| 403 return 0; | |
| 404 } | |
| 405 | |
| 1 | 406 static void |
| 407 cmd_set_avr_key(const char *params) | |
| 408 { | |
| 2 | 409 uint8_t new_key[KEYLEN]; |
| 410 uint8_t key_index; | |
| 5 | 411 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
| 2 | 412 { |
| 1 | 413 return; |
| 0 | 414 } |
| 2 | 415 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
| 8 | 416 #ifndef SIM_DEBUG |
| 2 | 417 eeprom_write(avr_keys, avr_keys); |
| 8 | 418 #endif |
| 2 | 419 } |
| 420 | |
| 421 static void | |
| 422 cmd_hmac(const char *params) | |
| 423 { | |
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424 uint8_t indata[2+HMACLEN] = {'H', ':'}; |
| 7 | 425 uint8_t outdata[HMACLEN]; |
| 2 | 426 uint8_t key_index; |
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427 if (parse_key(params, &key_index, &indata[2], HMACLEN) != 0) |
| 2 | 428 { |
| 429 printf_P(PSTR("FAIL: Bad input\n")); | |
| 5 | 430 return; |
| 2 | 431 } |
| 0 | 432 |
| 8 | 433 #ifndef SIM_DEBUG |
| 5 | 434 long_delay(200); |
| 8 | 435 #endif |
| 5 | 436 |
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437 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
| 2 | 438 printf_P(PSTR("HMAC: ")); |
| 7 | 439 printhex(outdata, HMACLEN, stdout); |
| 5 | 440 fputc('\n', stdout); |
| 441 } | |
| 442 | |
| 443 static void | |
| 444 cmd_decrypt(const char *params) | |
| 445 { | |
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446 uint8_t indata[HMACLEN+AESLEN]; // XXX |
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447 // a temporary buffer |
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448 uint8_t output[HMACLEN] = {'D', ':'}; |
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449 _Static_assert(AESLEN+2 <= sizeof(output), "sufficient output buffer"); |
| 5 | 450 uint8_t key_index; |
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451 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
| 5 | 452 { |
| 453 printf_P(PSTR("FAIL: Bad input\n")); | |
| 454 return; | |
| 455 } | |
| 456 | |
| 8 | 457 #ifndef SIM_DEBUG |
| 5 | 458 long_delay(200); |
| 8 | 459 #endif |
| 7 | 460 |
| 5 | 461 // check the signature |
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462 memcpy(&output[2], &indata[HMACLEN], AESLEN); |
| 12 | 463 hmac_sha1(output, avr_keys[key_index], KEYLEN*8, output, (2+AESLEN)*8); |
| 5 | 464 |
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465 if (memcmp(output, indata, HMACLEN) != 0) { |
| 5 | 466 printf_P(PSTR("FAIL: hmac mismatch\n")); |
| 467 } | |
| 468 | |
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469 uint8_t tmpbuf[256]; |
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470 aesInit(avr_keys[key_index], tmpbuf); |
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471 aesDecrypt(&indata[HMACLEN], NULL); |
| 5 | 472 |
| 473 printf_P(PSTR("DECRYPTED: ")); | |
| 474 printhex(output, AESLEN, stdout); | |
| 2 | 475 fputc('\n', stdout); |
| 476 } | |
| 477 | |
| 478 static void | |
| 479 cmd_oneshot_reboot(const char *params) | |
| 480 { | |
| 481 uint32_t new_delay = strtoul(params, NULL, 10); | |
| 482 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 1 | 483 { |
| 2 | 484 oneshot_count = new_delay; |
| 1 | 485 } |
| 2 | 486 printf_P(PSTR("oneshot delay %lu\n"), new_delay); |
| 0 | 487 } |
| 488 | |
| 489 static void | |
| 490 load_params() | |
| 491 { | |
| 492 uint16_t magic; | |
| 493 eeprom_read(magic, magic); | |
| 494 if (magic == EXPECT_MAGIC) | |
| 495 { | |
| 1 | 496 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
| 497 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
| 2 | 498 eeprom_read(newboot_limit, newboot_limit); |
| 1 | 499 } |
| 2 | 500 |
| 501 eeprom_read(avr_keys, avr_keys); | |
| 0 | 502 } |
| 503 | |
| 2 | 504 static void |
| 505 cmd_vcc() | |
| 0 | 506 { |
| 2 | 507 uint16_t vcc = adc_vcc(); |
| 12 | 508 printf_P(PSTR("vcc: %u mV\n"), vcc); |
| 0 | 509 } |
| 510 | |
| 511 static void | |
| 512 read_handler() | |
| 513 { | |
| 2 | 514 if (strcmp_P(readbuf, PSTR("get_params")) == 0) |
| 0 | 515 { |
| 516 cmd_get_params(); | |
| 517 } | |
| 518 else if (strncmp_P(readbuf, PSTR("set_params "), 11) == 0) | |
| 519 { | |
| 520 cmd_set_params(&readbuf[11]); | |
| 521 } | |
| 2 | 522 else if (strncmp_P(readbuf, PSTR("set_key "), 8) == 0) |
| 0 | 523 { |
| 2 | 524 cmd_set_avr_key(&readbuf[8]); |
| 0 | 525 } |
| 2 | 526 else if (strncmp_P(readbuf, PSTR("oneshot "), 8) == 0) |
| 0 | 527 { |
| 2 | 528 cmd_oneshot_reboot(&readbuf[8]); |
| 0 | 529 } |
| 2 | 530 else if (strncmp_P(readbuf, PSTR("hmac "), 5) == 0) |
| 0 | 531 { |
| 2 | 532 cmd_hmac(&readbuf[5]); |
| 0 | 533 } |
| 5 | 534 else if (strncmp_P(readbuf, PSTR("decrypt "), 8) == 0) |
| 535 { | |
| 12 | 536 cmd_decrypt(&readbuf[8]); |
| 5 | 537 } |
| 2 | 538 else if (strcmp_P(readbuf, PSTR("vcc")) == 0) |
| 0 | 539 { |
| 2 | 540 cmd_vcc(); |
| 0 | 541 } |
| 542 else if (strcmp_P(readbuf, PSTR("reset")) == 0) | |
| 543 { | |
| 544 cmd_reset(); | |
| 545 } | |
| 4 | 546 else if (strcmp_P(readbuf, PSTR("newboot")) == 0) |
| 547 { | |
| 548 cmd_newboot(); | |
| 549 } | |
| 0 | 550 else |
| 551 { | |
| 552 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
| 553 } | |
| 554 } | |
| 555 | |
| 556 ISR(INT0_vect) | |
| 557 { | |
| 558 blink(); | |
| 559 _delay_ms(100); | |
| 560 blink(); | |
| 561 } | |
| 562 | |
| 563 ISR(USART_RX_vect) | |
| 564 { | |
| 565 char c = UDR0; | |
| 566 #ifdef HAVE_UART_ECHO | |
| 567 uart_putchar(c, NULL); | |
| 568 #endif | |
| 569 if (c == '\r' || c == '\n') | |
| 570 { | |
| 571 if (readpos > 0) | |
| 572 { | |
| 573 readbuf[readpos] = '\0'; | |
| 574 have_cmd = 1; | |
| 575 readpos = 0; | |
| 576 } | |
| 577 } | |
| 578 else | |
| 579 { | |
| 580 readbuf[readpos] = c; | |
| 581 readpos++; | |
| 582 if (readpos >= sizeof(readbuf)) | |
| 583 { | |
| 584 readpos = 0; | |
| 585 } | |
| 586 } | |
| 587 } | |
| 588 | |
| 2 | 589 ISR(TIMER1_COMPA_vect) |
| 0 | 590 { |
| 2 | 591 TCNT1 = 0; |
| 0 | 592 |
| 593 clock_epoch += TICK; | |
| 594 | |
| 1 | 595 // watchdogs count up, continuous |
| 596 if (watchdog_long_limit > 0) { | |
| 2 | 597 watchdog_long_count += TICK; |
| 1 | 598 if (watchdog_long_count >= watchdog_long_limit) |
| 599 { | |
| 600 watchdog_long_count = 0; | |
| 601 watchdog_long_hit = 1; | |
| 602 } | |
| 0 | 603 } |
| 604 | |
| 1 | 605 if (watchdog_short_limit > 0) { |
| 2 | 606 watchdog_short_count += TICK; |
| 1 | 607 if (watchdog_short_count >= watchdog_short_limit) |
| 608 { | |
| 609 watchdog_short_count = 0; | |
| 610 watchdog_short_hit = 1; | |
| 611 } | |
| 0 | 612 } |
| 613 | |
| 2 | 614 // newboot counts down |
| 1 | 615 if (newboot_count > 0) |
| 0 | 616 { |
| 2 | 617 newboot_count-=TICK; |
| 618 if (newboot_count <= 0) | |
| 1 | 619 { |
| 620 newboot_hit = 1; | |
| 2 | 621 newboot_count = 0; |
| 1 | 622 } |
| 0 | 623 } |
| 1 | 624 |
| 2 | 625 if (oneshot_count > 0) |
| 626 { | |
| 627 oneshot_count-=TICK; | |
| 628 if (oneshot_count <= 0) | |
| 629 { | |
| 630 oneshot_hit = 1; | |
| 631 oneshot_count = 0; | |
| 632 } | |
| 633 } | |
| 0 | 634 } |
| 635 | |
| 636 static void | |
| 637 idle_sleep() | |
| 638 { | |
| 639 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 640 sleep_mode(); | |
| 641 } | |
| 642 | |
| 643 static uint16_t | |
| 644 adc_vcc() | |
| 645 { | |
| 646 PRR &= ~_BV(PRADC); | |
| 647 | |
| 648 // /16 prescaler | |
| 649 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 650 | |
| 651 // set to measure 1.1 reference | |
| 652 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 653 // average a number of samples | |
| 654 uint16_t sum = 0; | |
| 655 uint8_t num = 0; | |
| 656 for (uint8_t n = 0; n < 20; n++) | |
| 657 { | |
| 658 ADCSRA |= _BV(ADSC); | |
| 659 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 660 | |
| 661 uint8_t low_11 = ADCL; | |
| 662 uint8_t high_11 = ADCH; | |
| 663 uint16_t val = low_11 + (high_11 << 8); | |
| 664 | |
| 665 if (n >= 4) | |
| 666 { | |
| 667 sum += val; | |
| 668 num++; | |
| 669 } | |
| 670 } | |
| 671 ADCSRA = 0; | |
| 672 PRR |= _BV(PRADC); | |
| 673 | |
| 674 //float res_volts = 1.1 * 1024 * num / sum; | |
| 675 //return 1000 * res_volts; | |
| 676 return ((uint32_t)1100*1024*num) / sum; | |
| 677 } | |
| 678 | |
| 679 static void | |
| 2 | 680 reboot_pi() |
| 681 { | |
| 682 // pull it low for 30ms | |
| 683 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); | |
| 684 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
| 685 _delay_ms(30); | |
| 686 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); | |
| 687 } | |
| 688 | |
| 689 static void | |
| 690 set_pi_boot_normal(uint8_t normal) | |
| 691 { | |
| 692 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 693 if (normal) | |
| 694 { | |
| 695 // tristate | |
| 696 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 697 } | |
| 698 else | |
| 699 { | |
| 700 // pull it low | |
| 701 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
| 702 | |
| 703 } | |
| 704 } | |
| 705 | |
| 706 static void | |
| 707 check_flags() | |
| 708 { | |
| 709 if (watchdog_long_hit | |
| 710 || watchdog_short_hit | |
| 711 || oneshot_hit) | |
| 712 { | |
| 12 | 713 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
| 714 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
| 715 long_delay(300); | |
| 2 | 716 reboot_pi(); |
| 717 } | |
| 718 | |
| 719 if (newboot_hit) { | |
| 720 set_pi_boot_normal(0); | |
| 721 } | |
| 722 | |
| 723 watchdog_long_hit = 0; | |
| 724 watchdog_short_hit = 0; | |
| 725 newboot_hit = 0; | |
| 726 oneshot_hit = 0; | |
| 727 } | |
| 728 | |
| 729 static void | |
| 0 | 730 do_comms() |
| 731 { | |
| 732 // avoid receiving rubbish, perhaps | |
| 733 uart_on(); | |
| 734 | |
| 735 // write sd card here? same 3.3v regulator... | |
| 736 | |
| 1 | 737 while (1) |
| 0 | 738 { |
| 1 | 739 wdt_reset(); |
| 2 | 740 |
| 741 check_flags(); | |
| 742 | |
| 0 | 743 if (have_cmd) |
| 744 { | |
| 745 have_cmd = 0; | |
| 746 read_handler(); | |
| 747 continue; | |
| 748 } | |
| 749 | |
| 750 // wait for commands from the master | |
| 751 idle_sleep(); | |
| 752 } | |
| 753 } | |
| 754 | |
| 755 static void | |
| 756 blink() | |
| 757 { | |
| 758 PORT_LED &= ~_BV(PIN_LED); | |
| 759 _delay_ms(1); | |
| 760 PORT_LED |= _BV(PIN_LED); | |
| 761 } | |
| 762 | |
| 763 static void | |
| 764 long_delay(int ms) | |
| 765 { | |
| 766 int iter = ms / 100; | |
| 767 | |
| 768 for (int i = 0; i < iter; i++) | |
| 769 { | |
| 770 _delay_ms(100); | |
| 771 } | |
| 772 } | |
| 773 | |
| 774 ISR(BADISR_vect) | |
| 775 { | |
| 776 //uart_on(); | |
| 777 printf_P(PSTR("Bad interrupt\n")); | |
| 778 } | |
| 779 | |
| 780 int main(void) | |
| 781 { | |
| 782 setup_chip(); | |
| 783 blink(); | |
| 784 | |
| 785 stdout = &mystdout; | |
| 786 uart_on(); | |
| 787 | |
| 12 | 788 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]")); |
| 0 | 789 |
| 2 | 790 set_pi_boot_normal(0); |
| 791 | |
| 0 | 792 load_params(); |
| 793 | |
| 794 setup_tick_counter(); | |
| 795 | |
| 796 sei(); | |
| 797 | |
| 8 | 798 #if 0 |
| 799 // encryption test | |
| 800 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
| 801 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
| 12 | 802 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
| 803 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
| 804 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
| 8 | 805 #endif |
| 806 | |
| 1 | 807 // doesn't return |
| 808 do_comms(); | |
| 0 | 809 |
| 810 return 0; /* never reached */ | |
| 811 } |