annotate main.c @ 58:5100e0bdadad

fix voltage
author Matt Johnston <matt@ucc.asn.au>
date Mon, 25 Jun 2012 01:23:34 +0800
parents 8e897a682208
children d5b269352ba0 62112fc2af21
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1 #include <stdio.h>
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2 #include <string.h>
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3 #include <stddef.h>
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4 #include <avr/io.h>
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5 #include <avr/interrupt.h>
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6 #include <avr/sleep.h>
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7 #include <util/delay.h>
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8 #include <avr/pgmspace.h>
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9 #include <avr/eeprom.h>
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10 #include <avr/wdt.h>
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11 #include <util/crc16.h>
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12
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13 // for DWORD of get_fattime()
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14 #include "integer.h"
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16 #include "simple_ds18b20.h"
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17 #include "onewire.h"
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18
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19 // configuration params
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20 // - measurement interval
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21 // - transmit interval
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22 // - bluetooth params
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23 // - number of sensors (and range?)
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24
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25 // 1 second. we have 1024 prescaler, 32768 crystal.
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26 #define SLEEP_COMPARE 32
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27 // limited to uint16_t
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28 #define MEASURE_WAKE 60
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30 #define VALUE_NOSENSOR -9000
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31 #define VALUE_BROKEN -8000
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32
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33 // limited to uint16_t
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34 #define COMMS_WAKE 3600 // XXX testing
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35 // limited to uint8_t
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36 #define WAKE_SECS 60 // XXX testing
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37
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38 #define BAUD 19200
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39 #define UBRR ((F_CPU)/8/(BAUD)-1)
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40
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41 #define PORT_LED PORTC
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42 #define DDR_LED DDRC
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43 #define PIN_LED PC4
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45 #define PORT_SHDN PORTD
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46 #define DDR_SHDN DDRD
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47 #define PIN_SHDN PD7
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49 // limited to uint16_t
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50 // XXX - increasing this to 300 causes strange failures,
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51 // not sure why
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52 #define NUM_MEASUREMENTS 280
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53 // limited to uint8_t
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54 #define MAX_SENSORS 3
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55
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56 // fixed at 8, have a shorter name
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57 #define ID_LEN OW_ROMCODE_SIZE
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58
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59 // #define HAVE_UART_ECHO
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60
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61 int uart_putchar(char c, FILE *stream);
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62 static void long_delay(int ms);
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63 static void blink();
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64 static void adc_internal(uint16_t *millivolt_vcc, uint16_t *int_temp);
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65
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66 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
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67 _FDEV_SETUP_WRITE);
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68
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69 uint16_t crc_out;
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70 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
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71 _FDEV_SETUP_WRITE);
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72 // convenience
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73 static FILE *crc_stdout = &_crc_stdout;
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74
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75 static uint16_t n_measurements;
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76 // stored as decidegrees
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77 static int16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS];
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78 static uint32_t first_measurement_clock;
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79 // last_measurement_clock is redundant but checks that we're not missing
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80 // samples
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81 static uint32_t last_measurement_clock;
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82
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83 // boolean flags
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84 static uint8_t need_measurement;
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85 static uint8_t need_comms;
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86 static uint8_t uart_enabled;
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87
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88 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0
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89 static uint8_t comms_timeout;
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90
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91 static uint8_t readpos;
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92 static char readbuf[30];
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93 static uint8_t have_cmd;
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94
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95 static uint16_t measure_count;
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96 static uint16_t comms_count;
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97
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98 static uint32_t clock_epoch;
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99
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100 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/
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101 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size))
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102 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst))
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103 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size))
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104 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); }
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105
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106 #define EXPECT_MAGIC 0x67c9
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107
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108 struct __attribute__ ((__packed__)) __eeprom_data {
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109 uint16_t magic;
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110 uint8_t n_sensors;
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111 uint8_t sensor_id[MAX_SENSORS][ID_LEN];
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112 };
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113
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114 #define DEBUG(str) printf_P(PSTR(str))
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115
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116 static void deep_sleep();
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117
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118 // Very first setup
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119 static void
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120 setup_chip()
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121 {
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122 cli();
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123
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124 // stop watchdog timer (might have been used to cause a reset)
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125 wdt_reset();
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126 MCUSR &= ~_BV(WDRF);
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127 WDTCSR |= _BV(WDCE) | _BV(WDE);
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128 WDTCSR = 0;
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129
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130 // Set clock to 2mhz
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131 CLKPR = _BV(CLKPCE);
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132 // divide by 4
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133 CLKPR = _BV(CLKPS1);
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134
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135 // enable pullups
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136 PORTB = 0xff; // XXX change when using SPI
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137 PORTD = 0xff;
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138 PORTC = 0xff;
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139
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140 // 3.3v power for bluetooth and SD
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141 DDR_LED |= _BV(PIN_LED);
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142 DDR_SHDN |= _BV(PIN_SHDN);
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143
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144 // set pullup
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145 PORTD |= _BV(PD2);
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146 // INT0 setup
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147 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work?
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148 EIMSK = _BV(INT0);
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149
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
150 // comparator disable
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Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
151 ACSR = _BV(ACD);
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Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
152
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
153 // disable adc pin input buffers
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Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
154 DIDR0 = 0x3F; // acd0-adc5
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parents: 46
diff changeset
155 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
156
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
157 sei();
18
bf733e8e8cf0 Add INT0 button
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parents: 15
diff changeset
158 }
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
159
16
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parents: 15
diff changeset
160 static void
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
161 set_aux_power(uint8_t on)
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
162 {
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
163 if (on)
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
164 {
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
165 PORT_SHDN &= ~_BV(PIN_SHDN);
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parents: 15
diff changeset
166 }
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
167 else
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
168 {
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
169 PORT_SHDN |= _BV(PIN_SHDN);
16
5075d8c428bd untested, add comms timeout code
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parents: 15
diff changeset
170 }
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
171 }
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
172
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
173 static void
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
174 setup_tick_counter()
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
175 {
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
176 // set up counter2.
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parents: 15
diff changeset
177 // COM21 COM20 Set OC2 on Compare Match (p116)
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parents: 15
diff changeset
178 // WGM21 Clear counter on compare
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
179 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21);
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parents: 15
diff changeset
180 // toggle on match
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parents: 15
diff changeset
181 TCCR2A = _BV(COM2A0);
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parents: 15
diff changeset
182 // CS22 CS21 CS20 clk/1024
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parents: 15
diff changeset
183 TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20);
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parents: 15
diff changeset
184 // set async mode
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parents: 15
diff changeset
185 ASSR |= _BV(AS2);
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parents: 15
diff changeset
186 TCNT2 = 0;
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parents: 15
diff changeset
187 OCR2A = SLEEP_COMPARE;
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parents: 15
diff changeset
188 // interrupt
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parents: 15
diff changeset
189 TIMSK2 = _BV(OCIE2A);
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parents: 15
diff changeset
190 }
18
bf733e8e8cf0 Add INT0 button
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parents: 15
diff changeset
191
0
c8b14b2950b9 Some basic bits
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parents:
diff changeset
192 static void
7
52cb08a01171 serial prints something
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parents: 6
diff changeset
193 uart_on()
0
c8b14b2950b9 Some basic bits
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parents:
diff changeset
194 {
8
c55321727d02 deep sleep works
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parents: 7
diff changeset
195 // Power reduction register
46
9ccd965d938a Use the PRR etc, set value to proper ones
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parents: 44
diff changeset
196 PRR &= ~_BV(PRUSART0);
8
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parents: 7
diff changeset
197
16
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parents: 15
diff changeset
198 // All of this needs to be done each time after turning off the PRR
0
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parents:
diff changeset
199 // baud rate
7
52cb08a01171 serial prints something
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parents: 6
diff changeset
200 UBRR0H = (unsigned char)(UBRR >> 8);
52cb08a01171 serial prints something
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parents: 6
diff changeset
201 UBRR0L = (unsigned char)UBRR;
52cb08a01171 serial prints something
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parents: 6
diff changeset
202 // set 2x clock, improves accuracy of UBRR
52cb08a01171 serial prints something
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parents: 6
diff changeset
203 UCSR0A |= _BV(U2X0);
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
204 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0);
0
c8b14b2950b9 Some basic bits
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parents:
diff changeset
205 //8N1
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
206 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00);
41
1701457e6007 fix tabbing
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parents: 40
diff changeset
207 uart_enabled = 1;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
208 }
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
209
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
210 static void
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
211 uart_off()
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
212 {
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
213 // Turn of interrupts and disable tx/rx
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
214 UCSR0B = 0;
41
1701457e6007 fix tabbing
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parents: 40
diff changeset
215 uart_enabled = 0;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
216
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
217 // Power reduction register
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
218 PRR |= _BV(PRUSART0);
0
c8b14b2950b9 Some basic bits
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parents:
diff changeset
219 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
220
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
221 int
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
222 uart_putchar(char c, FILE *stream)
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
223 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
224 if (!uart_enabled)
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
225 {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
226 return EOF;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
227 }
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
228 // XXX could perhaps sleep in the loop for power.
8
c55321727d02 deep sleep works
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parents: 7
diff changeset
229 if (c == '\n')
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
230 {
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
231 loop_until_bit_is_set(UCSR0A, UDRE0);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
232 UDR0 = '\r';
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
233 }
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
234 loop_until_bit_is_set(UCSR0A, UDRE0);
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
235 UDR0 = c;
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
236 if (stream == crc_stdout)
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
237 {
26
d3e5934fe55c - Move crc16 to utils and fix it
Matt Johnston <matt@ucc.asn.au>
parents: 25
diff changeset
238 crc_out = _crc_ccitt_update(crc_out, c);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
239 }
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
240 if (c == '\r')
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
241 {
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
242 loop_until_bit_is_set(UCSR0A, UDRE0);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
243 UDR0 = '\n';
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
244 if (stream == crc_stdout)
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
245 {
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
246 crc_out = _crc_ccitt_update(crc_out, '\n');
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
247 }
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
248 }
40
9b5b202129c3 main.c:
Matt Johnston <matt@ucc.asn.au>
parents: 36
diff changeset
249 return (unsigned char)c;
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
250 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
251
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
252 static void
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
253 cmd_fetch()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
254 {
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
255 crc_out = 0;
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
256 uint8_t n_sensors;
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
257 eeprom_read(n_sensors, n_sensors);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
258
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
259 uint16_t millivolt_vcc, int_temp;
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
260
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
261 adc_internal(&millivolt_vcc, &int_temp);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
262
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
263 fprintf_P(crc_stdout, PSTR("START\n"));
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
264 fprintf_P(crc_stdout, PSTR("now=%lu\n"
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
265 "time_step=%hu\n"
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
266 "first_time=%lu\n"
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
267 "last_time=%lu\n"
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
268 "voltage=%hu\n"
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
269 "avrtemp=%hu\n"),
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
270 clock_epoch,
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
271 (uint16_t)MEASURE_WAKE,
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
272 first_measurement_clock,
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
273 last_measurement_clock,
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
274 millivolt_vcc,
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
275 int_temp
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
276 );
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
277 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
278 for (uint8_t s = 0; s < n_sensors; s++)
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
279 {
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
280 uint8_t id[ID_LEN];
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
281 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
282 eeprom_read_to(id, sensor_id[s], ID_LEN);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
283 printhex(id, ID_LEN, crc_stdout);
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
284 fputc('\n', crc_stdout);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
285 }
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
286 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements);
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
287 for (uint16_t n = 0; n < n_measurements; n++)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
288 {
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
289 fprintf_P(crc_stdout, PSTR("meas%hu="), n);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
290 for (uint8_t s = 0; s < n_sensors; s++)
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
291 {
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
292 fprintf_P(crc_stdout, PSTR(" %hu"), measurements[n][s]);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
293 }
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
294 fputc('\n', crc_stdout);
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
295 }
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
296 fprintf_P(crc_stdout, PSTR("END\n"));
25
2943f62c8e62 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 24
diff changeset
297 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out);
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
298 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
299
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
300 static void
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
301 cmd_clear()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
302 {
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
303 n_measurements = 0;
32
e18d7e89c17d More minor work
Matt Johnston <matt@ucc.asn.au>
parents: 27
diff changeset
304 printf_P(PSTR("cleared\n"));
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
305 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
306
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
307 static void
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
308 cmd_btoff()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
309 {
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
310 comms_count = 0;
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
311 printf_P(PSTR("off:%hu\n"), COMMS_WAKE);
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
312 _delay_ms(100);
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
313 comms_timeout = 0;
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
314 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
315
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
316 static void
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
317 cmd_awake()
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
318 {
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
319 comms_timeout = WAKE_SECS;
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
320 printf_P(PSTR("awake %hu\n"), WAKE_SECS);
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
321 }
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
322
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
323 static void
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
324 cmd_reset()
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
325 {
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
326 printf_P(PSTR("reset\n"));
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
327 _delay_ms(100);
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
328 cli(); // disable interrupts
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
329 wdt_enable(WDTO_15MS); // enable watchdog
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
330 while(1); // wait for watchdog to reset processor
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
331 }
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
332
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
333 static void
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
334 cmd_measure()
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
335 {
33
024f5571df8c - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 32
diff changeset
336 printf_P(PSTR("measuring\n"));
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
337 need_measurement = 1;
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
338 }
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
339
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
340 static void
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
341 cmd_sensors()
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
342 {
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
343 uint8_t ret = simple_ds18b20_start_meas(NULL);
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
344 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret);
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
345 long_delay(DS18B20_TCONV_12BIT);
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
346 simple_ds18b20_read_all();
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
347 }
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
348
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
349 #if 0
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
350 // 0 on success
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
351 static uint8_t
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
352 get_hex_string(const char *hex, uint8_t *out, uint8_t size)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
353 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
354 uint8_t upper;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
355 uint8_t o;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
356 for (uint8_t i = 0, z = 0; o < size; i++)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
357 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
358 uint8_t h = hex[i];
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
359 if (h >= 'A' && h <= 'F')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
360 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
361 // lower case
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
362 h += 0x20;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
363 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
364 uint8_t nibble;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
365 if (h >= '0' && h <= '9')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
366 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
367 nibble = h - '0';
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
368 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
369 else if (h >= 'a' && h <= 'f')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
370 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
371 nibble = 10 + h - 'a';
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
372 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
373 else if (h == ' ' || h == ':')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
374 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
375 continue;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
376 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
377 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
378 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
379 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
380 return 1;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
381 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
382
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
383 if (z % 2 == 0)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
384 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
385 upper = nibble << 4;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
386 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
387 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
388 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
389 out[o] = upper | nibble;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
390 o++;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
391 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
392
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
393 z++;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
394 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
395
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
396 if (o != size)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
397 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
398 printf_P(PSTR("Short hex\n"));
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
399 return 1;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
400 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
401 return 0;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
402 }
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
403 #endif
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
404
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
405 static void
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
406 add_sensor(uint8_t *id)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
407 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
408 uint8_t n;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
409 eeprom_read(n, n_sensors);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
410 if (n < MAX_SENSORS)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
411 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
412 cli();
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
413 eeprom_write_from(id, sensor_id[n], ID_LEN);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
414 n++;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
415 eeprom_write(n, n_sensors);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
416 sei();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
417 printf_P(PSTR("Added sensor %d : "), n);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
418 printhex(id, ID_LEN, stdout);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
419 putchar('\n');
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
420 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
421 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
422 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
423 printf_P(PSTR("Too many sensors\n"));
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
424 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
425 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
426
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
427 static void
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
428 cmd_add_all()
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
429 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
430 uint8_t id[OW_ROMCODE_SIZE];
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
431 printf_P("Adding all\n");
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
432 ow_reset();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
433 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; )
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
434 {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
435 diff = ow_rom_search( diff, &id[0] );
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
436 if( diff == OW_PRESENCE_ERR ) {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
437 printf_P( PSTR("No Sensor found\r") );
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
438 return;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
439 }
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
440
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
441 if( diff == OW_DATA_ERR ) {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
442 printf_P( PSTR("Bus Error\r") );
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
443 return;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
444 }
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
445 add_sensor(id);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
446 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
447 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
448
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
449 static void
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
450 cmd_init()
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
451 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
452 printf_P(PSTR("Resetting sensor list\n"));
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
453 uint8_t zero = 0;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
454 cli();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
455 eeprom_write(zero, n_sensors);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
456 sei();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
457 printf_P(PSTR("Done.\n"));
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
458 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
459
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
460 static void
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
461 check_first_startup()
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
462 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
463 uint16_t magic;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
464 eeprom_read(magic, magic);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
465 if (magic != EXPECT_MAGIC)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
466 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
467 printf_P(PSTR("First boot, looking for sensors...\n"));
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
468 // in case of power fumbles don't want to reset during eeprom write,
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
469 long_delay(2);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
470 cmd_init();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
471 cmd_add_all();
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
472 cli();
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
473 magic = EXPECT_MAGIC;
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
474 eeprom_write(magic, magic);
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
475 sei();
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
476 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
477 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
478
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
479 static void
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
480 read_handler()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
481 {
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
482 if (strcmp_P(readbuf, PSTR("fetch")) == 0)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
483 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
484 cmd_fetch();
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
485 }
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
486 else if (strcmp_P(readbuf, PSTR("clear")) == 0)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
487 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
488 cmd_clear();
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
489 }
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
490 else if (strcmp_P(readbuf, PSTR("btoff")) == 0)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
491 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
492 cmd_btoff();
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
493 }
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
494 else if (strcmp_P(readbuf, PSTR("measure")) == 0)
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
495 {
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
496 cmd_measure();
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
497 }
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
498 else if (strcmp_P(readbuf, PSTR("sensors")) == 0)
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
499 {
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
500 cmd_sensors();
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
501 }
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
502 else if (strcmp_P(readbuf, PSTR("addall"))== 0)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
503 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
504 cmd_add_all();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
505 }
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
506 else if (strcmp_P(readbuf, PSTR("awake"))== 0)
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
507 {
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
508 cmd_awake();
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
509 }
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
510 else if (strcmp_P(readbuf, PSTR("init")) == 0)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
511 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
512 cmd_init();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
513 }
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
514 else if (strcmp_P(readbuf, PSTR("reset")) == 0)
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
515 {
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
516 cmd_reset();
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
517 }
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
518 else
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
519 {
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
520 printf_P(PSTR("Bad command\n"));
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
521 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
522 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
523
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
524 ISR(INT0_vect)
18
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
525 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
526 need_comms = 1;
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
527 comms_timeout = WAKE_SECS;
24
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
528 blink();
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
529 _delay_ms(100);
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
530 blink();
18
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
531 }
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
532
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
533
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
534 ISR(USART_RX_vect)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
535 {
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
536 char c = UDR0;
33
024f5571df8c - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 32
diff changeset
537 #ifdef HAVE_UART_ECHO
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
538 uart_putchar(c, NULL);
33
024f5571df8c - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 32
diff changeset
539 #endif
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
540 if (c == '\r' || c == '\n')
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
541 {
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
542 if (readpos > 0)
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
543 {
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
544 readbuf[readpos] = '\0';
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
545 have_cmd = 1;
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
546 readpos = 0;
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
547 }
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
548 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
549 else
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
550 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
551 readbuf[readpos] = c;
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
552 readpos++;
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
553 if (readpos >= sizeof(readbuf))
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
554 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
555 readpos = 0;
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
556 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
557 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
558 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
559
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
560 ISR(TIMER2_COMPA_vect)
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
561 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
562 TCNT2 = 0;
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
563 measure_count ++;
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
564 comms_count ++;
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
565
17
a5e3b363675d Add clock_epoch
Matt Johnston <matt@ucc.asn.au>
parents: 16
diff changeset
566 clock_epoch ++;
a5e3b363675d Add clock_epoch
Matt Johnston <matt@ucc.asn.au>
parents: 16
diff changeset
567
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
568 if (comms_timeout != 0)
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
569 {
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
570 comms_timeout--;
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
571 }
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
572
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
573 if (measure_count >= MEASURE_WAKE)
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
574 {
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
575 measure_count = 0;
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
576 need_measurement = 1;
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
577 }
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
578
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
579 if (comms_count >= COMMS_WAKE)
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
580 {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
581 comms_count = 0;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
582 need_comms = 1;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
583 }
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
584
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
585 }
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
586
3
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
587 DWORD get_fattime (void)
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
588 {
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
589 return 0;
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
590 }
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
591
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
592 static void
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
593 deep_sleep()
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
594 {
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
595 // p119 of manual
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
596 OCR2A = SLEEP_COMPARE;
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
597 loop_until_bit_is_clear(ASSR, OCR2AUB);
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
598
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
599 set_sleep_mode(SLEEP_MODE_PWR_SAVE);
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
600 sleep_mode();
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
601 }
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
602
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
603 static void
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
604 idle_sleep()
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
605 {
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
606 set_sleep_mode(SLEEP_MODE_IDLE);
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
607 sleep_mode();
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
608 }
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
609
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
610 static void
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
611 adc_internal(uint16_t *millivolt_vcc, uint16_t *int_temp)
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
612 {
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
613 PRR &= ~_BV(PRADC);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
614
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
615 // left adjust
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
616 ADMUX = _BV(ADLAR);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
617
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
618 // ADPS2 = /16 prescaler, 62khz at 1mhz clock
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
619 ADCSRA = _BV(ADEN) | _BV(ADPS2);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
620
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
621 // set to measure 1.1 reference
58
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
622 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1);
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
623 ADCSRA |= _BV(ADSC);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
624 loop_until_bit_is_clear(ADCSRA, ADSC);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
625 uint8_t low_11 = ADCL;
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
626 uint8_t high_11 = ADCH;
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
627 uint16_t f_11 = low_11 + (high_11 << 8);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
628
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
629 float res_volts = 1.1 * 1024 / f_11;
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
630 *millivolt_vcc = 1000 * res_volts;
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
631
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
632 // measure AVR internal temperature against 1.1 ref.
58
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
633 ADMUX = _BV(MUX3) | _BV(REFS1) | _BV(REFS0);
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
634 ADCSRA |= _BV(ADSC);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
635 loop_until_bit_is_clear(ADCSRA, ADSC);
58
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
636 uint8_t low_temp = ADCL;
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
637 uint8_t high_temp = ADCH;
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
638 uint16_t res_internal = low_temp + (high_temp << 8);
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
639 float internal_volts = res_internal * (1.1 / 1024.0);
58
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
640 // millivolts
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
641 *int_temp = internal_volts * 1000;
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
642
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
643 PRR |= _BV(PRADC);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
644 ADCSRA = 0;
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
645 }
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
646
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
647 #if 0
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
648 // untested
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
649 static void
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
650 do_adc_335()
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
651 {
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
652 //PRR &= ~_BV(PRADC);
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
653
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
654 ADMUX = _BV(ADLAR);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
655
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
656 // ADPS2 = /16 prescaler, 62khz at 1mhz clock
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
657 ADCSRA = _BV(ADEN) | _BV(ADPS2);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
658
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
659 // measure value
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
660 ADCSRA |= _BV(ADSC);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
661 loop_until_bit_is_clear(ADCSRA, ADSC);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
662 uint8_t low = ADCL;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
663 uint8_t high = ADCH;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
664 uint16_t f_measure = low + (high << 8);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
665
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
666 // set to measure 1.1 reference
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
667 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
668 ADCSRA |= _BV(ADSC);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
669 loop_until_bit_is_clear(ADCSRA, ADSC);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
670 uint8_t low_11 = ADCL;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
671 uint8_t high_11 = ADCH;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
672 uint16_t f_11 = low_11 + (high_11 << 8);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
673
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
674 float res_volts = 1.1 * f_measure / f_11;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
675
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
676 // 10mV/degree
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
677 // scale to 1/5 degree units above 0C
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
678 int temp = (res_volts - 2.73) * 500;
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
679 // XXX fixme
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
680 //measurements[n_measurements] = temp;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
681 // XXX something if it hits the limit
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
682
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
683 // measure AVR internal temperature against 1.1 ref.
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
684 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(REFS1) | _BV(REFS0);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
685 ADCSRA |= _BV(ADSC);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
686 loop_until_bit_is_clear(ADCSRA, ADSC);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
687 uint16_t res_internal = ADCL;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
688 res_internal |= ADCH << 8;
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
689
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
690 float internal_volts = res_internal * (1.1 / 1024.0);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
691
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
692 // 1mV/degree
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
693 int internal_temp = (internal_volts - 2.73) * 5000;
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
694 // XXX fixme
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
695 //internal_measurements[n_measurements] = internal_temp;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
696
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
697 printf_P("measure %d: external %d, internal %d, 1.1 %d\n",
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
698 n_measurements, temp, internal_temp, f_11);
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
699
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
700 n_measurements++;
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
701 //PRR |= _BV(PRADC);
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
702 }
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
703 #endif
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
704
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
705 static void
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
706 do_measurement()
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
707 {
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
708 uint8_t n_sensors;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
709 eeprom_read(n_sensors, n_sensors);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
710
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
711 simple_ds18b20_start_meas(NULL);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
712 _delay_ms(DS18B20_TCONV_12BIT);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
713
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
714 if (n_measurements == NUM_MEASUREMENTS)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
715 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
716 n_measurements = 0;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
717 }
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
718
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
719 for (uint8_t s = 0; s < MAX_SENSORS; s++)
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
720 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
721 int16_t decicelsius;
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
722 if (s >= n_sensors)
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
723 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
724 decicelsius = VALUE_NOSENSOR;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
725 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
726 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
727 {
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
728 uint8_t id[ID_LEN];
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
729 eeprom_read_to(id, sensor_id[s], ID_LEN);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
730
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
731 uint8_t ret = simple_ds18b20_read_decicelsius(id, &decicelsius);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
732 if (ret != DS18X20_OK)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
733 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
734 decicelsius = VALUE_BROKEN;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
735 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
736 }
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
737 measurements[n_measurements][s] = decicelsius;
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
738 }
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
739
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
740 if (n_measurements == 0)
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
741 {
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
742 first_measurement_clock = clock_epoch;
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
743 }
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
744 last_measurement_clock = clock_epoch;
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
745
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
746 n_measurements++;
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
747 //do_adc_335();
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
748 }
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
749
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
750 static void
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
751 do_comms()
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
752 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
753 // turn on bluetooth
24
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
754 set_aux_power(1);
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
755 uart_on();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
756
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
757 // write sd card here? same 3.3v regulator...
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
758
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
759 for (comms_timeout = WAKE_SECS; comms_timeout > 0; )
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
760 {
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
761 if (need_measurement)
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
762 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
763 need_measurement = 0;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
764 do_measurement();
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
765 continue;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
766 }
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
767
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
768 if (have_cmd)
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
769 {
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
770 have_cmd = 0;
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
771 read_handler();
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
772 continue;
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
773 }
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
774
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
775 // wait for commands from the master
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
776 idle_sleep();
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
777 }
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
778
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
779 uart_off();
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
780 // in case bluetooth takes time to flush
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
781 _delay_ms(100);
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
782 set_aux_power(0);
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
783 }
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
784
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
785 static void
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
786 blink()
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
787 {
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
788 PORT_LED &= ~_BV(PIN_LED);
9
7da9a3f23592 Import ds18x20 code
Matt Johnston <matt@ucc.asn.au>
parents: 8
diff changeset
789 _delay_ms(1);
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
790 PORT_LED |= _BV(PIN_LED);
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
791 }
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
792
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
793 static void
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
794 long_delay(int ms)
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
795 {
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
796 int iter = ms / 100;
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
797
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
798 for (int i = 0; i < iter; i++)
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
799 {
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
800 _delay_ms(100);
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
801 }
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
802 }
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
803
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
804 ISR(BADISR_vect)
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
805 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
806 //uart_on();
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
807 printf_P(PSTR("Bad interrupt\n"));
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
808 }
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
809
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
810 int main(void)
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
811 {
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
812 setup_chip();
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
813 blink();
9
7da9a3f23592 Import ds18x20 code
Matt Johnston <matt@ucc.asn.au>
parents: 8
diff changeset
814
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
815 set_aux_power(0);
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
816
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
817 stdout = &mystdout;
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
818 uart_on();
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
819
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
820 printf(PSTR("Started.\n"));
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
821
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
822 check_first_startup();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
823
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
824 uart_off();
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
825
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
826 // turn off everything except timer2
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
827 PRR = _BV(PRTWI) | _BV(PRTIM0) | _BV(PRTIM1) | _BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC);
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
828
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
829 // for testing
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
830 uart_on();
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
831
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
832 setup_tick_counter();
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
833
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
834 sei();
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
835
25
2943f62c8e62 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 24
diff changeset
836 need_comms = 1;
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
837 need_measurement = 1;
25
2943f62c8e62 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 24
diff changeset
838
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
839 for(;;)
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
840 {
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
841 if (need_measurement)
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
842 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
843 need_measurement = 0;
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
844 do_measurement();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
845 continue;
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
846 }
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
847
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
848 if (need_comms)
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
849 {
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
850 need_comms = 0;
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
851 do_comms();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
852 continue;
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
853 }
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
854
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
855 deep_sleep();
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
856 if (clock_epoch % 60 == 0)
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
857 {
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
858 blink();
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
859 }
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
860 }
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
861
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
862 return 0; /* never reached */
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
863 }