templog: main.c annotate

annotate main.c @ 360:5d86f1182f62

add "awake" and "reset" functions

author	Matt Johnston <matt@ucc.asn.au>
date	Sun, 24 Jun 2012 22:30:34 +0800
parents	71d2cc90354a
children	8e897a682208

rev	line source
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	1 #include <stdio.h>
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	2 #include <string.h>
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	3 #include <stddef.h>
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	4 #include <avr/io.h>
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	5 #include <avr/interrupt.h>
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	6 #include <avr/sleep.h>
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	7 #include <util/delay.h>
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	8 #include <avr/pgmspace.h>
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	9 #include <avr/eeprom.h>
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	10 #include <avr/wdt.h>
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	11 #include <util/crc16.h>
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	12
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	13 // for DWORD of get_fattime()
309 49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	14 #include "integer.h"
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	15
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	16 #include "simple_ds18b20.h"
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	17 #include "onewire.h"
309 49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	18
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	19 // configuration params
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	20 // - measurement interval
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	21 // - transmit interval
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	22 // - bluetooth params
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	23 // - number of sensors (and range?)
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	24
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	25 // 1 second. we have 1024 prescaler, 32768 crystal.
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	26 #define SLEEP_COMPARE 32
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	27 // limited to uint16_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	28 #define MEASURE_WAKE 60
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	29
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	30 #define VALUE_NOSENSOR -9000
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	31 #define VALUE_BROKEN -8000
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	32
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	33 // limited to uint16_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	34 #define COMMS_WAKE 3600 // XXX testing
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	35 // limited to uint8_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	36 #define WAKE_SECS 60 // XXX testing
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	37
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	38 #define BAUD 19200
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	39 #define UBRR ((F_CPU)/8/(BAUD)-1)
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	40
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	41 #define PORT_LED PORTC
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	42 #define DDR_LED DDRC
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	43 #define PIN_LED PC4
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	44
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	45 #define PORT_SHDN PORTD
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	46 #define DDR_SHDN DDRD
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	47 #define PIN_SHDN PD7
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	48
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	49 // limited to uint16_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	50 #define NUM_MEASUREMENTS 280
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	51 // limited to uint8_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	52 #define MAX_SENSORS 3
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	53
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	54 // fixed at 8, have a shorter name
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	55 #define ID_LEN OW_ROMCODE_SIZE
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	56
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	57 // #define HAVE_UART_ECHO
449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	58
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	59 int uart_putchar(char c, FILE *stream);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	60 static void long_delay(int ms);
330 7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	61 static void blink();
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	62
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	63 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	64 _FDEV_SETUP_WRITE);
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	65
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	66 uint16_t crc_out;
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	67 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	68 _FDEV_SETUP_WRITE);
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	69 // convenience
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	70 static FILE *crc_stdout = &_crc_stdout;
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	71
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	72 static uint16_t n_measurements;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	73 // stored as decidegrees
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	74 static int16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS];
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	75 static uint32_t first_measurement_clock;
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	76 // last_measurement_clock is redundant but checks that we're not missing
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	77 // samples
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	78 static uint32_t last_measurement_clock;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	79
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	80 // boolean flags
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	81 static uint8_t need_measurement;
5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	82 static uint8_t need_comms;
346 d6219df77c41 main.c: Matt Johnston <matt@ucc.asn.au> parents: 341 diff changeset	83 static uint8_t uart_enabled;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	84
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	85 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	86 static uint8_t comms_timeout;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	87
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	88 static uint8_t readpos;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	89 static char readbuf[30];
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	90 static uint8_t have_cmd;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	91
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	92 static uint16_t measure_count;
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	93 static uint16_t comms_count;
5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	94
5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	95 static uint32_t clock_epoch;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	96
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	97 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	98 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size))
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	99 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst))
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	100 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size))
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	101 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	102
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	103 #define EXPECT_MAGIC 0x67c9
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	104
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	105 struct __attribute__ ((__packed__)) __eeprom_data {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	106 uint16_t magic;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	107 uint8_t n_sensors;
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	108 uint8_t sensor_id[MAX_SENSORS][ID_LEN];
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	109 };
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	110
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	111 #define DEBUG(str) printf_P(PSTR(str))
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	112
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	113 static void deep_sleep();
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	114
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	115 // Very first setup
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	116 static void
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	117 setup_chip()
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	118 {
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	119 cli();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	120
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	121 // stop watchdog timer (might have been used to cause a reset)
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	122 wdt_reset();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	123 MCUSR &= ~_BV(WDRF);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	124 WDTCSR \|= _BV(WDCE) \| _BV(WDE);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	125 WDTCSR = 0;
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	126
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	127 // Set clock to 2mhz
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	128 CLKPR = _BV(CLKPCE);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	129 // divide by 4
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	130 CLKPR = _BV(CLKPS1);
358 71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	131
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	132 // enable pullups
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	133 PORTB = 0xff; // XXX change when using SPI
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	134 PORTD = 0xff;
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	135 PORTC = 0xff;
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	136
325 b05c9fd7c098 Merge Matt Johnston <matt@ucc.asn.au> parents: 323 324 diff changeset	137 // 3.3v power for bluetooth and SD
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	138 DDR_LED \|= _BV(PIN_LED);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	139 DDR_SHDN \|= _BV(PIN_SHDN);
325 b05c9fd7c098 Merge Matt Johnston <matt@ucc.asn.au> parents: 323 324 diff changeset	140
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	141 // set pullup
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	142 PORTD \|= _BV(PD2);
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	143 // INT0 setup
358 71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	144 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work?
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	145 EIMSK = _BV(INT0);
358 71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	146
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	147 // comparator disable
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	148 ACSR = _BV(ACD);
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	149
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	150 // disable adc pin input buffers
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	151 DIDR0 = 0x3F; // acd0-adc5
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	152 DIDR1 = (1<<AIN1D)\|(1<<AIN0D); // ain0/ain1
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	153
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	154 sei();
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	155 }
e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	156
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	157 static void
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	158 set_aux_power(uint8_t on)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	159 {
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	160 if (on)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	161 {
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	162 PORT_SHDN &= ~_BV(PIN_SHDN);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	163 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	164 else
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	165 {
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	166 PORT_SHDN \|= _BV(PIN_SHDN);
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	167 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	168 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	169
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	170 static void
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	171 setup_tick_counter()
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	172 {
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	173 // set up counter2.
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	174 // COM21 COM20 Set OC2 on Compare Match (p116)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	175 // WGM21 Clear counter on compare
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	176 //TCCR2A = _BV(COM2A1) \| _BV(COM2A0) \| _BV(WGM21);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	177 // toggle on match
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	178 TCCR2A = _BV(COM2A0);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	179 // CS22 CS21 CS20 clk/1024
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	180 TCCR2B = _BV(CS22) \| _BV(CS21) \| _BV(CS20);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	181 // set async mode
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	182 ASSR \|= _BV(AS2);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	183 TCNT2 = 0;
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	184 OCR2A = SLEEP_COMPARE;
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	185 // interrupt
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	186 TIMSK2 = _BV(OCIE2A);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	187 }
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	188
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	189 static void
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	190 uart_on()
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	191 {
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	192 // Power reduction register
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	193 PRR &= ~_BV(PRUSART0);
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	194
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	195 // All of this needs to be done each time after turning off the PRR
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	196 // baud rate
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	197 UBRR0H = (unsigned char)(UBRR >> 8);
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	198 UBRR0L = (unsigned char)UBRR;
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	199 // set 2x clock, improves accuracy of UBRR
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	200 UCSR0A \|= _BV(U2X0);
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	201 UCSR0B = _BV(RXCIE0) \| _BV(RXEN0) \| _BV(TXEN0);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	202 //8N1
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	203 UCSR0C = _BV(UCSZ01) \| _BV(UCSZ00);
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	204 uart_enabled = 1;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	205 }
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	206
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	207 static void
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	208 uart_off()
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	209 {
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	210 // Turn of interrupts and disable tx/rx
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	211 UCSR0B = 0;
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	212 uart_enabled = 0;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	213
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	214 // Power reduction register
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	215 PRR \|= _BV(PRUSART0);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	216 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	217
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	218 int
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	219 uart_putchar(char c, FILE *stream)
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	220 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	221 if (!uart_enabled)
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	222 {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	223 return EOF;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	224 }
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	225 // XXX could perhaps sleep in the loop for power.
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	226 if (c == '\n')
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	227 {
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	228 loop_until_bit_is_set(UCSR0A, UDRE0);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	229 UDR0 = '\r';
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	230 }
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	231 loop_until_bit_is_set(UCSR0A, UDRE0);
e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	232 UDR0 = c;
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	233 if (stream == crc_stdout)
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	234 {
332 05c1249da994 - Move crc16 to utils and fix it Matt Johnston <matt@ucc.asn.au> parents: 331 diff changeset	235 crc_out = _crc_ccitt_update(crc_out, c);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	236 }
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	237 if (c == '\r')
8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	238 {
8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	239 loop_until_bit_is_set(UCSR0A, UDRE0);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	240 UDR0 = '\n';
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	241 if (stream == crc_stdout)
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	242 {
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	243 crc_out = _crc_ccitt_update(crc_out, '\n');
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	244 }
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	245 }
346 d6219df77c41 main.c: Matt Johnston <matt@ucc.asn.au> parents: 341 diff changeset	246 return (unsigned char)c;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	247 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	248
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	249 static void
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	250 cmd_fetch()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	251 {
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	252 crc_out = 0;
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	253 uint8_t n_sensors;
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	254 eeprom_read(n_sensors, n_sensors);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	255
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	256 fprintf_P(crc_stdout, PSTR("START\n"));
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	257 fprintf_P(crc_stdout, PSTR("now=%lu\n"
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	258 "time_step=%hu\n"
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	259 "first_time=%lu\n"
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	260 "last_time=%lu\n"),
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	261 clock_epoch,
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	262 (uint16_t)MEASURE_WAKE,
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	263 first_measurement_clock,
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	264 last_measurement_clock);
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	265 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	266 for (uint8_t s = 0; s < n_sensors; s++)
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	267 {
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	268 uint8_t id[ID_LEN];
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	269 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	270 eeprom_read_to(id, sensor_id[s], ID_LEN);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	271 printhex(id, ID_LEN, crc_stdout);
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	272 fputc('\n', crc_stdout);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	273 }
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	274 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	275 for (uint16_t n = 0; n < n_measurements; n++)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	276 {
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	277 fprintf_P(crc_stdout, PSTR("meas%hu="), n);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	278 for (uint8_t s = 0; s < n_sensors; s++)
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	279 {
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	280 fprintf_P(crc_stdout, PSTR(" %hu"), measurements[n][s]);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	281 }
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	282 fputc('\n', crc_stdout);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	283 }
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	284 fprintf_P(crc_stdout, PSTR("END\n"));
331 5de3fc71ce48 - Make the python work on openwrt Matt Johnston <matt@ucc.asn.au> parents: 330 diff changeset	285 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	286 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	287
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	288 static void
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	289 cmd_clear()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	290 {
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	291 n_measurements = 0;
338 12123e390169 More minor work Matt Johnston <matt@ucc.asn.au> parents: 333 diff changeset	292 printf_P(PSTR("cleared\n"));
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	293 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	294
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	295 static void
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	296 cmd_btoff()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	297 {
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	298 comms_count = 0;
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	299 printf_P(PSTR("off:%hu\n"), COMMS_WAKE);
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	300 _delay_ms(100);
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	301 comms_timeout = 0;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	302 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	303
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	304 static void
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	305 cmd_awake()
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	306 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	307 comms_timeout = WAKE_SECS;
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	308 printf_P(PSTR("awake %hu\n"), WAKE_SECS);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	309 }
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	310
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	311 static void
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	312 cmd_reset()
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	313 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	314 printf_P(PSTR("reset\n"));
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	315 _delay_ms(100);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	316 cli(); // disable interrupts
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	317 wdt_enable(WDTO_15MS); // enable watchdog
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	318 while(1); // wait for watchdog to reset processor
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	319 }
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	320
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	321 static void
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	322 cmd_measure()
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	323 {
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	324 printf_P(PSTR("measuring\n"));
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	325 need_measurement = 1;
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	326 }
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	327
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	328 static void
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	329 cmd_sensors()
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	330 {
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	331 uint8_t ret = simple_ds18b20_start_meas(NULL);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	332 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret);
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	333 long_delay(DS18B20_TCONV_12BIT);
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	334 simple_ds18b20_read_all();
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	335 }
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	336
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	337 #if 0
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	338 // 0 on success
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	339 static uint8_t
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	340 get_hex_string(const char hex, uint8_t out, uint8_t size)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	341 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	342 uint8_t upper;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	343 uint8_t o;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	344 for (uint8_t i = 0, z = 0; o < size; i++)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	345 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	346 uint8_t h = hex[i];
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	347 if (h >= 'A' && h <= 'F')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	348 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	349 // lower case
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	350 h += 0x20;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	351 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	352 uint8_t nibble;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	353 if (h >= '0' && h <= '9')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	354 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	355 nibble = h - '0';
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	356 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	357 else if (h >= 'a' && h <= 'f')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	358 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	359 nibble = 10 + h - 'a';
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	360 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	361 else if (h == ' ' \|\| h == ':')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	362 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	363 continue;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	364 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	365 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	366 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	367 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	368 return 1;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	369 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	370
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	371 if (z % 2 == 0)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	372 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	373 upper = nibble << 4;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	374 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	375 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	376 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	377 out[o] = upper \| nibble;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	378 o++;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	379 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	380
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	381 z++;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	382 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	383
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	384 if (o != size)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	385 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	386 printf_P(PSTR("Short hex\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	387 return 1;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	388 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	389 return 0;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	390 }
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	391 #endif
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	392
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	393 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	394 add_sensor(uint8_t *id)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	395 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	396 uint8_t n;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	397 eeprom_read(n, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	398 if (n < MAX_SENSORS)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	399 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	400 cli();
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	401 eeprom_write_from(id, sensor_id[n], ID_LEN);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	402 n++;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	403 eeprom_write(n, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	404 sei();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	405 printf_P(PSTR("Added sensor %d : "), n);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	406 printhex(id, ID_LEN, stdout);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	407 putchar('\n');
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	408 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	409 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	410 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	411 printf_P(PSTR("Too many sensors\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	412 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	413 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	414
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	415 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	416 cmd_add_all()
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	417 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	418 uint8_t id[OW_ROMCODE_SIZE];
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	419 printf_P("Adding all\n");
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	420 ow_reset();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	421 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; )
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	422 {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	423 diff = ow_rom_search( diff, &id[0] );
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	424 if( diff == OW_PRESENCE_ERR ) {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	425 printf_P( PSTR("No Sensor found\r") );
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	426 return;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	427 }
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	428
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	429 if( diff == OW_DATA_ERR ) {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	430 printf_P( PSTR("Bus Error\r") );
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	431 return;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	432 }
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	433 add_sensor(id);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	434 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	435 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	436
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	437 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	438 cmd_init()
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	439 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	440 printf_P(PSTR("Resetting sensor list\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	441 uint8_t zero = 0;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	442 cli();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	443 eeprom_write(zero, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	444 sei();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	445 printf_P(PSTR("Done.\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	446 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	447
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	448 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	449 check_first_startup()
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	450 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	451 uint16_t magic;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	452 eeprom_read(magic, magic);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	453 if (magic != EXPECT_MAGIC)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	454 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	455 printf_P(PSTR("First boot, looking for sensors...\n"));
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	456 // in case of power fumbles don't want to reset during eeprom write,
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	457 long_delay(2);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	458 cmd_init();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	459 cmd_add_all();
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	460 cli();
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	461 magic = EXPECT_MAGIC;
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	462 eeprom_write(magic, magic);
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	463 sei();
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	464 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	465 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	466
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	467 static void
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	468 read_handler()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	469 {
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	470 if (strcmp_P(readbuf, PSTR("fetch")) == 0)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	471 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	472 cmd_fetch();
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	473 }
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	474 else if (strcmp_P(readbuf, PSTR("clear")) == 0)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	475 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	476 cmd_clear();
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	477 }
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	478 else if (strcmp_P(readbuf, PSTR("btoff")) == 0)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	479 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	480 cmd_btoff();
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	481 }
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	482 else if (strcmp_P(readbuf, PSTR("measure")) == 0)
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	483 {
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	484 cmd_measure();
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	485 }
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	486 else if (strcmp_P(readbuf, PSTR("sensors")) == 0)
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	487 {
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	488 cmd_sensors();
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	489 }
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	490 else if (strcmp_P(readbuf, PSTR("addall"))== 0)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	491 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	492 cmd_add_all();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	493 }
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	494 else if (strcmp_P(readbuf, PSTR("awake"))== 0)
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	495 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	496 cmd_awake();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	497 }
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	498 else if (strcmp_P(readbuf, PSTR("init")) == 0)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	499 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	500 cmd_init();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	501 }
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	502 else if (strcmp_P(readbuf, PSTR("reset")) == 0)
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	503 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	504 cmd_reset();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	505 }
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	506 else
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	507 {
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	508 printf_P(PSTR("Bad command\n"));
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	509 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	510 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	511
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	512 ISR(INT0_vect)
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	513 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	514 need_comms = 1;
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	515 comms_timeout = WAKE_SECS;
330 7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	516 blink();
7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	517 _delay_ms(100);
7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	518 blink();
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	519 }
e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	520
e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	521
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	522 ISR(USART_RX_vect)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	523 {
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	524 char c = UDR0;
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	525 #ifdef HAVE_UART_ECHO
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	526 uart_putchar(c, NULL);
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	527 #endif
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	528 if (c == '\r' \|\| c == '\n')
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	529 {
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	530 if (readpos > 0)
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	531 {
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	532 readbuf[readpos] = '\0';
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	533 have_cmd = 1;
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	534 readpos = 0;
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	535 }
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	536 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	537 else
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	538 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	539 readbuf[readpos] = c;
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	540 readpos++;
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	541 if (readpos >= sizeof(readbuf))
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	542 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	543 readpos = 0;
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	544 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	545 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	546 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	547
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	548 ISR(TIMER2_COMPA_vect)
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	549 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	550 TCNT2 = 0;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	551 measure_count ++;
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	552 comms_count ++;
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	553
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	554 clock_epoch ++;
5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	555
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	556 if (comms_timeout != 0)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	557 {
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	558 comms_timeout--;
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	559 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	560
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	561 if (measure_count >= MEASURE_WAKE)
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	562 {
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	563 measure_count = 0;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	564 need_measurement = 1;
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	565 }
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	566
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	567 if (comms_count >= COMMS_WAKE)
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	568 {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	569 comms_count = 0;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	570 need_comms = 1;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	571 }
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	572
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	573 }
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	574
309 49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	575 DWORD get_fattime (void)
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	576 {
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	577 return 0;
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	578 }
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	579
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	580 static void
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	581 deep_sleep()
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	582 {
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	583 // p119 of manual
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	584 OCR2A = SLEEP_COMPARE;
e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	585 loop_until_bit_is_clear(ASSR, OCR2AUB);
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	586
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	587 set_sleep_mode(SLEEP_MODE_PWR_SAVE);
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	588 sleep_mode();
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	589 }
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	590
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	591 static void
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	592 idle_sleep()
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	593 {
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	594 set_sleep_mode(SLEEP_MODE_IDLE);
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	595 sleep_mode();
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	596 }
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	597
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	598 #if 0
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	599 // untested
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	600 static void
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	601 do_adc_335()
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	602 {
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	603 //PRR &= ~_BV(PRADC);
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	604
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	605 ADMUX = _BV(ADLAR);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	606
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	607 // ADPS2 = /16 prescaler, 62khz at 1mhz clock
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	608 ADCSRA = _BV(ADEN) \| _BV(ADPS2);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	609
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	610 // measure value
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	611 ADCSRA \|= _BV(ADSC);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	612 loop_until_bit_is_clear(ADCSRA, ADSC);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	613 uint8_t low = ADCL;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	614 uint8_t high = ADCH;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	615 uint16_t f_measure = low + (high << 8);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	616
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	617 // set to measure 1.1 reference
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	618 ADMUX = _BV(ADLAR) \| _BV(MUX3) \| _BV(MUX2) \| _BV(MUX1);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	619 ADCSRA \|= _BV(ADSC);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	620 loop_until_bit_is_clear(ADCSRA, ADSC);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	621 uint8_t low_11 = ADCL;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	622 uint8_t high_11 = ADCH;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	623 uint16_t f_11 = low_11 + (high_11 << 8);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	624
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	625 float res_volts = 1.1 * f_measure / f_11;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	626
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	627 // 10mV/degree
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	628 // scale to 1/5 degree units above 0C
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	629 int temp = (res_volts - 2.73) * 500;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	630 // XXX fixme
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	631 //measurements[n_measurements] = temp;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	632 // XXX something if it hits the limit
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	633
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	634 // measure AVR internal temperature against 1.1 ref.
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	635 ADMUX = _BV(ADLAR) \| _BV(MUX3) \| _BV(REFS1) \| _BV(REFS0);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	636 ADCSRA \|= _BV(ADSC);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	637 loop_until_bit_is_clear(ADCSRA, ADSC);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	638 uint16_t res_internal = ADCL;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	639 res_internal \|= ADCH << 8;
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	640
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	641 float internal_volts = res_internal * (1.1 / 1024.0);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	642
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	643 // 1mV/degree
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	644 int internal_temp = (internal_volts - 2.73) * 5000;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	645 // XXX fixme
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	646 //internal_measurements[n_measurements] = internal_temp;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	647
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	648 printf_P("measure %d: external %d, internal %d, 1.1 %d\n",
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	649 n_measurements, temp, internal_temp, f_11);
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	650
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	651 n_measurements++;
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	652 //PRR \|= _BV(PRADC);
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	653 }
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	654 #endif
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	655
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	656 static void
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	657 do_measurement()
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	658 {
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	659 uint8_t n_sensors;
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	660 printf("do_measurement\n");
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	661 eeprom_read(n_sensors, n_sensors);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	662 printf("do_measurement sensors %d\n", n_sensors);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	663
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	664 uint8_t ret = simple_ds18b20_start_meas(NULL);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	665 printf_P(PSTR("Read all sensors, ret %d, waiting...\n"), ret);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	666 _delay_ms(DS18B20_TCONV_12BIT);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	667
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	668 if (n_measurements == NUM_MEASUREMENTS)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	669 {
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	670 printf_P(PSTR("Measurements overflow\n"));
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	671 n_measurements = 0;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	672 }
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	673
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	674 for (uint8_t s = 0; s < MAX_SENSORS; s++)
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	675 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	676 int16_t decicelsius;
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	677 if (s >= n_sensors)
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	678 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	679 decicelsius = VALUE_NOSENSOR;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	680 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	681 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	682 {
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	683 uint8_t id[ID_LEN];
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	684 eeprom_read_to(id, sensor_id[s], ID_LEN);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	685
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	686 uint8_t ret = simple_ds18b20_read_decicelsius(id, &decicelsius);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	687 if (ret != DS18X20_OK)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	688 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	689 decicelsius = VALUE_BROKEN;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	690 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	691 }
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	692 measurements[n_measurements][s] = decicelsius;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	693 }
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	694
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	695 if (n_measurements == 0)
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	696 {
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	697 first_measurement_clock = clock_epoch;
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	698 }
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	699 last_measurement_clock = clock_epoch;
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	700
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	701 n_measurements++;
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	702 //do_adc_335();
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	703 }
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	704
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	705 static void
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	706 do_comms()
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	707 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	708 // turn on bluetooth
330 7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	709 set_aux_power(1);
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	710 uart_on();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	711
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	712 // write sd card here? same 3.3v regulator...
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	713
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	714 for (comms_timeout = WAKE_SECS; comms_timeout > 0; )
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	715 {
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	716 if (need_measurement)
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	717 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	718 need_measurement = 0;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	719 do_measurement();
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	720 continue;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	721 }
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	722
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	723 if (have_cmd)
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	724 {
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	725 have_cmd = 0;
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	726 read_handler();
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	727 continue;
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	728 }
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	729
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	730 // wait for commands from the master
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	731 idle_sleep();
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	732 }
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	733
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	734 uart_off();
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	735 // in case bluetooth takes time to flush
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	736 _delay_ms(100);
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	737 set_aux_power(0);
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	738 }
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	739
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	740 static void
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	741 blink()
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	742 {
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	743 PORT_LED &= ~_BV(PIN_LED);
315 7d409dded901 Import ds18x20 code Matt Johnston <matt@ucc.asn.au> parents: 314 diff changeset	744 _delay_ms(1);
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	745 PORT_LED \|= _BV(PIN_LED);
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	746 }
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	747
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	748 static void
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	749 long_delay(int ms)
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	750 {
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	751 int iter = ms / 100;
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	752
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	753 for (int i = 0; i < iter; i++)
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	754 {
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	755 _delay_ms(100);
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	756 }
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	757 }
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	758
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	759 ISR(BADISR_vect)
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	760 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	761 //uart_on();
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	762 printf_P(PSTR("Bad interrupt\n"));
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	763 }
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	764
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	765 int main(void)
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	766 {
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	767 setup_chip();
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	768 blink();
315 7d409dded901 Import ds18x20 code Matt Johnston <matt@ucc.asn.au> parents: 314 diff changeset	769
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	770 set_aux_power(0);
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	771
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	772 stdout = &mystdout;
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	773 uart_on();
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	774
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	775 printf(PSTR("Started.\n"));
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	776
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	777 check_first_startup();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	778
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	779 uart_off();
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	780
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	781 // turn off everything except timer2
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	782 PRR = _BV(PRTWI) \| _BV(PRTIM0) \| _BV(PRTIM1) \| _BV(PRSPI) \| _BV(PRUSART0) \| _BV(PRADC);
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	783
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	784 // for testing
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	785 uart_on();
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	786
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	787 setup_tick_counter();
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	788
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	789 sei();
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	790
331 5de3fc71ce48 - Make the python work on openwrt Matt Johnston <matt@ucc.asn.au> parents: 330 diff changeset	791 need_comms = 1;
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	792 need_measurement = 1;
331 5de3fc71ce48 - Make the python work on openwrt Matt Johnston <matt@ucc.asn.au> parents: 330 diff changeset	793
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	794 for(;;)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	795 {
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	796 if (need_measurement)
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	797 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	798 need_measurement = 0;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	799 do_measurement();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	800 continue;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	801 }
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	802
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	803 if (need_comms)
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	804 {
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	805 need_comms = 0;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	806 do_comms();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	807 continue;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	808 }
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	809
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	810 deep_sleep();
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	811 if (clock_epoch % 60 == 0)
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	812 {
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	813 blink();
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	814 }
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	815 }
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	816
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	817 return 0; /* never reached */
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	818 }

Mercurial > templog

annotate main.c @ 360:5d86f1182f62