annotate main.c @ 363:99e7c2958a06

merge
author Matt Johnston <matt@ucc.asn.au>
date Sun, 24 Jun 2012 23:48:25 +0800
parents cfcd200c69da
children 5100e0bdadad
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1 #include <stdio.h>
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2 #include <string.h>
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3 #include <stddef.h>
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4 #include <avr/io.h>
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5 #include <avr/interrupt.h>
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6 #include <avr/sleep.h>
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7 #include <util/delay.h>
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8 #include <avr/pgmspace.h>
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9 #include <avr/eeprom.h>
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10 #include <avr/wdt.h>
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11 #include <util/crc16.h>
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12
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13 // for DWORD of get_fattime()
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14 #include "integer.h"
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15
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16 #include "simple_ds18b20.h"
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17 #include "onewire.h"
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18
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19 // configuration params
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20 // - measurement interval
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21 // - transmit interval
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22 // - bluetooth params
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23 // - number of sensors (and range?)
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24
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25 // 1 second. we have 1024 prescaler, 32768 crystal.
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26 #define SLEEP_COMPARE 32
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27 // limited to uint16_t
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28 #define MEASURE_WAKE 60
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30 #define VALUE_NOSENSOR -9000
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31 #define VALUE_BROKEN -8000
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32
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33 // limited to uint16_t
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34 #define COMMS_WAKE 3600 // XXX testing
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35 // limited to uint8_t
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36 #define WAKE_SECS 60 // XXX testing
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37
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38 #define BAUD 19200
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39 #define UBRR ((F_CPU)/8/(BAUD)-1)
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40
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41 #define PORT_LED PORTC
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42 #define DDR_LED DDRC
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43 #define PIN_LED PC4
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44
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45 #define PORT_SHDN PORTD
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46 #define DDR_SHDN DDRD
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47 #define PIN_SHDN PD7
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49 // limited to uint16_t
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50 // XXX - increasing this to 300 causes strange failures,
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51 // not sure why
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52 #define NUM_MEASUREMENTS 280
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53 // limited to uint8_t
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54 #define MAX_SENSORS 3
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55
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56 // fixed at 8, have a shorter name
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57 #define ID_LEN OW_ROMCODE_SIZE
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58
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59 // #define HAVE_UART_ECHO
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60
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61 int uart_putchar(char c, FILE *stream);
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62 static void long_delay(int ms);
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63 static void blink();
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64 static void adc_internal(uint16_t *millivolt_vcc, uint16_t *int_temp);
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65
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66 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
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67 _FDEV_SETUP_WRITE);
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68
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69 uint16_t crc_out;
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70 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
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71 _FDEV_SETUP_WRITE);
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72 // convenience
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73 static FILE *crc_stdout = &_crc_stdout;
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74
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75 static uint16_t n_measurements;
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76 // stored as decidegrees
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77 static int16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS];
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78 static uint32_t first_measurement_clock;
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79 // last_measurement_clock is redundant but checks that we're not missing
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80 // samples
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81 static uint32_t last_measurement_clock;
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83 // boolean flags
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84 static uint8_t need_measurement;
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85 static uint8_t need_comms;
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86 static uint8_t uart_enabled;
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87
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88 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0
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89 static uint8_t comms_timeout;
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90
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91 static uint8_t readpos;
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92 static char readbuf[30];
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93 static uint8_t have_cmd;
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94
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95 static uint16_t measure_count;
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96 static uint16_t comms_count;
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97
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98 static uint32_t clock_epoch;
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99
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100 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/
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101 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size))
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102 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst))
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103 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size))
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104 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); }
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105
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106 #define EXPECT_MAGIC 0x67c9
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107
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108 struct __attribute__ ((__packed__)) __eeprom_data {
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109 uint16_t magic;
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110 uint8_t n_sensors;
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111 uint8_t sensor_id[MAX_SENSORS][ID_LEN];
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112 };
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113
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114 #define DEBUG(str) printf_P(PSTR(str))
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115
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116 static void deep_sleep();
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117
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118 // Very first setup
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119 static void
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120 setup_chip()
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121 {
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122 cli();
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123
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124 // stop watchdog timer (might have been used to cause a reset)
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125 wdt_reset();
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126 MCUSR &= ~_BV(WDRF);
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127 WDTCSR |= _BV(WDCE) | _BV(WDE);
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128 WDTCSR = 0;
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129
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130 // Set clock to 2mhz
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131 CLKPR = _BV(CLKPCE);
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132 // divide by 4
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133 CLKPR = _BV(CLKPS1);
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134
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135 // enable pullups
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136 PORTB = 0xff; // XXX change when using SPI
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137 PORTD = 0xff;
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138 PORTC = 0xff;
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139
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140 // 3.3v power for bluetooth and SD
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141 DDR_LED |= _BV(PIN_LED);
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142 DDR_SHDN |= _BV(PIN_SHDN);
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143
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144 // set pullup
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145 PORTD |= _BV(PD2);
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146 // INT0 setup
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147 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work?
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148 EIMSK = _BV(INT0);
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149
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150 // comparator disable
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151 ACSR = _BV(ACD);
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parents: 352
diff changeset
152
71d2cc90354a try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 352
diff changeset
153 // disable adc pin input buffers
71d2cc90354a try a few more power saving measures, untested
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parents: 352
diff changeset
154 DIDR0 = 0x3F; // acd0-adc5
71d2cc90354a try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 352
diff changeset
155 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1
71d2cc90354a try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 352
diff changeset
156
71d2cc90354a try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 352
diff changeset
157 sei();
324
e3664732f11f Add INT0 button
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parents: 321
diff changeset
158 }
e3664732f11f Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
159
322
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
160 static void
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
161 set_aux_power(uint8_t on)
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
162 {
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
163 if (on)
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
164 {
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
165 PORT_SHDN &= ~_BV(PIN_SHDN);
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
166 }
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
167 else
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
168 {
349
e7f070855a22 mostly works for testing
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parents: 347
diff changeset
169 PORT_SHDN |= _BV(PIN_SHDN);
322
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
170 }
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
171 }
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Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
172
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parents: 321
diff changeset
173 static void
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Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
174 setup_tick_counter()
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parents: 321
diff changeset
175 {
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parents: 321
diff changeset
176 // set up counter2.
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parents: 321
diff changeset
177 // COM21 COM20 Set OC2 on Compare Match (p116)
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parents: 321
diff changeset
178 // WGM21 Clear counter on compare
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parents: 321
diff changeset
179 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21);
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diff changeset
180 // toggle on match
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parents: 321
diff changeset
181 TCCR2A = _BV(COM2A0);
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parents: 321
diff changeset
182 // CS22 CS21 CS20 clk/1024
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parents: 321
diff changeset
183 TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20);
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parents: 321
diff changeset
184 // set async mode
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parents: 321
diff changeset
185 ASSR |= _BV(AS2);
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parents: 321
diff changeset
186 TCNT2 = 0;
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parents: 321
diff changeset
187 OCR2A = SLEEP_COMPARE;
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parents: 321
diff changeset
188 // interrupt
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parents: 321
diff changeset
189 TIMSK2 = _BV(OCIE2A);
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parents: 321
diff changeset
190 }
324
e3664732f11f Add INT0 button
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parents: 321
diff changeset
191
306
848b0fe159d2 Some basic bits
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parents:
diff changeset
192 static void
313
139ecb1840fd serial prints something
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parents: 312
diff changeset
193 uart_on()
306
848b0fe159d2 Some basic bits
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parents:
diff changeset
194 {
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
195 // Power reduction register
352
99f8b97a9449 Use the PRR etc, set value to proper ones
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parents: 349
diff changeset
196 PRR &= ~_BV(PRUSART0);
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
197
322
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parents: 321
diff changeset
198 // All of this needs to be done each time after turning off the PRR
306
848b0fe159d2 Some basic bits
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parents:
diff changeset
199 // baud rate
313
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
200 UBRR0H = (unsigned char)(UBRR >> 8);
139ecb1840fd serial prints something
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parents: 312
diff changeset
201 UBRR0L = (unsigned char)UBRR;
139ecb1840fd serial prints something
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parents: 312
diff changeset
202 // set 2x clock, improves accuracy of UBRR
139ecb1840fd serial prints something
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parents: 312
diff changeset
203 UCSR0A |= _BV(U2X0);
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
204 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0);
306
848b0fe159d2 Some basic bits
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parents:
diff changeset
205 //8N1
313
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
206 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00);
347
56f22e29582a fix tabbing
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parents: 346
diff changeset
207 uart_enabled = 1;
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
208 }
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
209
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
210 static void
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
211 uart_off()
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
212 {
ef64a178092f - Some basic ADC code
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parents: 311
diff changeset
213 // Turn of interrupts and disable tx/rx
ef64a178092f - Some basic ADC code
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parents: 311
diff changeset
214 UCSR0B = 0;
347
56f22e29582a fix tabbing
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parents: 346
diff changeset
215 uart_enabled = 0;
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
216
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
217 // Power reduction register
352
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
218 PRR |= _BV(PRUSART0);
306
848b0fe159d2 Some basic bits
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parents:
diff changeset
219 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
220
316
8f32eb67a279 reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 315
diff changeset
221 int
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
222 uart_putchar(char c, FILE *stream)
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
223 {
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
224 if (!uart_enabled)
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
225 {
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
226 return EOF;
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
227 }
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
228 // XXX could perhaps sleep in the loop for power.
314
7aebb1452422 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 313
diff changeset
229 if (c == '\n')
7aebb1452422 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 313
diff changeset
230 {
316
8f32eb67a279 reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 315
diff changeset
231 loop_until_bit_is_set(UCSR0A, UDRE0);
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
232 UDR0 = '\r';
314
7aebb1452422 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 313
diff changeset
233 }
308
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
234 loop_until_bit_is_set(UCSR0A, UDRE0);
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
235 UDR0 = c;
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
236 if (stream == crc_stdout)
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
237 {
332
05c1249da994 - Move crc16 to utils and fix it
Matt Johnston <matt@ucc.asn.au>
parents: 331
diff changeset
238 crc_out = _crc_ccitt_update(crc_out, c);
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
239 }
316
8f32eb67a279 reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 315
diff changeset
240 if (c == '\r')
8f32eb67a279 reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 315
diff changeset
241 {
8f32eb67a279 reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 315
diff changeset
242 loop_until_bit_is_set(UCSR0A, UDRE0);
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
243 UDR0 = '\n';
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
244 if (stream == crc_stdout)
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
245 {
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
246 crc_out = _crc_ccitt_update(crc_out, '\n');
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
247 }
316
8f32eb67a279 reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 315
diff changeset
248 }
346
d6219df77c41 main.c:
Matt Johnston <matt@ucc.asn.au>
parents: 341
diff changeset
249 return (unsigned char)c;
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
250 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
251
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
252 static void
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
253 cmd_fetch()
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
254 {
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
255 crc_out = 0;
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
256 uint8_t n_sensors;
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
257 eeprom_read(n_sensors, n_sensors);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
258
361
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
259 uint16_t millivolt_vcc, int_temp;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
260
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
261 adc_internal(&millivolt_vcc, &int_temp);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
262
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
263 fprintf_P(crc_stdout, PSTR("START\n"));
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
264 fprintf_P(crc_stdout, PSTR("now=%lu\n"
341
ccab04e2f601 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 339
diff changeset
265 "time_step=%hu\n"
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
266 "first_time=%lu\n"
361
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
267 "last_time=%lu\n"
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
268 "voltage=%hu\n"
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
269 "avrtemp=%hu\n"),
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
270 clock_epoch,
341
ccab04e2f601 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 339
diff changeset
271 (uint16_t)MEASURE_WAKE,
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
272 first_measurement_clock,
361
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
273 last_measurement_clock,
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
274 millivolt_vcc,
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
275 int_temp
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
276 );
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
277 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors);
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
278 for (uint8_t s = 0; s < n_sensors; s++)
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
279 {
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
280 uint8_t id[ID_LEN];
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
281 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s);
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
282 eeprom_read_to(id, sensor_id[s], ID_LEN);
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
283 printhex(id, ID_LEN, crc_stdout);
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
284 fputc('\n', crc_stdout);
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
285 }
341
ccab04e2f601 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 339
diff changeset
286 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements);
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
287 for (uint16_t n = 0; n < n_measurements; n++)
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
288 {
352
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
289 fprintf_P(crc_stdout, PSTR("meas%hu="), n);
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
290 for (uint8_t s = 0; s < n_sensors; s++)
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
291 {
341
ccab04e2f601 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 339
diff changeset
292 fprintf_P(crc_stdout, PSTR(" %hu"), measurements[n][s]);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
293 }
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
294 fputc('\n', crc_stdout);
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
295 }
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
296 fprintf_P(crc_stdout, PSTR("END\n"));
331
5de3fc71ce48 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 330
diff changeset
297 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out);
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
298 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
299
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
300 static void
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
301 cmd_clear()
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
302 {
313
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
303 n_measurements = 0;
338
12123e390169 More minor work
Matt Johnston <matt@ucc.asn.au>
parents: 333
diff changeset
304 printf_P(PSTR("cleared\n"));
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
305 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
307 static void
848b0fe159d2 Some basic bits
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parents:
diff changeset
308 cmd_btoff()
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
309 {
352
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
310 comms_count = 0;
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
311 printf_P(PSTR("off:%hu\n"), COMMS_WAKE);
99f8b97a9449 Use the PRR etc, set value to proper ones
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parents: 349
diff changeset
312 _delay_ms(100);
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
313 comms_timeout = 0;
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
314 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
315
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
316 static void
360
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
317 cmd_awake()
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
318 {
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
319 comms_timeout = WAKE_SECS;
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
320 printf_P(PSTR("awake %hu\n"), WAKE_SECS);
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
321 }
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
322
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
323 static void
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
324 cmd_reset()
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
325 {
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
326 printf_P(PSTR("reset\n"));
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
327 _delay_ms(100);
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
328 cli(); // disable interrupts
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
329 wdt_enable(WDTO_15MS); // enable watchdog
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
330 while(1); // wait for watchdog to reset processor
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
331 }
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
332
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
333 static void
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
334 cmd_measure()
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
335 {
339
449272fc63a3 - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 338
diff changeset
336 printf_P(PSTR("measuring\n"));
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
337 need_measurement = 1;
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
338 }
31199b2941f6 Add simple_ds18b20.c etc
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parents: 316
diff changeset
339
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
340 static void
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
341 cmd_sensors()
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
342 {
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
343 uint8_t ret = simple_ds18b20_start_meas(NULL);
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
344 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret);
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
345 long_delay(DS18B20_TCONV_12BIT);
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
346 simple_ds18b20_read_all();
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
347 }
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
348
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
349 #if 0
319
9621436cfa07 Add eeprom stuff
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parents: 318
diff changeset
350 // 0 on success
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parents: 318
diff changeset
351 static uint8_t
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parents: 318
diff changeset
352 get_hex_string(const char *hex, uint8_t *out, uint8_t size)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
353 {
9621436cfa07 Add eeprom stuff
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parents: 318
diff changeset
354 uint8_t upper;
9621436cfa07 Add eeprom stuff
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parents: 318
diff changeset
355 uint8_t o;
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parents: 318
diff changeset
356 for (uint8_t i = 0, z = 0; o < size; i++)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
357 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
358 uint8_t h = hex[i];
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
359 if (h >= 'A' && h <= 'F')
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
360 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
361 // lower case
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
362 h += 0x20;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
363 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
364 uint8_t nibble;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
365 if (h >= '0' && h <= '9')
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
366 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
367 nibble = h - '0';
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
368 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
369 else if (h >= 'a' && h <= 'f')
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
370 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
371 nibble = 10 + h - 'a';
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
372 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
373 else if (h == ' ' || h == ':')
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
374 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
375 continue;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
376 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
377 else
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
378 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
379 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
380 return 1;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
381 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
382
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
383 if (z % 2 == 0)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
384 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
385 upper = nibble << 4;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
386 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
387 else
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
388 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
389 out[o] = upper | nibble;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
390 o++;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
391 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
392
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
393 z++;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
394 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
395
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
396 if (o != size)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
397 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
398 printf_P(PSTR("Short hex\n"));
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
399 return 1;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
400 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
401 return 0;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
402 }
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
403 #endif
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
404
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
405 static void
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
406 add_sensor(uint8_t *id)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
407 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
408 uint8_t n;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
409 eeprom_read(n, n_sensors);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
410 if (n < MAX_SENSORS)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
411 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
412 cli();
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
413 eeprom_write_from(id, sensor_id[n], ID_LEN);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
414 n++;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
415 eeprom_write(n, n_sensors);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
416 sei();
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
417 printf_P(PSTR("Added sensor %d : "), n);
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
418 printhex(id, ID_LEN, stdout);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
419 putchar('\n');
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
420 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
421 else
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
422 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
423 printf_P(PSTR("Too many sensors\n"));
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
424 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
425 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
426
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
427 static void
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
428 cmd_add_all()
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
429 {
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
430 uint8_t id[OW_ROMCODE_SIZE];
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
431 printf_P("Adding all\n");
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
432 ow_reset();
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
433 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; )
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
434 {
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
435 diff = ow_rom_search( diff, &id[0] );
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
436 if( diff == OW_PRESENCE_ERR ) {
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
437 printf_P( PSTR("No Sensor found\r") );
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
438 return;
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
439 }
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
440
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
441 if( diff == OW_DATA_ERR ) {
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
442 printf_P( PSTR("Bus Error\r") );
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
443 return;
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
444 }
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
445 add_sensor(id);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
446 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
447 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
448
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
449 static void
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
450 cmd_init()
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
451 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
452 printf_P(PSTR("Resetting sensor list\n"));
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
453 uint8_t zero = 0;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
454 cli();
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
455 eeprom_write(zero, n_sensors);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
456 sei();
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
457 printf_P(PSTR("Done.\n"));
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
458 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
459
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
460 static void
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
461 check_first_startup()
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
462 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
463 uint16_t magic;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
464 eeprom_read(magic, magic);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
465 if (magic != EXPECT_MAGIC)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
466 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
467 printf_P(PSTR("First boot, looking for sensors...\n"));
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
468 // in case of power fumbles don't want to reset during eeprom write,
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
469 long_delay(2);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
470 cmd_init();
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
471 cmd_add_all();
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
472 cli();
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
473 magic = EXPECT_MAGIC;
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
474 eeprom_write(magic, magic);
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
475 sei();
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
476 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
477 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
478
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
479 static void
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
480 read_handler()
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
481 {
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
482 if (strcmp_P(readbuf, PSTR("fetch")) == 0)
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
483 {
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
484 cmd_fetch();
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
485 }
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
486 else if (strcmp_P(readbuf, PSTR("clear")) == 0)
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
487 {
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
488 cmd_clear();
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
489 }
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
490 else if (strcmp_P(readbuf, PSTR("btoff")) == 0)
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
491 {
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
492 cmd_btoff();
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
493 }
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
494 else if (strcmp_P(readbuf, PSTR("measure")) == 0)
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
495 {
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
496 cmd_measure();
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
497 }
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
498 else if (strcmp_P(readbuf, PSTR("sensors")) == 0)
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
499 {
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
500 cmd_sensors();
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
501 }
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
502 else if (strcmp_P(readbuf, PSTR("addall"))== 0)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
503 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
504 cmd_add_all();
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
505 }
360
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
506 else if (strcmp_P(readbuf, PSTR("awake"))== 0)
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
507 {
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
508 cmd_awake();
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
509 }
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
510 else if (strcmp_P(readbuf, PSTR("init")) == 0)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
511 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
512 cmd_init();
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
513 }
360
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
514 else if (strcmp_P(readbuf, PSTR("reset")) == 0)
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
515 {
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
516 cmd_reset();
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
517 }
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
518 else
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
519 {
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
520 printf_P(PSTR("Bad command\n"));
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
521 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
522 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
523
326
f6b5941b4c34 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 325
diff changeset
524 ISR(INT0_vect)
324
e3664732f11f Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
525 {
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
526 need_comms = 1;
360
5d86f1182f62 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 358
diff changeset
527 comms_timeout = WAKE_SECS;
330
7ac6b8846eea - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 328
diff changeset
528 blink();
7ac6b8846eea - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 328
diff changeset
529 _delay_ms(100);
7ac6b8846eea - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 328
diff changeset
530 blink();
324
e3664732f11f Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
531 }
e3664732f11f Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
532
e3664732f11f Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
533
308
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
534 ISR(USART_RX_vect)
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
535 {
308
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
536 char c = UDR0;
339
449272fc63a3 - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 338
diff changeset
537 #ifdef HAVE_UART_ECHO
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
538 uart_putchar(c, NULL);
339
449272fc63a3 - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 338
diff changeset
539 #endif
328
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
540 if (c == '\r' || c == '\n')
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
541 {
328
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
542 if (readpos > 0)
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
543 {
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
544 readbuf[readpos] = '\0';
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
545 have_cmd = 1;
328
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
546 readpos = 0;
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
547 }
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
548 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
549 else
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
550 {
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
551 readbuf[readpos] = c;
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
552 readpos++;
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
553 if (readpos >= sizeof(readbuf))
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
554 {
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
555 readpos = 0;
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
556 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
557 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
558 }
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
559
308
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
560 ISR(TIMER2_COMPA_vect)
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
561 {
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
562 TCNT2 = 0;
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
563 measure_count ++;
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
564 comms_count ++;
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
565
323
5181ea55ea77 Add clock_epoch
Matt Johnston <matt@ucc.asn.au>
parents: 322
diff changeset
566 clock_epoch ++;
5181ea55ea77 Add clock_epoch
Matt Johnston <matt@ucc.asn.au>
parents: 322
diff changeset
567
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
568 if (comms_timeout != 0)
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
569 {
349
e7f070855a22 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 347
diff changeset
570 comms_timeout--;
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
571 }
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
572
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
573 if (measure_count >= MEASURE_WAKE)
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
574 {
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
575 measure_count = 0;
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
576 need_measurement = 1;
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
577 }
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
578
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
579 if (comms_count >= COMMS_WAKE)
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
580 {
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
581 comms_count = 0;
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
582 need_comms = 1;
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
583 }
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
584
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
585 }
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
586
309
49e83333e546 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 308
diff changeset
587 DWORD get_fattime (void)
49e83333e546 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 308
diff changeset
588 {
49e83333e546 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 308
diff changeset
589 return 0;
49e83333e546 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 308
diff changeset
590 }
49e83333e546 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 308
diff changeset
591
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
592 static void
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
593 deep_sleep()
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
594 {
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
595 // p119 of manual
308
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
596 OCR2A = SLEEP_COMPARE;
e36ee3e156c1 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 307
diff changeset
597 loop_until_bit_is_clear(ASSR, OCR2AUB);
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
598
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
599 set_sleep_mode(SLEEP_MODE_PWR_SAVE);
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
600 sleep_mode();
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
601 }
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
602
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
603 static void
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
604 idle_sleep()
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
605 {
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
606 set_sleep_mode(SLEEP_MODE_IDLE);
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
607 sleep_mode();
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
608 }
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
609
361
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
610 static void
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
611 adc_internal(uint16_t *millivolt_vcc, uint16_t *int_temp)
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
612 {
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
613 PRR &= ~_BV(PRADC);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
614
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
615 // left adjust
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
616 ADMUX = _BV(ADLAR);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
617
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
618 // ADPS2 = /16 prescaler, 62khz at 1mhz clock
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
619 ADCSRA = _BV(ADEN) | _BV(ADPS2);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
620
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
621 // set to measure 1.1 reference
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
622 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
623 ADCSRA |= _BV(ADSC);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
624 loop_until_bit_is_clear(ADCSRA, ADSC);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
625 uint8_t low_11 = ADCL;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
626 uint8_t high_11 = ADCH;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
627 uint16_t f_11 = low_11 + (high_11 << 8);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
628
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
629 float res_volts = 1.1 * 1024 / f_11;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
630 *millivolt_vcc = 1000 * res_volts;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
631
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
632 // measure AVR internal temperature against 1.1 ref.
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
633 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(REFS1) | _BV(REFS0);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
634 ADCSRA |= _BV(ADSC);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
635 loop_until_bit_is_clear(ADCSRA, ADSC);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
636 uint16_t res_internal = ADCL;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
637 res_internal |= ADCH << 8;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
638 float internal_volts = res_internal * (1.1 / 1024.0);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
639 // decidegrees
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
640 *int_temp = (internal_volts - 2.73) * 1000;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
641
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
642 PRR |= _BV(PRADC);
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
643 ADCSRA = 0;
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
644 }
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
645
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
646 #if 0
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
647 // untested
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
648 static void
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
649 do_adc_335()
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
650 {
314
7aebb1452422 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 313
diff changeset
651 //PRR &= ~_BV(PRADC);
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
652
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
653 ADMUX = _BV(ADLAR);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
654
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
655 // ADPS2 = /16 prescaler, 62khz at 1mhz clock
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
656 ADCSRA = _BV(ADEN) | _BV(ADPS2);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
657
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
658 // measure value
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
659 ADCSRA |= _BV(ADSC);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
660 loop_until_bit_is_clear(ADCSRA, ADSC);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
661 uint8_t low = ADCL;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
662 uint8_t high = ADCH;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
663 uint16_t f_measure = low + (high << 8);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
664
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
665 // set to measure 1.1 reference
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
666 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
667 ADCSRA |= _BV(ADSC);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
668 loop_until_bit_is_clear(ADCSRA, ADSC);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
669 uint8_t low_11 = ADCL;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
670 uint8_t high_11 = ADCH;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
671 uint16_t f_11 = low_11 + (high_11 << 8);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
672
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
673 float res_volts = 1.1 * f_measure / f_11;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
674
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
675 // 10mV/degree
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
676 // scale to 1/5 degree units above 0C
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
677 int temp = (res_volts - 2.73) * 500;
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
678 // XXX fixme
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
679 //measurements[n_measurements] = temp;
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
680 // XXX something if it hits the limit
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
681
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
682 // measure AVR internal temperature against 1.1 ref.
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
683 ADMUX = _BV(ADLAR) | _BV(MUX3) | _BV(REFS1) | _BV(REFS0);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
684 ADCSRA |= _BV(ADSC);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
685 loop_until_bit_is_clear(ADCSRA, ADSC);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
686 uint16_t res_internal = ADCL;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
687 res_internal |= ADCH << 8;
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
688
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
689 float internal_volts = res_internal * (1.1 / 1024.0);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
690
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
691 // 1mV/degree
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
692 int internal_temp = (internal_volts - 2.73) * 5000;
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
693 // XXX fixme
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
694 //internal_measurements[n_measurements] = internal_temp;
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
695
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
696 printf_P("measure %d: external %d, internal %d, 1.1 %d\n",
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
697 n_measurements, temp, internal_temp, f_11);
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
698
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
699 n_measurements++;
314
7aebb1452422 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 313
diff changeset
700 //PRR |= _BV(PRADC);
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
701 }
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
702 #endif
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
703
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
704 static void
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
705 do_measurement()
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
706 {
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
707 uint8_t n_sensors;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
708 eeprom_read(n_sensors, n_sensors);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
709
361
cfcd200c69da untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 360
diff changeset
710 simple_ds18b20_start_meas(NULL);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
711 _delay_ms(DS18B20_TCONV_12BIT);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
712
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
713 if (n_measurements == NUM_MEASUREMENTS)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
714 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
715 n_measurements = 0;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
716 }
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
717
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
718 for (uint8_t s = 0; s < MAX_SENSORS; s++)
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
719 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
720 int16_t decicelsius;
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
721 if (s >= n_sensors)
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
722 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
723 decicelsius = VALUE_NOSENSOR;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
724 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
725 else
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
726 {
321
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
727 uint8_t id[ID_LEN];
df7384336798 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 320
diff changeset
728 eeprom_read_to(id, sensor_id[s], ID_LEN);
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
729
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
730 uint8_t ret = simple_ds18b20_read_decicelsius(id, &decicelsius);
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
731 if (ret != DS18X20_OK)
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
732 {
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
733 decicelsius = VALUE_BROKEN;
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
734 }
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
735 }
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
736 measurements[n_measurements][s] = decicelsius;
319
9621436cfa07 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 318
diff changeset
737 }
328
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
738
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
739 if (n_measurements == 0)
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
740 {
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
741 first_measurement_clock = clock_epoch;
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
742 }
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
743 last_measurement_clock = clock_epoch;
46070aaf29ea A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 326
diff changeset
744
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
745 n_measurements++;
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
746 //do_adc_335();
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
747 }
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
748
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
749 static void
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
750 do_comms()
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
751 {
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
752 // turn on bluetooth
330
7ac6b8846eea - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 328
diff changeset
753 set_aux_power(1);
313
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
754 uart_on();
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
755
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
756 // write sd card here? same 3.3v regulator...
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
757
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
758 for (comms_timeout = WAKE_SECS; comms_timeout > 0; )
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
759 {
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
760 if (need_measurement)
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
761 {
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
762 need_measurement = 0;
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
763 do_measurement();
349
e7f070855a22 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 347
diff changeset
764 continue;
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
765 }
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
766
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
767 if (have_cmd)
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
768 {
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
769 have_cmd = 0;
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
770 read_handler();
349
e7f070855a22 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 347
diff changeset
771 continue;
333
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
772 }
298e502fdcd4 Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 332
diff changeset
773
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
774 // wait for commands from the master
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
775 idle_sleep();
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
776 }
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
777
312
ef64a178092f - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 311
diff changeset
778 uart_off();
352
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
779 // in case bluetooth takes time to flush
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
780 _delay_ms(100);
322
840f51824254 untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 321
diff changeset
781 set_aux_power(0);
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
782 }
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
783
313
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
784 static void
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
785 blink()
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
786 {
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
787 PORT_LED &= ~_BV(PIN_LED);
315
7d409dded901 Import ds18x20 code
Matt Johnston <matt@ucc.asn.au>
parents: 314
diff changeset
788 _delay_ms(1);
313
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
789 PORT_LED |= _BV(PIN_LED);
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
790 }
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
791
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
792 static void
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
793 long_delay(int ms)
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
794 {
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
795 int iter = ms / 100;
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
796
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
797 for (int i = 0; i < iter; i++)
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
798 {
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
799 _delay_ms(100);
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parents: 312
diff changeset
800 }
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
801 }
139ecb1840fd serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 312
diff changeset
802
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
803 ISR(BADISR_vect)
7aebb1452422 deep sleep works
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parents: 313
diff changeset
804 {
320
cff7a4459dc9 Lots of it works now.
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parents: 319
diff changeset
805 //uart_on();
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
806 printf_P(PSTR("Bad interrupt\n"));
7aebb1452422 deep sleep works
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parents: 313
diff changeset
807 }
7aebb1452422 deep sleep works
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parents: 313
diff changeset
808
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
809 int main(void)
848b0fe159d2 Some basic bits
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parents:
diff changeset
810 {
322
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
811 setup_chip();
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
812 blink();
315
7d409dded901 Import ds18x20 code
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parents: 314
diff changeset
813
322
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parents: 321
diff changeset
814 set_aux_power(0);
313
139ecb1840fd serial prints something
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parents: 312
diff changeset
815
312
ef64a178092f - Some basic ADC code
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parents: 311
diff changeset
816 stdout = &mystdout;
313
139ecb1840fd serial prints something
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parents: 312
diff changeset
817 uart_on();
139ecb1840fd serial prints something
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parents: 312
diff changeset
818
322
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parents: 321
diff changeset
819 printf(PSTR("Started.\n"));
319
9621436cfa07 Add eeprom stuff
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parents: 318
diff changeset
820
9621436cfa07 Add eeprom stuff
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parents: 318
diff changeset
821 check_first_startup();
9621436cfa07 Add eeprom stuff
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parents: 318
diff changeset
822
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
823 uart_off();
306
848b0fe159d2 Some basic bits
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parents:
diff changeset
824
312
ef64a178092f - Some basic ADC code
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parents: 311
diff changeset
825 // turn off everything except timer2
352
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
826 PRR = _BV(PRTWI) | _BV(PRTIM0) | _BV(PRTIM1) | _BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC);
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
827
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parents: 313
diff changeset
828 // for testing
7aebb1452422 deep sleep works
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parents: 313
diff changeset
829 uart_on();
7aebb1452422 deep sleep works
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parents: 313
diff changeset
830
322
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parents: 321
diff changeset
831 setup_tick_counter();
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parents: 321
diff changeset
832
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
833 sei();
314
7aebb1452422 deep sleep works
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parents: 313
diff changeset
834
331
5de3fc71ce48 - Make the python work on openwrt
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parents: 330
diff changeset
835 need_comms = 1;
341
ccab04e2f601 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 339
diff changeset
836 need_measurement = 1;
331
5de3fc71ce48 - Make the python work on openwrt
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parents: 330
diff changeset
837
322
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parents: 321
diff changeset
838 for(;;)
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parents: 321
diff changeset
839 {
307
e50091063890 Some counter2 bits
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parents: 306
diff changeset
840 if (need_measurement)
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
841 {
320
cff7a4459dc9 Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 319
diff changeset
842 need_measurement = 0;
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
843 do_measurement();
347
56f22e29582a fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 346
diff changeset
844 continue;
307
e50091063890 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 306
diff changeset
845 }
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
846
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
847 if (need_comms)
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
848 {
322
840f51824254 untested, add comms timeout code
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parents: 321
diff changeset
849 need_comms = 0;
310
0a64532c1de1 Fill out more main.c structure
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parents: 309
diff changeset
850 do_comms();
347
56f22e29582a fix tabbing
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parents: 346
diff changeset
851 continue;
310
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
852 }
0a64532c1de1 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 309
diff changeset
853
347
56f22e29582a fix tabbing
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parents: 346
diff changeset
854 deep_sleep();
352
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
855 if (clock_epoch % 60 == 0)
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
856 {
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
857 blink();
99f8b97a9449 Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 349
diff changeset
858 }
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
859 }
318
31199b2941f6 Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 316
diff changeset
860
306
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
861 return 0; /* never reached */
848b0fe159d2 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
862 }