Mercurial > templog
annotate main.c @ 74:cb5ea75ee599
merge
author | Matt Johnston <matt@ucc.asn.au> |
---|---|
date | Tue, 03 Jul 2012 21:55:50 +0800 |
parents | 68c1e2b26bc5 |
children | ca08442635ca |
rev | line source |
---|---|
0 | 1 #include <stdio.h> |
2 #include <string.h> | |
13 | 3 #include <stddef.h> |
1 | 4 #include <avr/io.h> |
5 #include <avr/interrupt.h> | |
6 #include <avr/sleep.h> | |
7 | 7 #include <util/delay.h> |
6 | 8 #include <avr/pgmspace.h> |
13 | 9 #include <avr/eeprom.h> |
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
10 #include <avr/wdt.h> |
59 | 11 #include <util/atomic.h> |
0 | 12 #include <util/crc16.h> |
13 | |
12 | 14 // for DWORD of get_fattime() |
3 | 15 #include "integer.h" |
12 | 16 |
17 #include "simple_ds18b20.h" | |
13 | 18 #include "onewire.h" |
3 | 19 |
0 | 20 // configuration params |
21 // - measurement interval | |
22 // - transmit interval | |
23 // - bluetooth params | |
24 // - number of sensors (and range?) | |
25 | |
1 | 26 // 1 second. we have 1024 prescaler, 32768 crystal. |
2 | 27 #define SLEEP_COMPARE 32 |
33 | 28 // limited to uint16_t |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
29 #define MEASURE_WAKE 60 |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
30 |
13 | 31 #define VALUE_NOSENSOR -9000 |
32 #define VALUE_BROKEN -8000 | |
33 | |
33 | 34 // limited to uint16_t |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
35 #define COMMS_WAKE 3600 // XXX testing |
33 | 36 // limited to uint8_t |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
37 #define WAKE_SECS 60 // XXX testing |
2 | 38 |
10 | 39 #define BAUD 19200 |
7 | 40 #define UBRR ((F_CPU)/8/(BAUD)-1) |
41 | |
42 #define PORT_LED PORTC | |
43 #define DDR_LED DDRC | |
44 #define PIN_LED PC4 | |
1 | 45 |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
46 #define PORT_SHDN PORTD |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
47 #define DDR_SHDN DDRD |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
48 #define PIN_SHDN PD7 |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
49 |
33 | 50 // limited to uint16_t |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
51 // XXX - increasing this to 300 causes strange failures, |
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
52 // not sure why |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
53 #define NUM_MEASUREMENTS 280 |
33 | 54 // limited to uint8_t |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
55 #define MAX_SENSORS 3 |
6 | 56 |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
57 // fixed at 8, have a shorter name |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
58 #define ID_LEN OW_ROMCODE_SIZE |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
59 |
33 | 60 // #define HAVE_UART_ECHO |
61 | |
10 | 62 int uart_putchar(char c, FILE *stream); |
14 | 63 static void long_delay(int ms); |
24
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
64 static void blink(); |
59 | 65 static uint16_t adc_vcc(); |
14 | 66 |
0 | 67 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
68 _FDEV_SETUP_WRITE); | |
69 | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
70 uint16_t crc_out; |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
71 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
72 _FDEV_SETUP_WRITE); |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
73 // convenience |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
74 static FILE *crc_stdout = &_crc_stdout; |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
75 |
59 | 76 // ---- Atomic guards required accessing these variables |
77 static uint32_t clock_epoch; | |
78 static uint16_t comms_count; | |
79 static uint16_t measure_count; | |
80 // ---- End atomic guards required | |
81 | |
17 | 82 static uint16_t n_measurements; |
59 | 83 |
13 | 84 // stored as decidegrees |
14 | 85 static int16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS]; |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
86 static uint32_t first_measurement_clock; |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
87 // last_measurement_clock is redundant but checks that we're not missing |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
88 // samples |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
89 static uint32_t last_measurement_clock; |
0 | 90 |
59 | 91 static uint32_t last_comms_clock; |
92 | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
93 // boolean flags |
17 | 94 static uint8_t need_measurement; |
95 static uint8_t need_comms; | |
40 | 96 static uint8_t uart_enabled; |
1 | 97 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
98 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0 |
17 | 99 static uint8_t comms_timeout; |
1 | 100 |
17 | 101 static uint8_t readpos; |
0 | 102 static char readbuf[30]; |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
103 static uint8_t have_cmd; |
0 | 104 |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
105 |
13 | 106 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ |
107 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
108 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
109 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
110 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
111 | |
112 #define EXPECT_MAGIC 0x67c9 | |
113 | |
114 struct __attribute__ ((__packed__)) __eeprom_data { | |
115 uint16_t magic; | |
116 uint8_t n_sensors; | |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
117 uint8_t sensor_id[MAX_SENSORS][ID_LEN]; |
13 | 118 }; |
119 | |
8 | 120 #define DEBUG(str) printf_P(PSTR(str)) |
121 | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
122 static void deep_sleep(); |
1 | 123 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
124 // Very first setup |
18 | 125 static void |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
126 setup_chip() |
18 | 127 { |
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
128 cli(); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
129 |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
130 // stop watchdog timer (might have been used to cause a reset) |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
131 wdt_reset(); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
132 MCUSR &= ~_BV(WDRF); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
133 WDTCSR |= _BV(WDCE) | _BV(WDE); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
134 WDTCSR = 0; |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
135 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
136 // Set clock to 2mhz |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
137 CLKPR = _BV(CLKPCE); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
138 // divide by 4 |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
139 CLKPR = _BV(CLKPS1); |
52
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
140 |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
141 // enable pullups |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
142 PORTB = 0xff; // XXX change when using SPI |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
143 PORTD = 0xff; |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
144 PORTC = 0xff; |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
145 |
19 | 146 // 3.3v power for bluetooth and SD |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
147 DDR_LED |= _BV(PIN_LED); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
148 DDR_SHDN |= _BV(PIN_SHDN); |
19 | 149 |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
150 // set pullup |
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
151 PORTD |= _BV(PD2); |
41 | 152 // INT0 setup |
52
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
153 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? |
41 | 154 EIMSK = _BV(INT0); |
52
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
155 |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
156 // comparator disable |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
157 ACSR = _BV(ACD); |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
158 |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
159 // disable adc pin input buffers |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
160 DIDR0 = 0x3F; // acd0-adc5 |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
161 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
162 |
c3f5e02c1c42
try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents:
46
diff
changeset
|
163 sei(); |
18 | 164 } |
165 | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
166 static void |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
167 set_aux_power(uint8_t on) |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
168 { |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
169 if (on) |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
170 { |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
171 PORT_SHDN &= ~_BV(PIN_SHDN); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
172 } |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
173 else |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
174 { |
44 | 175 PORT_SHDN |= _BV(PIN_SHDN); |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
176 } |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
177 } |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
178 |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
179 static void |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
180 setup_tick_counter() |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
181 { |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
182 // set up counter2. |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
183 // COM21 COM20 Set OC2 on Compare Match (p116) |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
184 // WGM21 Clear counter on compare |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
185 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
186 // toggle on match |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
187 TCCR2A = _BV(COM2A0); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
188 // CS22 CS21 CS20 clk/1024 |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
189 TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
190 // set async mode |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
191 ASSR |= _BV(AS2); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
192 TCNT2 = 0; |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
193 OCR2A = SLEEP_COMPARE; |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
194 // interrupt |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
195 TIMSK2 = _BV(OCIE2A); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
196 } |
18 | 197 |
0 | 198 static void |
7 | 199 uart_on() |
0 | 200 { |
8 | 201 // Power reduction register |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
202 PRR &= ~_BV(PRUSART0); |
8 | 203 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
204 // All of this needs to be done each time after turning off the PRR |
0 | 205 // baud rate |
7 | 206 UBRR0H = (unsigned char)(UBRR >> 8); |
207 UBRR0L = (unsigned char)UBRR; | |
208 // set 2x clock, improves accuracy of UBRR | |
209 UCSR0A |= _BV(U2X0); | |
6 | 210 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); |
0 | 211 //8N1 |
7 | 212 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); |
41 | 213 uart_enabled = 1; |
6 | 214 } |
215 | |
216 static void | |
217 uart_off() | |
218 { | |
219 // Turn of interrupts and disable tx/rx | |
220 UCSR0B = 0; | |
41 | 221 uart_enabled = 0; |
6 | 222 |
223 // Power reduction register | |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
224 PRR |= _BV(PRUSART0); |
0 | 225 } |
226 | |
10 | 227 int |
0 | 228 uart_putchar(char c, FILE *stream) |
229 { | |
41 | 230 if (!uart_enabled) |
231 { | |
232 return EOF; | |
233 } | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
234 // XXX could perhaps sleep in the loop for power. |
8 | 235 if (c == '\n') |
236 { | |
10 | 237 loop_until_bit_is_set(UCSR0A, UDRE0); |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
238 UDR0 = '\r'; |
8 | 239 } |
2 | 240 loop_until_bit_is_set(UCSR0A, UDRE0); |
241 UDR0 = c; | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
242 if (stream == crc_stdout) |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
243 { |
26
d3e5934fe55c
- Move crc16 to utils and fix it
Matt Johnston <matt@ucc.asn.au>
parents:
25
diff
changeset
|
244 crc_out = _crc_ccitt_update(crc_out, c); |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
245 } |
10 | 246 if (c == '\r') |
247 { | |
248 loop_until_bit_is_set(UCSR0A, UDRE0); | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
249 UDR0 = '\n'; |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
250 if (stream == crc_stdout) |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
251 { |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
252 crc_out = _crc_ccitt_update(crc_out, '\n'); |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
253 } |
10 | 254 } |
40 | 255 return (unsigned char)c; |
0 | 256 } |
257 | |
258 static void | |
259 cmd_fetch() | |
260 { | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
261 crc_out = 0; |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
262 uint8_t n_sensors; |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
263 eeprom_read(n_sensors, n_sensors); |
13 | 264 |
59 | 265 uint16_t millivolt_vcc = adc_vcc(); |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
266 |
59 | 267 uint32_t epoch_copy; |
268 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
269 { | |
270 epoch_copy = clock_epoch; | |
271 } | |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
272 |
60 | 273 fprintf_P(crc_stdout, PSTR("START\n" |
274 "now=%lu\n" | |
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
275 "time_step=%hu\n" |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
276 "first_time=%lu\n" |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
277 "last_time=%lu\n" |
59 | 278 "comms_time=%lu\n" |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
279 "voltage=%hu\n" |
60 | 280 ), |
59 | 281 epoch_copy, |
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
282 (uint16_t)MEASURE_WAKE, |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
283 first_measurement_clock, |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
284 last_measurement_clock, |
59 | 285 last_comms_clock, |
286 millivolt_vcc | |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
287 ); |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
288 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors); |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
289 for (uint8_t s = 0; s < n_sensors; s++) |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
290 { |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
291 uint8_t id[ID_LEN]; |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
292 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s); |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
293 eeprom_read_to(id, sensor_id[s], ID_LEN); |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
294 printhex(id, ID_LEN, crc_stdout); |
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
295 fputc('\n', crc_stdout); |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
296 } |
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
297 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements); |
14 | 298 for (uint16_t n = 0; n < n_measurements; n++) |
0 | 299 { |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
300 fprintf_P(crc_stdout, PSTR("meas%hu="), n); |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
301 for (uint8_t s = 0; s < n_sensors; s++) |
13 | 302 { |
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
303 fprintf_P(crc_stdout, PSTR(" %hu"), measurements[n][s]); |
13 | 304 } |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
305 fputc('\n', crc_stdout); |
0 | 306 } |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
307 fprintf_P(crc_stdout, PSTR("END\n")); |
25
2943f62c8e62
- Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents:
24
diff
changeset
|
308 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out); |
0 | 309 } |
310 | |
311 static void | |
312 cmd_clear() | |
313 { | |
7 | 314 n_measurements = 0; |
32 | 315 printf_P(PSTR("cleared\n")); |
0 | 316 } |
317 | |
318 static void | |
319 cmd_btoff() | |
320 { | |
59 | 321 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
322 { | |
323 comms_count = 0; | |
324 } | |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
325 printf_P(PSTR("off:%hu\n"), COMMS_WAKE); |
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
326 _delay_ms(100); |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
327 comms_timeout = 0; |
0 | 328 } |
329 | |
330 static void | |
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
331 cmd_awake() |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
332 { |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
333 comms_timeout = WAKE_SECS; |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
334 printf_P(PSTR("awake %hu\n"), WAKE_SECS); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
335 } |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
336 |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
337 static void |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
338 cmd_reset() |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
339 { |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
340 printf_P(PSTR("reset\n")); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
341 _delay_ms(100); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
342 cli(); // disable interrupts |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
343 wdt_enable(WDTO_15MS); // enable watchdog |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
344 while(1); // wait for watchdog to reset processor |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
345 } |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
346 |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
347 static void |
12 | 348 cmd_measure() |
349 { | |
33 | 350 printf_P(PSTR("measuring\n")); |
12 | 351 need_measurement = 1; |
352 } | |
353 | |
354 static void | |
355 cmd_sensors() | |
356 { | |
357 uint8_t ret = simple_ds18b20_start_meas(NULL); | |
14 | 358 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret); |
359 long_delay(DS18B20_TCONV_12BIT); | |
12 | 360 simple_ds18b20_read_all(); |
361 } | |
362 | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
363 #if 0 |
13 | 364 // 0 on success |
365 static uint8_t | |
366 get_hex_string(const char *hex, uint8_t *out, uint8_t size) | |
367 { | |
368 uint8_t upper; | |
369 uint8_t o; | |
370 for (uint8_t i = 0, z = 0; o < size; i++) | |
371 { | |
372 uint8_t h = hex[i]; | |
373 if (h >= 'A' && h <= 'F') | |
374 { | |
375 // lower case | |
376 h += 0x20; | |
377 } | |
378 uint8_t nibble; | |
379 if (h >= '0' && h <= '9') | |
380 { | |
381 nibble = h - '0'; | |
382 } | |
383 else if (h >= 'a' && h <= 'f') | |
384 { | |
385 nibble = 10 + h - 'a'; | |
386 } | |
387 else if (h == ' ' || h == ':') | |
388 { | |
389 continue; | |
390 } | |
391 else | |
392 { | |
393 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]); | |
394 return 1; | |
395 } | |
396 | |
397 if (z % 2 == 0) | |
398 { | |
399 upper = nibble << 4; | |
400 } | |
401 else | |
402 { | |
403 out[o] = upper | nibble; | |
404 o++; | |
405 } | |
406 | |
407 z++; | |
408 } | |
409 | |
410 if (o != size) | |
411 { | |
412 printf_P(PSTR("Short hex\n")); | |
413 return 1; | |
414 } | |
415 return 0; | |
416 } | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
417 #endif |
13 | 418 |
419 static void | |
420 add_sensor(uint8_t *id) | |
421 { | |
422 uint8_t n; | |
423 eeprom_read(n, n_sensors); | |
424 if (n < MAX_SENSORS) | |
425 { | |
426 cli(); | |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
427 eeprom_write_from(id, sensor_id[n], ID_LEN); |
13 | 428 n++; |
429 eeprom_write(n, n_sensors); | |
430 sei(); | |
431 printf_P(PSTR("Added sensor %d : "), n); | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
432 printhex(id, ID_LEN, stdout); |
13 | 433 putchar('\n'); |
434 } | |
435 else | |
436 { | |
437 printf_P(PSTR("Too many sensors\n")); | |
438 } | |
439 } | |
440 | |
441 static void | |
442 cmd_add_all() | |
443 { | |
41 | 444 uint8_t id[OW_ROMCODE_SIZE]; |
13 | 445 printf_P("Adding all\n"); |
446 ow_reset(); | |
41 | 447 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; ) |
448 { | |
449 diff = ow_rom_search( diff, &id[0] ); | |
450 if( diff == OW_PRESENCE_ERR ) { | |
451 printf_P( PSTR("No Sensor found\r") ); | |
452 return; | |
453 } | |
454 | |
455 if( diff == OW_DATA_ERR ) { | |
456 printf_P( PSTR("Bus Error\r") ); | |
457 return; | |
458 } | |
13 | 459 add_sensor(id); |
460 } | |
461 } | |
462 | |
463 static void | |
464 cmd_init() | |
465 { | |
466 printf_P(PSTR("Resetting sensor list\n")); | |
467 uint8_t zero = 0; | |
468 cli(); | |
469 eeprom_write(zero, n_sensors); | |
470 sei(); | |
471 printf_P(PSTR("Done.\n")); | |
472 } | |
473 | |
474 static void | |
475 check_first_startup() | |
476 { | |
477 uint16_t magic; | |
478 eeprom_read(magic, magic); | |
479 if (magic != EXPECT_MAGIC) | |
480 { | |
481 printf_P(PSTR("First boot, looking for sensors...\n")); | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
482 // in case of power fumbles don't want to reset during eeprom write, |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
483 long_delay(2); |
13 | 484 cmd_init(); |
485 cmd_add_all(); | |
14 | 486 cli(); |
487 magic = EXPECT_MAGIC; | |
488 eeprom_write(magic, magic); | |
489 sei(); | |
13 | 490 } |
491 } | |
492 | |
12 | 493 static void |
0 | 494 read_handler() |
495 { | |
6 | 496 if (strcmp_P(readbuf, PSTR("fetch")) == 0) |
0 | 497 { |
498 cmd_fetch(); | |
499 } | |
6 | 500 else if (strcmp_P(readbuf, PSTR("clear")) == 0) |
0 | 501 { |
502 cmd_clear(); | |
503 } | |
6 | 504 else if (strcmp_P(readbuf, PSTR("btoff")) == 0) |
0 | 505 { |
506 cmd_btoff(); | |
507 } | |
12 | 508 else if (strcmp_P(readbuf, PSTR("measure")) == 0) |
509 { | |
510 cmd_measure(); | |
511 } | |
512 else if (strcmp_P(readbuf, PSTR("sensors")) == 0) | |
513 { | |
514 cmd_sensors(); | |
515 } | |
13 | 516 else if (strcmp_P(readbuf, PSTR("addall"))== 0) |
517 { | |
518 cmd_add_all(); | |
519 } | |
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
520 else if (strcmp_P(readbuf, PSTR("awake"))== 0) |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
521 { |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
522 cmd_awake(); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
523 } |
13 | 524 else if (strcmp_P(readbuf, PSTR("init")) == 0) |
525 { | |
526 cmd_init(); | |
527 } | |
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
528 else if (strcmp_P(readbuf, PSTR("reset")) == 0) |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
529 { |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
530 cmd_reset(); |
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
531 } |
0 | 532 else |
533 { | |
6 | 534 printf_P(PSTR("Bad command\n")); |
0 | 535 } |
536 } | |
537 | |
20
878be5e353a0
Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents:
19
diff
changeset
|
538 ISR(INT0_vect) |
18 | 539 { |
41 | 540 need_comms = 1; |
54
0d3d14af55c2
add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents:
52
diff
changeset
|
541 comms_timeout = WAKE_SECS; |
24
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
542 blink(); |
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
543 _delay_ms(100); |
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
544 blink(); |
18 | 545 } |
546 | |
547 | |
2 | 548 ISR(USART_RX_vect) |
0 | 549 { |
2 | 550 char c = UDR0; |
33 | 551 #ifdef HAVE_UART_ECHO |
12 | 552 uart_putchar(c, NULL); |
33 | 553 #endif |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
554 if (c == '\r' || c == '\n') |
0 | 555 { |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
556 if (readpos > 0) |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
557 { |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
558 readbuf[readpos] = '\0'; |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
559 have_cmd = 1; |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
560 readpos = 0; |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
561 } |
0 | 562 } |
563 else | |
564 { | |
565 readbuf[readpos] = c; | |
566 readpos++; | |
567 if (readpos >= sizeof(readbuf)) | |
568 { | |
569 readpos = 0; | |
570 } | |
571 } | |
572 } | |
573 | |
2 | 574 ISR(TIMER2_COMPA_vect) |
1 | 575 { |
14 | 576 TCNT2 = 0; |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
577 measure_count ++; |
41 | 578 comms_count ++; |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
579 |
17 | 580 clock_epoch ++; |
581 | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
582 if (comms_timeout != 0) |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
583 { |
44 | 584 comms_timeout--; |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
585 } |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
586 |
14 | 587 if (measure_count >= MEASURE_WAKE) |
1 | 588 { |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
589 measure_count = 0; |
1 | 590 need_measurement = 1; |
591 } | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
592 |
41 | 593 if (comms_count >= COMMS_WAKE) |
594 { | |
595 comms_count = 0; | |
596 need_comms = 1; | |
597 } | |
1 | 598 } |
599 | |
3 | 600 DWORD get_fattime (void) |
601 { | |
602 return 0; | |
603 } | |
604 | |
1 | 605 static void |
606 deep_sleep() | |
607 { | |
608 // p119 of manual | |
2 | 609 OCR2A = SLEEP_COMPARE; |
610 loop_until_bit_is_clear(ASSR, OCR2AUB); | |
1 | 611 |
612 set_sleep_mode(SLEEP_MODE_PWR_SAVE); | |
613 sleep_mode(); | |
614 } | |
615 | |
616 static void | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
617 idle_sleep() |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
618 { |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
619 set_sleep_mode(SLEEP_MODE_IDLE); |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
620 sleep_mode(); |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
621 } |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
622 |
59 | 623 static uint16_t |
624 adc_vcc() | |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
625 { |
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
626 PRR &= ~_BV(PRADC); |
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
627 |
62 | 628 // /16 prescaler |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
629 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
630 |
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
631 // set to measure 1.1 reference |
58 | 632 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); |
60 | 633 // average a number of samples |
634 uint16_t sum = 0; | |
635 uint8_t num = 0; | |
636 for (uint8_t n = 0; n < 20; n++) | |
59 | 637 { |
638 ADCSRA |= _BV(ADSC); | |
639 loop_until_bit_is_clear(ADCSRA, ADSC); | |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
640 |
60 | 641 uint8_t low_11 = ADCL; |
642 uint8_t high_11 = ADCH; | |
643 uint16_t val = low_11 + (high_11 << 8); | |
6 | 644 |
60 | 645 if (n >= 4) |
646 { | |
647 sum += val; | |
648 num++; | |
649 } | |
650 } | |
651 ADCSRA = 0; | |
652 PRR |= _BV(PRADC); | |
6 | 653 |
60 | 654 float res_volts = 1.1 * 1024 * num / sum; |
6 | 655 |
59 | 656 return 1000 * res_volts; |
6 | 657 } |
658 | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
659 static void |
1 | 660 do_measurement() |
661 { | |
13 | 662 uint8_t n_sensors; |
663 eeprom_read(n_sensors, n_sensors); | |
664 | |
55
8e897a682208
untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents:
54
diff
changeset
|
665 simple_ds18b20_start_meas(NULL); |
59 | 666 // sleep rather than using a long delay |
667 deep_sleep(); | |
668 //_delay_ms(DS18B20_TCONV_12BIT); | |
13 | 669 |
670 if (n_measurements == NUM_MEASUREMENTS) | |
671 { | |
672 n_measurements = 0; | |
673 } | |
6 | 674 |
14 | 675 for (uint8_t s = 0; s < MAX_SENSORS; s++) |
13 | 676 { |
677 int16_t decicelsius; | |
14 | 678 if (s >= n_sensors) |
13 | 679 { |
680 decicelsius = VALUE_NOSENSOR; | |
681 } | |
682 else | |
683 { | |
15
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
684 uint8_t id[ID_LEN]; |
54b0fda9cba7
Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents:
14
diff
changeset
|
685 eeprom_read_to(id, sensor_id[s], ID_LEN); |
13 | 686 |
687 uint8_t ret = simple_ds18b20_read_decicelsius(id, &decicelsius); | |
688 if (ret != DS18X20_OK) | |
689 { | |
690 decicelsius = VALUE_BROKEN; | |
691 } | |
692 } | |
14 | 693 measurements[n_measurements][s] = decicelsius; |
13 | 694 } |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
695 |
59 | 696 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
697 { |
59 | 698 if (n_measurements == 0) |
699 { | |
700 first_measurement_clock = clock_epoch; | |
701 } | |
702 last_measurement_clock = clock_epoch; | |
22
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
703 } |
885532437100
A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents:
20
diff
changeset
|
704 |
14 | 705 n_measurements++; |
12 | 706 //do_adc_335(); |
1 | 707 } |
708 | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
709 static void |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
710 do_comms() |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
711 { |
41 | 712 // turn on bluetooth |
59 | 713 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
714 { | |
715 last_comms_clock = clock_epoch; | |
716 } | |
24
44c5ab5ea879
- some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents:
22
diff
changeset
|
717 set_aux_power(1); |
7 | 718 uart_on(); |
41 | 719 |
720 // write sd card here? same 3.3v regulator... | |
721 | |
722 for (comms_timeout = WAKE_SECS; comms_timeout > 0; ) | |
723 { | |
6 | 724 if (need_measurement) |
725 { | |
14 | 726 need_measurement = 0; |
6 | 727 do_measurement(); |
44 | 728 continue; |
6 | 729 } |
730 | |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
731 if (have_cmd) |
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
732 { |
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
733 have_cmd = 0; |
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
734 read_handler(); |
44 | 735 continue; |
27
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
736 } |
dbbd503119ba
Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents:
26
diff
changeset
|
737 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
738 // wait for commands from the master |
41 | 739 idle_sleep(); |
740 } | |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
741 |
6 | 742 uart_off(); |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
743 // in case bluetooth takes time to flush |
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
744 _delay_ms(100); |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
745 set_aux_power(0); |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
746 } |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
747 |
7 | 748 static void |
749 blink() | |
750 { | |
751 PORT_LED &= ~_BV(PIN_LED); | |
9 | 752 _delay_ms(1); |
7 | 753 PORT_LED |= _BV(PIN_LED); |
754 } | |
755 | |
756 static void | |
757 long_delay(int ms) | |
758 { | |
759 int iter = ms / 100; | |
760 | |
761 for (int i = 0; i < iter; i++) | |
762 { | |
763 _delay_ms(100); | |
764 } | |
765 } | |
766 | |
8 | 767 ISR(BADISR_vect) |
768 { | |
14 | 769 //uart_on(); |
8 | 770 printf_P(PSTR("Bad interrupt\n")); |
771 } | |
772 | |
0 | 773 int main(void) |
774 { | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
775 setup_chip(); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
776 blink(); |
9 | 777 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
778 set_aux_power(0); |
7 | 779 |
6 | 780 stdout = &mystdout; |
7 | 781 uart_on(); |
782 | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
783 printf(PSTR("Started.\n")); |
13 | 784 |
785 check_first_startup(); | |
786 | |
8 | 787 uart_off(); |
0 | 788 |
6 | 789 // turn off everything except timer2 |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
790 PRR = _BV(PRTWI) | _BV(PRTIM0) | _BV(PRTIM1) | _BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC); |
8 | 791 |
792 // for testing | |
793 uart_on(); | |
794 | |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
795 setup_tick_counter(); |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
796 |
12 | 797 sei(); |
8 | 798 |
25
2943f62c8e62
- Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents:
24
diff
changeset
|
799 need_comms = 1; |
36
a670a67ba489
- decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents:
33
diff
changeset
|
800 need_measurement = 1; |
25
2943f62c8e62
- Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents:
24
diff
changeset
|
801 |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
802 for(;;) |
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
803 { |
1 | 804 if (need_measurement) |
805 { | |
14 | 806 need_measurement = 0; |
1 | 807 do_measurement(); |
41 | 808 continue; |
1 | 809 } |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
810 |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
811 if (need_comms) |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
812 { |
16
5075d8c428bd
untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents:
15
diff
changeset
|
813 need_comms = 0; |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
814 do_comms(); |
41 | 815 continue; |
4
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
816 } |
54d369e3d689
Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents:
3
diff
changeset
|
817 |
41 | 818 deep_sleep(); |
46
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
819 if (clock_epoch % 60 == 0) |
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
820 { |
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
821 blink(); |
9ccd965d938a
Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents:
44
diff
changeset
|
822 } |
0 | 823 } |
12 | 824 |
0 | 825 return 0; /* never reached */ |
826 } |