annotate main.c @ 79:eb532c2a447d

don't stay awake for any command - chews battery if server goes down
author Matt Johnston <matt@ucc.asn.au>
date Mon, 09 Jul 2012 00:39:07 +0800
parents 6e47a61edc47
children 1e2068c5413a
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1 #include <stdio.h>
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2 #include <string.h>
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3 #include <stddef.h>
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4 #include <avr/io.h>
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5 #include <avr/interrupt.h>
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6 #include <avr/sleep.h>
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7 #include <util/delay.h>
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8 #include <avr/pgmspace.h>
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9 #include <avr/eeprom.h>
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10 #include <avr/wdt.h>
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11 #include <util/atomic.h>
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12 #include <util/crc16.h>
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13
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14 // for DWORD of get_fattime()
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15 #include "integer.h"
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16
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17 #include "simple_ds18b20.h"
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18 #include "onewire.h"
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19
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20 // configuration params
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21 // - measurement interval
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22 // - transmit interval
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23 // - bluetooth params
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24 // - number of sensors (and range?)
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25
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26 // 1 second. we have 1024 prescaler, 32768 crystal.
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27 #define SLEEP_COMPARE 32
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28 // limited to uint16_t
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29 #define MEASURE_WAKE 140
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30
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31 #define VALUE_NOSENSOR 0x07D0 // 125 degrees
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32 #define VALUE_BROKEN 0x07D1 // 125.0625
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33
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34 // limited to uint16_t
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35 #define COMMS_WAKE 3600 // XXX testing
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36 // limited to uint8_t
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37 #define WAKE_SECS 30 // XXX testing
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38
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39 #define BAUD 19200
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40 #define UBRR ((F_CPU)/8/(BAUD)-1)
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41
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42 #define PORT_LED PORTC
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43 #define DDR_LED DDRC
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44 #define PIN_LED PC4
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45
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46 #define PORT_SHDN PORTD
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47 #define DDR_SHDN DDRD
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48 #define PIN_SHDN PD7
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50 // limited to uint16_t
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51 // XXX - increasing this to 300 causes strange failures,
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52 // not sure why
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53 #define NUM_MEASUREMENTS 280
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54 // limited to uint8_t
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55 #define MAX_SENSORS 3
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56
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57 // fixed at 8, have a shorter name
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58 #define ID_LEN OW_ROMCODE_SIZE
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59
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60 // #define HAVE_UART_ECHO
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61
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62 int uart_putchar(char c, FILE *stream);
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63 static void long_delay(int ms);
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64 static void blink();
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65 static uint16_t adc_vcc();
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66
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67 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
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68 _FDEV_SETUP_WRITE);
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69
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70 uint16_t crc_out;
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71 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
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72 _FDEV_SETUP_WRITE);
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73 // convenience
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74 static FILE *crc_stdout = &_crc_stdout;
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75
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76 // ---- Atomic guards required accessing these variables
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77 static uint32_t clock_epoch;
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78 static uint16_t comms_count;
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79 static uint16_t measure_count;
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80 // ---- End atomic guards required
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81
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82 static uint16_t n_measurements;
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83
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84 // stored as
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85 static uint16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS];
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86 static uint32_t first_measurement_clock;
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87 // last_measurement_clock is redundant but checks that we're not missing
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88 // samples
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89 static uint32_t last_measurement_clock;
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90
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91 static uint32_t last_comms_clock;
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92
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93 // boolean flags
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94 static uint8_t need_measurement;
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95 static uint8_t need_comms;
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96 static uint8_t uart_enabled;
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97
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98 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0
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99 static uint8_t comms_timeout;
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100
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101 static uint8_t readpos;
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102 static char readbuf[30];
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103 static uint8_t have_cmd;
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104
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105 uint8_t n_sensors;
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106 uint8_t sensor_id[MAX_SENSORS][ID_LEN];
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107
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108 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/
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109 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size))
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110 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst))
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111 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size))
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112 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); }
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113
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114 #define EXPECT_MAGIC 0x67c9
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115
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116 struct __attribute__ ((__packed__)) __eeprom_data {
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117 // XXX eeprom unused at present
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118 uint16_t magic;
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119 };
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120
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121 #define DEBUG(str) printf_P(PSTR(str))
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122
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123 static void deep_sleep();
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124
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125 // Very first setup
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126 static void
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127 setup_chip()
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128 {
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129 cli();
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130
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131 // stop watchdog timer (might have been used to cause a reset)
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132 wdt_reset();
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133 MCUSR &= ~_BV(WDRF);
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134 WDTCSR |= _BV(WDCE) | _BV(WDE);
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135 WDTCSR = 0;
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136
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137 // Set clock to 2mhz
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138 CLKPR = _BV(CLKPCE);
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139 // divide by 4
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140 CLKPR = _BV(CLKPS1);
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141
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142 // enable pullups
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143 PORTB = 0xff; // XXX change when using SPI
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144 PORTD = 0xff;
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145 PORTC = 0xff;
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146
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147 // 3.3v power for bluetooth and SD
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148 DDR_LED |= _BV(PIN_LED);
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149 DDR_SHDN |= _BV(PIN_SHDN);
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parents: 17 18
diff changeset
150
46
9ccd965d938a Use the PRR etc, set value to proper ones
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parents: 44
diff changeset
151 // set pullup
9ccd965d938a Use the PRR etc, set value to proper ones
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parents: 44
diff changeset
152 PORTD |= _BV(PD2);
41
1701457e6007 fix tabbing
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parents: 40
diff changeset
153 // INT0 setup
52
c3f5e02c1c42 try a few more power saving measures, untested
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parents: 46
diff changeset
154 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work?
41
1701457e6007 fix tabbing
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parents: 40
diff changeset
155 EIMSK = _BV(INT0);
52
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
156
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
157 // comparator disable
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
158 ACSR = _BV(ACD);
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
159
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
160 // disable adc pin input buffers
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Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
161 DIDR0 = 0x3F; // acd0-adc5
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
162 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
163
c3f5e02c1c42 try a few more power saving measures, untested
Matt Johnston <matt@ucc.asn.au>
parents: 46
diff changeset
164 sei();
18
bf733e8e8cf0 Add INT0 button
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parents: 15
diff changeset
165 }
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
166
16
5075d8c428bd untested, add comms timeout code
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parents: 15
diff changeset
167 static void
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parents: 15
diff changeset
168 set_aux_power(uint8_t on)
5075d8c428bd untested, add comms timeout code
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parents: 15
diff changeset
169 {
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
170 if (on)
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
171 {
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parents: 15
diff changeset
172 PORT_SHDN &= ~_BV(PIN_SHDN);
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parents: 15
diff changeset
173 }
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
174 else
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parents: 15
diff changeset
175 {
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
176 PORT_SHDN |= _BV(PIN_SHDN);
16
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parents: 15
diff changeset
177 }
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parents: 15
diff changeset
178 }
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parents: 15
diff changeset
179
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parents: 15
diff changeset
180 static void
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
181 setup_tick_counter()
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
182 {
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
183 // set up counter2.
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
184 // COM21 COM20 Set OC2 on Compare Match (p116)
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
185 // WGM21 Clear counter on compare
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
186 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21);
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parents: 15
diff changeset
187 // toggle on match
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parents: 15
diff changeset
188 TCCR2A = _BV(COM2A0);
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parents: 15
diff changeset
189 // CS22 CS21 CS20 clk/1024
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parents: 15
diff changeset
190 TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20);
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parents: 15
diff changeset
191 // set async mode
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parents: 15
diff changeset
192 ASSR |= _BV(AS2);
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parents: 15
diff changeset
193 TCNT2 = 0;
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parents: 15
diff changeset
194 OCR2A = SLEEP_COMPARE;
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Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
195 // interrupt
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parents: 15
diff changeset
196 TIMSK2 = _BV(OCIE2A);
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parents: 15
diff changeset
197 }
18
bf733e8e8cf0 Add INT0 button
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parents: 15
diff changeset
198
0
c8b14b2950b9 Some basic bits
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parents:
diff changeset
199 static void
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
200 uart_on()
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
201 {
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
202 // Power reduction register
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
203 PRR &= ~_BV(PRUSART0);
8
c55321727d02 deep sleep works
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parents: 7
diff changeset
204
16
5075d8c428bd untested, add comms timeout code
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parents: 15
diff changeset
205 // All of this needs to be done each time after turning off the PRR
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
206 // baud rate
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
207 UBRR0H = (unsigned char)(UBRR >> 8);
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
208 UBRR0L = (unsigned char)UBRR;
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
209 // set 2x clock, improves accuracy of UBRR
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
210 UCSR0A |= _BV(U2X0);
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
211 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0);
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
212 //8N1
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
213 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00);
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
214 uart_enabled = 1;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
215 }
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
216
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
217 static void
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
218 uart_off()
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
219 {
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
220 // Turn of interrupts and disable tx/rx
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
221 UCSR0B = 0;
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
222 uart_enabled = 0;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
223
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
224 // Power reduction register
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
225 PRR |= _BV(PRUSART0);
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
226 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
227
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
228 int
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
229 uart_putchar(char c, FILE *stream)
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
230 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
231 if (!uart_enabled)
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
232 {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
233 return EOF;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
234 }
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
235 // XXX could perhaps sleep in the loop for power.
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
236 if (c == '\n')
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
237 {
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
238 loop_until_bit_is_set(UCSR0A, UDRE0);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
239 UDR0 = '\r';
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
240 }
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
241 loop_until_bit_is_set(UCSR0A, UDRE0);
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
242 UDR0 = c;
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
243 if (stream == crc_stdout)
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
244 {
26
d3e5934fe55c - Move crc16 to utils and fix it
Matt Johnston <matt@ucc.asn.au>
parents: 25
diff changeset
245 crc_out = _crc_ccitt_update(crc_out, c);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
246 }
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
247 if (c == '\r')
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
248 {
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
249 loop_until_bit_is_set(UCSR0A, UDRE0);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
250 UDR0 = '\n';
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
251 if (stream == crc_stdout)
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
252 {
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
253 crc_out = _crc_ccitt_update(crc_out, '\n');
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
254 }
10
1bfe28c348dd reading DS18B20 works
Matt Johnston <matt@ucc.asn.au>
parents: 9
diff changeset
255 }
40
9b5b202129c3 main.c:
Matt Johnston <matt@ucc.asn.au>
parents: 36
diff changeset
256 return (unsigned char)c;
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
257 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
258
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
259 static void
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
260 cmd_fetch()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
261 {
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
262 crc_out = 0;
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
263 uint16_t millivolt_vcc = adc_vcc();
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
264
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
265 uint32_t epoch_copy;
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
266 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
267 {
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
268 epoch_copy = clock_epoch;
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
269 }
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
270
60
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
271 fprintf_P(crc_stdout, PSTR("START\n"
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
272 "now=%lu\n"
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
273 "time_step=%hu\n"
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
274 "first_time=%lu\n"
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
275 "last_time=%lu\n"
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
276 "comms_time=%lu\n"
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
277 "voltage=%hu\n"
60
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
278 ),
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
279 epoch_copy,
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
280 (uint16_t)MEASURE_WAKE,
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
281 first_measurement_clock,
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
282 last_measurement_clock,
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
283 last_comms_clock,
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
284 millivolt_vcc
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
285 );
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
286 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
287 for (uint8_t s = 0; s < n_sensors; s++)
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
288 {
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
289 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s);
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
290 printhex(sensor_id[s], ID_LEN, crc_stdout);
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
291 fputc('\n', crc_stdout);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
292 }
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
293 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements);
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
294 for (uint16_t n = 0; n < n_measurements; n++)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
295 {
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
296 fprintf_P(crc_stdout, PSTR("meas%hu="), n);
15
54b0fda9cba7 Add shutdown handling, print sensors in "fetch" output
Matt Johnston <matt@ucc.asn.au>
parents: 14
diff changeset
297 for (uint8_t s = 0; s < n_sensors; s++)
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
298 {
75
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
299 fprintf_P(crc_stdout, PSTR(" %04hx"), measurements[n][s]);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
300 }
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
301 fputc('\n', crc_stdout);
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
302 }
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
303 fprintf_P(crc_stdout, PSTR("END\n"));
25
2943f62c8e62 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 24
diff changeset
304 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out);
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
305 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
306
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
307 static void
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
308 cmd_clear()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
309 {
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
310 n_measurements = 0;
32
e18d7e89c17d More minor work
Matt Johnston <matt@ucc.asn.au>
parents: 27
diff changeset
311 printf_P(PSTR("cleared\n"));
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
312 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
313
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
314 static void
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
315 cmd_btoff()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
316 {
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
317 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
318 {
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
319 comms_count = 0;
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
320 }
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
321 printf_P(PSTR("off:%hu\n"), COMMS_WAKE);
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
322 _delay_ms(100);
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
323 comms_timeout = 0;
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
324 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
325
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
326 static void
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
327 cmd_reset()
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
328 {
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
329 printf_P(PSTR("reset\n"));
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
330 _delay_ms(100);
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
331 cli(); // disable interrupts
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
332 wdt_enable(WDTO_15MS); // enable watchdog
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
333 while(1); // wait for watchdog to reset processor
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
334 }
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
335
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
336 static void
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
337 cmd_measure()
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
338 {
33
024f5571df8c - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 32
diff changeset
339 printf_P(PSTR("measuring\n"));
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
340 need_measurement = 1;
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
341 }
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
342
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
343 static void
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
344 cmd_sensors()
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
345 {
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
346 uint8_t ret = simple_ds18b20_start_meas(NULL);
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
347 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret);
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
348 long_delay(DS18B20_TCONV_12BIT);
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
349 simple_ds18b20_read_all();
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
350 }
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
351
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
352 #if 0
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
353 // 0 on success
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
354 static uint8_t
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
355 get_hex_string(const char *hex, uint8_t *out, uint8_t size)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
356 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
357 uint8_t upper;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
358 uint8_t o;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
359 for (uint8_t i = 0, z = 0; o < size; i++)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
360 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
361 uint8_t h = hex[i];
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
362 if (h >= 'A' && h <= 'F')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
363 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
364 // lower case
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
365 h += 0x20;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
366 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
367 uint8_t nibble;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
368 if (h >= '0' && h <= '9')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
369 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
370 nibble = h - '0';
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
371 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
372 else if (h >= 'a' && h <= 'f')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
373 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
374 nibble = 10 + h - 'a';
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
375 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
376 else if (h == ' ' || h == ':')
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
377 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
378 continue;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
379 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
380 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
381 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
382 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
383 return 1;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
384 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
385
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
386 if (z % 2 == 0)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
387 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
388 upper = nibble << 4;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
389 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
390 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
391 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
392 out[o] = upper | nibble;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
393 o++;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
394 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
395
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
396 z++;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
397 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
398
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
399 if (o != size)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
400 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
401 printf_P(PSTR("Short hex\n"));
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
402 return 1;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
403 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
404 return 0;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
405 }
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
406 #endif
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
407
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
408 static void
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
409 init_sensors()
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
410 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
411 uint8_t id[OW_ROMCODE_SIZE];
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
412 printf_P(PSTR("init sensors\n"));
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
413 ow_reset();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
414 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; )
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
415 {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
416 diff = ow_rom_search( diff, &id[0] );
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
417 if( diff == OW_PRESENCE_ERR ) {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
418 printf_P( PSTR("No Sensor found\r") );
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
419 return;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
420 }
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
421
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
422 if( diff == OW_DATA_ERR ) {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
423 printf_P( PSTR("Bus Error\r") );
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
424 return;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
425 }
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
426
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
427 if (n_sensors < MAX_SENSORS)
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
428 {
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
429 memcpy(sensor_id[n_sensors], id, ID_LEN);
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
430 printf_P(PSTR("Added sensor %d : "), n_sensors);
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
431 printhex(id, ID_LEN, stdout);
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
432 putchar('\n');
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
433 n_sensors++;
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
434 }
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
435 else
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
436 {
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
437 printf_P(PSTR("Too many sensors\n"));
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
438 }
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
439 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
440 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
441
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
442 static void
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
443 check_first_startup()
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
444 {
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
445 #if 0
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
446 uint16_t magic;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
447 eeprom_read(magic, magic);
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
448 if (magic != EXPECT_MAGIC)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
449 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
450 printf_P(PSTR("First boot, looking for sensors...\n"));
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
451 // in case of power fumbles don't want to reset during eeprom write,
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
452 long_delay(2);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
453 cmd_init();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
454 cmd_add_all();
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
455 cli();
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
456 magic = EXPECT_MAGIC;
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
457 eeprom_write(magic, magic);
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
458 sei();
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
459 }
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
460 #endif
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
461 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
462
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
463 static void
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
464 read_handler()
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
465 {
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
466 if (strcmp_P(readbuf, PSTR("fetch")) == 0)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
467 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
468 cmd_fetch();
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
469 }
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
470 else if (strcmp_P(readbuf, PSTR("clear")) == 0)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
471 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
472 cmd_clear();
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
473 }
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
474 else if (strcmp_P(readbuf, PSTR("btoff")) == 0)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
475 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
476 cmd_btoff();
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
477 }
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
478 else if (strcmp_P(readbuf, PSTR("measure")) == 0)
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
479 {
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
480 cmd_measure();
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
481 }
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
482 else if (strcmp_P(readbuf, PSTR("sensors")) == 0)
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
483 {
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
484 cmd_sensors();
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
485 }
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
486 else if (strcmp_P(readbuf, PSTR("reset")) == 0)
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
487 {
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
488 cmd_reset();
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
489 }
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
490 else
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
491 {
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
492 printf_P(PSTR("Bad command\n"));
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
493 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
494 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
495
20
878be5e353a0 Untested - calculate crc in uart_putchar
Matt Johnston <matt@ucc.asn.au>
parents: 19
diff changeset
496 ISR(INT0_vect)
18
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
497 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
498 need_comms = 1;
54
0d3d14af55c2 add "awake" and "reset" functions
Matt Johnston <matt@ucc.asn.au>
parents: 52
diff changeset
499 comms_timeout = WAKE_SECS;
24
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
500 blink();
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
501 _delay_ms(100);
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
502 blink();
18
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
503 }
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
504
bf733e8e8cf0 Add INT0 button
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
505
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
506 ISR(USART_RX_vect)
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
507 {
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
508 char c = UDR0;
33
024f5571df8c - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 32
diff changeset
509 #ifdef HAVE_UART_ECHO
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
510 uart_putchar(c, NULL);
33
024f5571df8c - Debug log file for server
Matt Johnston <matt@ucc.asn.au>
parents: 32
diff changeset
511 #endif
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
512 if (c == '\r' || c == '\n')
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
513 {
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
514 if (readpos > 0)
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
515 {
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
516 readbuf[readpos] = '\0';
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
517 have_cmd = 1;
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
518 readpos = 0;
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
519 }
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
520 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
521 else
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
522 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
523 readbuf[readpos] = c;
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
524 readpos++;
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
525 if (readpos >= sizeof(readbuf))
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
526 {
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
527 readpos = 0;
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
528 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
529 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
530 }
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
531
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
532 ISR(TIMER2_COMPA_vect)
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
533 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
534 TCNT2 = 0;
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
535 measure_count ++;
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
536 comms_count ++;
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
537
17
a5e3b363675d Add clock_epoch
Matt Johnston <matt@ucc.asn.au>
parents: 16
diff changeset
538 clock_epoch ++;
a5e3b363675d Add clock_epoch
Matt Johnston <matt@ucc.asn.au>
parents: 16
diff changeset
539
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
540 if (comms_timeout != 0)
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
541 {
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
542 comms_timeout--;
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
543 }
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
544
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
545 if (measure_count >= MEASURE_WAKE)
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
546 {
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
547 measure_count = 0;
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
548 need_measurement = 1;
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
549 }
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
550
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
551 if (comms_count >= COMMS_WAKE)
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
552 {
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
553 comms_count = 0;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
554 need_comms = 1;
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
555 }
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
556 }
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
557
3
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
558 DWORD get_fattime (void)
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
559 {
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
560 return 0;
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
561 }
888be1b234b6 Add FatFS
Matt Johnston <matt@ucc.asn.au>
parents: 2
diff changeset
562
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
563 static void
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
564 deep_sleep()
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
565 {
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
566 // p119 of manual
2
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
567 OCR2A = SLEEP_COMPARE;
ab0e30c4b344 switch to atmega328
Matt Johnston <matt@ucc.asn.au>
parents: 1
diff changeset
568 loop_until_bit_is_clear(ASSR, OCR2AUB);
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
569
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
570 set_sleep_mode(SLEEP_MODE_PWR_SAVE);
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
571 sleep_mode();
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
572 }
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
573
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
574 static void
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
575 idle_sleep()
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
576 {
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
577 set_sleep_mode(SLEEP_MODE_IDLE);
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
578 sleep_mode();
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
579 }
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
580
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
581 static uint16_t
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
582 adc_vcc()
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
583 {
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
584 PRR &= ~_BV(PRADC);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
585
62
Matt Johnston <matt@ucc.asn.au>
parents: 60 61
diff changeset
586 // /16 prescaler
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
587 ADCSRA = _BV(ADEN) | _BV(ADPS2);
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
588
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
589 // set to measure 1.1 reference
58
5100e0bdadad fix voltage
Matt Johnston <matt@ucc.asn.au>
parents: 55
diff changeset
590 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1);
60
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
591 // average a number of samples
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
592 uint16_t sum = 0;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
593 uint8_t num = 0;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
594 for (uint8_t n = 0; n < 20; n++)
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
595 {
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
596 ADCSRA |= _BV(ADSC);
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
597 loop_until_bit_is_clear(ADCSRA, ADSC);
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
598
60
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
599 uint8_t low_11 = ADCL;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
600 uint8_t high_11 = ADCH;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
601 uint16_t val = low_11 + (high_11 << 8);
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
602
60
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
603 if (n >= 4)
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
604 {
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
605 sum += val;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
606 num++;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
607 }
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
608 }
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
609 ADCSRA = 0;
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
610 PRR |= _BV(PRADC);
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
611
60
2ebe33714989 average voltages
Matt Johnston <matt@ucc.asn.au>
parents: 59
diff changeset
612 float res_volts = 1.1 * 1024 * num / sum;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
613
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
614 return 1000 * res_volts;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
615 }
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
616
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
617 static void
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
618 do_measurement()
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
619 {
75
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
620 blink();
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
621
55
8e897a682208 untested code to log voltage and internal temperature
Matt Johnston <matt@ucc.asn.au>
parents: 54
diff changeset
622 simple_ds18b20_start_meas(NULL);
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
623 // sleep rather than using a long delay
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
624 deep_sleep();
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
625 //_delay_ms(DS18B20_TCONV_12BIT);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
626
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
627 if (n_measurements == NUM_MEASUREMENTS)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
628 {
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
629 n_measurements = 0;
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
630 }
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
631
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
632 for (uint8_t s = 0; s < MAX_SENSORS; s++)
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
633 {
75
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
634 uint16_t reading;
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
635 if (s >= n_sensors)
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
636 {
75
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
637 reading = VALUE_NOSENSOR;
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
638 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
639 else
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
640 {
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
641 uint8_t ret = simple_ds18b20_read_raw(sensor_id[s], &reading);
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
642 if (ret != DS18X20_OK)
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
643 {
75
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
644 reading = VALUE_BROKEN;
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
645 }
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
646 }
75
ca08442635ca report raw ds18b20 values instead
Matt Johnston <matt@ucc.asn.au>
parents: 62
diff changeset
647 measurements[n_measurements][s] = reading;
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
648 }
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
649
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
650 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
651 {
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
652 if (n_measurements == 0)
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
653 {
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
654 first_measurement_clock = clock_epoch;
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
655 }
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
656 last_measurement_clock = clock_epoch;
22
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
657 }
885532437100 A bit of work on the server python
Matt Johnston <matt@ucc.asn.au>
parents: 20
diff changeset
658
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
659 n_measurements++;
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
660 //do_adc_335();
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
661 }
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
662
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
663 static void
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
664 do_comms()
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
665 {
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
666 // turn on bluetooth
59
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
667 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
668 {
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
669 last_comms_clock = clock_epoch;
d5b269352ba0 - add some atomic guards
Matt Johnston <matt@ucc.asn.au>
parents: 58
diff changeset
670 }
24
44c5ab5ea879 - some fixes for server code
Matt Johnston <matt@ucc.asn.au>
parents: 22
diff changeset
671 set_aux_power(1);
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
672 uart_on();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
673
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
674 // write sd card here? same 3.3v regulator...
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
675
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
676 for (comms_timeout = WAKE_SECS; comms_timeout > 0; )
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
677 {
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
678 if (need_measurement)
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
679 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
680 need_measurement = 0;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
681 do_measurement();
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
682 continue;
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
683 }
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
684
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
685 if (have_cmd)
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
686 {
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
687 have_cmd = 0;
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
688 read_handler();
44
96c336896201 mostly works for testing
Matt Johnston <matt@ucc.asn.au>
parents: 41
diff changeset
689 continue;
27
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
690 }
dbbd503119ba Add some web server handling
Matt Johnston <matt@ucc.asn.au>
parents: 26
diff changeset
691
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
692 // wait for commands from the master
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
693 idle_sleep();
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
694 }
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
695
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
696 uart_off();
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
697 // in case bluetooth takes time to flush
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
698 _delay_ms(100);
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
699 set_aux_power(0);
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
700 }
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
701
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
702 static void
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
703 blink()
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
704 {
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
705 PORT_LED &= ~_BV(PIN_LED);
9
7da9a3f23592 Import ds18x20 code
Matt Johnston <matt@ucc.asn.au>
parents: 8
diff changeset
706 _delay_ms(1);
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
707 PORT_LED |= _BV(PIN_LED);
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
708 }
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
709
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
710 static void
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
711 long_delay(int ms)
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
712 {
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
713 int iter = ms / 100;
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
714
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
715 for (int i = 0; i < iter; i++)
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
716 {
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
717 _delay_ms(100);
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
718 }
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
719 }
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
720
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
721 ISR(BADISR_vect)
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
722 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
723 //uart_on();
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
724 printf_P(PSTR("Bad interrupt\n"));
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
725 }
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
726
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
727 int main(void)
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
728 {
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
729 setup_chip();
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
730 blink();
9
7da9a3f23592 Import ds18x20 code
Matt Johnston <matt@ucc.asn.au>
parents: 8
diff changeset
731
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
732 set_aux_power(0);
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
733
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
734 stdout = &mystdout;
7
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
735 uart_on();
52cb08a01171 serial prints something
Matt Johnston <matt@ucc.asn.au>
parents: 6
diff changeset
736
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
737 printf(PSTR("Started.\n"));
13
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
738
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
739 check_first_startup();
4838bfcb3504 Add eeprom stuff
Matt Johnston <matt@ucc.asn.au>
parents: 12
diff changeset
740
76
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
741 init_sensors();
6e47a61edc47 don't store sensors in eeprom, scan at startup instead
Matt Johnston <matt@ucc.asn.au>
parents: 75
diff changeset
742
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
743 uart_off();
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
744
6
9d538f674ff0 - Some basic ADC code
Matt Johnston <matt@ucc.asn.au>
parents: 5
diff changeset
745 // turn off everything except timer2
46
9ccd965d938a Use the PRR etc, set value to proper ones
Matt Johnston <matt@ucc.asn.au>
parents: 44
diff changeset
746 PRR = _BV(PRTWI) | _BV(PRTIM0) | _BV(PRTIM1) | _BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC);
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
747
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
748 // for testing
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
749 uart_on();
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
750
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
751 setup_tick_counter();
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
752
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
753 sei();
8
c55321727d02 deep sleep works
Matt Johnston <matt@ucc.asn.au>
parents: 7
diff changeset
754
25
2943f62c8e62 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 24
diff changeset
755 need_comms = 1;
36
a670a67ba489 - decrease measurement interval, measure at start
Matt Johnston <matt@ucc.asn.au>
parents: 33
diff changeset
756 need_measurement = 1;
25
2943f62c8e62 - Make the python work on openwrt
Matt Johnston <matt@ucc.asn.au>
parents: 24
diff changeset
757
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
758 for(;;)
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
759 {
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
760 if (need_measurement)
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
761 {
14
426fb44ece3f Lots of it works now.
Matt Johnston <matt@ucc.asn.au>
parents: 13
diff changeset
762 need_measurement = 0;
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
763 do_measurement();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
764 continue;
1
1d1897d66b03 Some counter2 bits
Matt Johnston <matt@ucc.asn.au>
parents: 0
diff changeset
765 }
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
766
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
767 if (need_comms)
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
768 {
16
5075d8c428bd untested, add comms timeout code
Matt Johnston <matt@ucc.asn.au>
parents: 15
diff changeset
769 need_comms = 0;
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
770 do_comms();
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
771 continue;
4
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
772 }
54d369e3d689 Fill out more main.c structure
Matt Johnston <matt@ucc.asn.au>
parents: 3
diff changeset
773
41
1701457e6007 fix tabbing
Matt Johnston <matt@ucc.asn.au>
parents: 40
diff changeset
774 deep_sleep();
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
775 }
12
3c27bfbd7f3a Add simple_ds18b20.c etc
Matt Johnston <matt@ucc.asn.au>
parents: 10
diff changeset
776
0
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
777 return 0; /* never reached */
c8b14b2950b9 Some basic bits
Matt Johnston <matt@ucc.asn.au>
parents:
diff changeset
778 }