Mercurial > pihelp
annotate main.c @ 17:21717153e0f1
change clock to 4915200
improve argument parser
| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Thu, 13 Jun 2013 20:42:54 +0800 |
| parents | 8b1aeff120e9 |
| children | 021e6e0006f4 |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 3 #include <stddef.h> | |
| 4 #include <stdbool.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <avr/io.h> | |
| 7 #include <avr/interrupt.h> | |
| 8 #include <avr/sleep.h> | |
| 9 #include <util/delay.h> | |
| 10 #include <avr/pgmspace.h> | |
| 11 #include <avr/eeprom.h> | |
| 12 #include <avr/wdt.h> | |
| 13 #include <util/atomic.h> | |
| 14 #include <util/crc16.h> | |
| 15 | |
| 2 | 16 #include "hmac-sha1.h" |
| 5 | 17 #include "aes.h" |
| 2 | 18 |
| 1 | 19 //#include "simple_ds18b20.h" |
| 20 //#include "onewire.h" | |
| 0 | 21 |
| 5 | 22 LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); |
| 23 | |
| 0 | 24 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
| 25 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
| 26 | |
| 27 // TICK should be 8 or less (8 untested). all timers need | |
| 28 // to be a multiple. | |
| 29 | |
| 1 | 30 #define TICK 1 |
| 17 | 31 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
| 5 | 32 #define NKEYS 10 |
| 33 #define HMACLEN 20 | |
| 34 #define AESLEN 16 | |
| 35 #define KEYLEN HMACLEN | |
| 1 | 36 |
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37 #define BAUD 38400 |
| 0 | 38 #define UBRR ((F_CPU)/8/(BAUD)-1) |
| 39 | |
| 2 | 40 #define PORT_PI_BOOT PORTD |
| 41 #define DDR_PI_BOOT DDRD | |
| 4 | 42 #define PIN_PI_BOOT PD5 |
| 2 | 43 |
| 44 #define PORT_PI_RESET PORTD | |
| 45 #define DDR_PI_RESET DDRD | |
| 46 #define PIN_PI_RESET PD6 | |
| 47 | |
| 4 | 48 #define PORT_LED PORTD |
| 49 #define DDR_LED DDRD | |
| 50 #define PIN_LED PD7 | |
| 0 | 51 |
| 52 // #define HAVE_UART_ECHO | |
| 53 | |
| 7 | 54 // stores a value of clock_epoch combined with the remainder of TCNT1, |
| 0 | 55 // for 1/32 second accuracy |
| 56 struct epoch_ticks | |
| 57 { | |
| 58 uint32_t ticks; | |
| 59 // remainder | |
| 60 uint8_t rem; | |
| 61 }; | |
| 62 | |
| 16 | 63 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
| 64 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
| 65 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
| 66 | |
| 67 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
| 68 | |
| 69 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
| 70 #define NEWBOOT_MIN (60*2) // 2 minutes | |
| 71 #define NEWBOOT_MAX (60*30) // 30 mins | |
| 72 | |
| 1 | 73 // eeprom-settable parameters, default values defined here. |
| 74 // all timeouts should be a multiple of TICK | |
| 16 | 75 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
| 1 | 76 static uint32_t watchdog_short_limit = 0; |
| 16 | 77 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
| 0 | 78 |
| 1 | 79 // avr proves itself |
| 2 | 80 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
| 0 | 81 |
| 82 // ---- Atomic guards required accessing these variables | |
| 83 // clock_epoch in seconds | |
| 84 static uint32_t clock_epoch; | |
| 1 | 85 // watchdog counts up |
| 86 static uint32_t watchdog_long_count; | |
| 87 static uint32_t watchdog_short_count; | |
| 2 | 88 // newboot counts down |
| 1 | 89 static uint32_t newboot_count; |
| 2 | 90 // oneshot counts down |
| 91 static uint32_t oneshot_count; | |
| 92 | |
| 0 | 93 // ---- End atomic guards required |
| 94 | |
| 95 // boolean flags | |
| 1 | 96 static uint8_t watchdog_long_hit; |
| 97 static uint8_t watchdog_short_hit; | |
| 98 static uint8_t newboot_hit; | |
| 2 | 99 static uint8_t oneshot_hit; |
| 0 | 100 |
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parents:
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changeset
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101 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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parents:
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changeset
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102 // working firmware should boot. set back to 0 for each 'alive' |
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103 // command |
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104 static uint8_t long_reboot_mode = 0; |
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parents:
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105 |
| 0 | 106 static uint8_t readpos; |
| 1 | 107 static char readbuf[50]; |
| 0 | 108 static uint8_t have_cmd; |
| 109 | |
| 110 int uart_putchar(char c, FILE *stream); | |
| 111 static void long_delay(int ms); | |
| 112 static void blink(); | |
| 113 static uint16_t adc_vcc(); | |
| 2 | 114 static void set_pi_boot_normal(uint8_t normal); |
| 0 | 115 |
| 17 | 116 |
| 0 | 117 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
| 118 _FDEV_SETUP_WRITE); | |
| 119 | |
| 120 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
| 121 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 122 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 123 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 124 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 125 | |
| 1 | 126 #define EXPECT_MAGIC 0xdf83 |
| 0 | 127 |
| 128 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 1 | 129 uint32_t watchdog_long_limit; |
| 130 uint32_t watchdog_short_limit; | |
| 131 uint32_t newboot_limit; | |
| 0 | 132 |
| 2 | 133 uint8_t avr_keys[NKEYS][KEYLEN]; |
| 0 | 134 |
| 135 uint16_t magic; | |
| 136 }; | |
| 137 | |
| 138 // Very first setup | |
| 139 static void | |
| 140 setup_chip() | |
| 141 { | |
| 142 cli(); | |
| 143 | |
| 144 // stop watchdog timer (might have been used to cause a reset) | |
| 145 wdt_reset(); | |
| 146 MCUSR &= ~_BV(WDRF); | |
| 147 WDTCSR |= _BV(WDCE) | _BV(WDE); | |
| 148 WDTCSR = 0; | |
| 149 | |
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fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
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150 // set to 8 seconds, in case sha1 is slow etc. |
| 1 | 151 wdt_enable(WDTO_8S); |
| 152 | |
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915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
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153 // Set scaler to /1, -> clock to 8mhz |
| 0 | 154 CLKPR = _BV(CLKPCE); |
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915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
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155 CLKPR = 0; |
| 0 | 156 |
| 157 // enable pullups | |
| 1 | 158 // XXX matt pihelp |
| 5 | 159 //PORTB = 0xff; // XXX change when using SPI |
| 160 //PORTD = 0xff; | |
| 161 //PORTC = 0xff; | |
| 0 | 162 |
| 163 // 3.3v power for bluetooth and SD | |
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fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
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164 //DDR_LED |= _BV(PIN_LED); |
| 0 | 165 |
| 5 | 166 #if 0 |
| 0 | 167 // set pullup |
| 168 PORTD |= _BV(PD2); | |
| 169 // INT0 setup | |
| 170 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
| 171 EIMSK = _BV(INT0); | |
| 5 | 172 #endif |
| 0 | 173 |
| 174 // comparator disable | |
| 175 ACSR = _BV(ACD); | |
| 176 | |
| 177 // disable adc pin input buffers | |
| 178 DIDR0 = 0x3F; // acd0-adc5 | |
| 179 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
| 180 | |
| 181 sei(); | |
| 182 } | |
| 183 | |
| 184 static void | |
| 185 get_epoch_ticks(struct epoch_ticks *t) | |
| 186 { | |
| 187 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 188 { | |
| 189 t->ticks = clock_epoch; | |
| 7 | 190 t->rem = TCNT1; |
| 0 | 191 } |
| 192 } | |
| 193 | |
| 194 static void | |
| 195 setup_tick_counter() | |
| 196 { | |
| 2 | 197 // set up counter1 |
| 198 | |
| 0 | 199 // set up counter2. |
| 200 // COM21 COM20 Set OC2 on Compare Match (p116) | |
| 201 // WGM21 Clear counter on compare | |
| 202 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
| 203 // toggle on match | |
| 2 | 204 TCCR1A = _BV(COM1A0); |
| 8 | 205 #ifdef SIM_DEBUG |
| 206 // systemclock/8 | |
| 207 TCCR1B = _BV(CS11); | |
| 208 #else | |
| 7 | 209 // systemclock/64 |
| 210 TCCR1B = _BV(CS11) | _BV(CS10); | |
| 8 | 211 #endif |
| 2 | 212 TCNT1 = 0; |
| 213 OCR1A = SLEEP_COMPARE; | |
| 0 | 214 // interrupt |
| 2 | 215 TIMSK1 = _BV(OCIE1A); |
| 0 | 216 } |
| 217 | |
| 218 static void | |
| 219 uart_on() | |
| 220 { | |
| 221 // Power reduction register | |
| 222 PRR &= ~_BV(PRUSART0); | |
| 223 | |
| 224 // All of this needs to be done each time after turning off the PRR | |
| 225 // baud rate | |
| 226 UBRR0H = (unsigned char)(UBRR >> 8); | |
| 227 UBRR0L = (unsigned char)UBRR; | |
| 228 // set 2x clock, improves accuracy of UBRR | |
| 229 UCSR0A |= _BV(U2X0); | |
| 230 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
| 231 //8N1 | |
| 232 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
| 233 } | |
| 234 | |
| 235 int | |
| 236 uart_putchar(char c, FILE *stream) | |
| 237 { | |
| 238 // XXX could perhaps sleep in the loop for power. | |
| 239 if (c == '\n') | |
| 240 { | |
| 241 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 242 UDR0 = '\r'; | |
| 243 } | |
| 244 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 245 UDR0 = c; | |
| 246 if (c == '\r') | |
| 247 { | |
| 248 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 249 UDR0 = '\n'; | |
| 250 } | |
| 251 return (unsigned char)c; | |
| 252 } | |
| 253 | |
| 254 static void | |
| 255 cmd_reset() | |
| 256 { | |
| 257 printf_P(PSTR("reset\n")); | |
| 258 _delay_ms(100); | |
| 259 cli(); // disable interrupts | |
| 260 wdt_enable(WDTO_15MS); // enable watchdog | |
| 261 while(1); // wait for watchdog to reset processor | |
| 262 } | |
| 263 | |
| 2 | 264 static void |
| 265 cmd_newboot() | |
| 266 { | |
| 267 set_pi_boot_normal(1); | |
| 268 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 269 { | |
| 270 newboot_count = newboot_limit; | |
| 271 } | |
| 272 printf_P(PSTR("newboot for %d secs"), newboot_limit); | |
| 273 } | |
| 274 | |
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915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
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275 static void |
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parents:
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276 cmd_oldboot() |
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parents:
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277 { |
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parents:
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278 set_pi_boot_normal(0); |
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279 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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parents:
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280 { |
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parents:
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281 newboot_count = 0; |
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parents:
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282 } |
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parents:
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283 printf_P(PSTR("back to old boot\n")); |
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parents:
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284 } |
| 1 | 285 |
| 0 | 286 |
| 287 static void | |
| 1 | 288 cmd_get_params() |
| 0 | 289 { |
| 2 | 290 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
| 1 | 291 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
| 292 { | |
| 2 | 293 cur_watchdog_long = watchdog_long_count; |
| 294 cur_watchdog_short = watchdog_short_count; | |
| 295 cur_newboot = newboot_count; | |
| 296 cur_oneshot = oneshot_count; | |
| 1 | 297 } |
| 298 | |
| 2 | 299 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu) oneshot (%lu)\n"), |
| 1 | 300 watchdog_long_limit, |
| 2 | 301 cur_watchdog_long, |
| 1 | 302 watchdog_short_limit, |
| 2 | 303 cur_watchdog_short, |
| 1 | 304 newboot_limit, |
| 2 | 305 cur_newboot, |
| 306 cur_oneshot); | |
| 0 | 307 } |
| 308 | |
| 309 static void | |
| 1 | 310 cmd_set_params(const char *params) |
| 0 | 311 { |
| 1 | 312 uint32_t new_watchdog_long_limit; |
| 313 uint32_t new_watchdog_short_limit; | |
| 314 uint32_t new_newboot_limit; | |
| 315 | |
| 316 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
| 317 &new_watchdog_long_limit, | |
| 318 &new_watchdog_short_limit, | |
| 319 &new_newboot_limit); | |
| 320 | |
| 321 | |
| 322 if (ret != 3) | |
| 0 | 323 { |
| 1 | 324 printf_P(PSTR("Bad values\n")); |
| 325 } | |
| 326 else | |
| 327 { | |
| 328 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 329 { | |
| 330 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
| 331 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
| 332 eeprom_write(new_newboot_limit, newboot_limit); | |
| 333 uint16_t magic = EXPECT_MAGIC; | |
| 334 eeprom_write(magic, magic); | |
| 0 | 335 } |
| 1 | 336 printf_P(PSTR("set_params for next boot\n")); |
| 337 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
| 338 new_watchdog_long_limit, | |
| 339 new_watchdog_short_limit, | |
| 340 new_newboot_limit); | |
| 341 | |
| 342 } | |
| 343 } | |
| 0 | 344 |
| 1 | 345 uint8_t from_hex(char c) |
| 346 { | |
| 347 if (c >= '0' && c <= '9') { | |
| 348 return c-'0'; | |
| 349 } | |
| 350 if (c >= 'a' && c <= 'f') { | |
| 351 return c-'a' + 0xa; | |
| 352 } | |
| 353 if (c >= 'A' && c <= 'F') { | |
| 354 return c-'A' + 0xa; | |
| 355 } | |
| 356 return 0; | |
| 357 } | |
| 358 | |
| 2 | 359 static void |
| 360 printhex_nibble(const unsigned char b, FILE *stream) | |
| 361 { | |
| 362 unsigned char c = b & 0x0f; | |
| 363 if ( c > 9 ) { | |
| 364 c += 'A'-10; | |
| 365 } | |
| 366 else { | |
| 367 c += '0'; | |
| 368 } | |
| 369 fputc(c, stream); | |
| 370 } | |
| 371 | |
| 372 void | |
| 373 printhex_byte(const unsigned char b, FILE *stream) | |
| 374 { | |
| 375 printhex_nibble( b >> 4, stream); | |
| 376 printhex_nibble( b, stream); | |
| 377 } | |
| 378 | |
| 379 void | |
| 380 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
| 381 { | |
| 382 for (uint8_t i = 0; i < n; i++) | |
| 383 { | |
| 384 if (i > 0) | |
| 385 { | |
| 386 fputc(' ', stream); | |
| 387 } | |
| 388 printhex_byte(id[i], stream); | |
| 389 } | |
| 390 } | |
| 391 | |
| 392 static int8_t | |
| 5 | 393 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
| 394 uint8_t bytes_len) | |
| 2 | 395 { |
| 396 // "N HEXKEY" | |
| 5 | 397 if (strlen(params) != bytes_len*2 + 2) { |
| 2 | 398 printf_P(PSTR("Wrong length key\n")); |
| 399 return -1; | |
| 400 } | |
| 401 | |
| 402 if (params[1] != ' ') | |
| 403 { | |
| 404 printf_P(PSTR("Missing space\n")); | |
| 405 return -1; | |
| 406 } | |
| 407 | |
| 408 *key_index = from_hex(params[0]); | |
| 409 if (*key_index >= NKEYS) | |
| 410 { | |
| 411 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
| 412 return -1; | |
| 413 } | |
| 414 | |
| 5 | 415 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
| 2 | 416 { |
| 417 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
| 418 } | |
| 419 return 0; | |
| 420 } | |
| 421 | |
| 1 | 422 static void |
| 423 cmd_set_avr_key(const char *params) | |
| 424 { | |
| 2 | 425 uint8_t new_key[KEYLEN]; |
| 426 uint8_t key_index; | |
| 5 | 427 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
| 2 | 428 { |
| 1 | 429 return; |
| 0 | 430 } |
| 2 | 431 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
| 8 | 432 #ifndef SIM_DEBUG |
| 2 | 433 eeprom_write(avr_keys, avr_keys); |
| 8 | 434 #endif |
| 2 | 435 } |
| 436 | |
| 437 static void | |
| 438 cmd_hmac(const char *params) | |
| 439 { | |
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440 uint8_t indata[2+HMACLEN] = {'H', ':'}; |
| 7 | 441 uint8_t outdata[HMACLEN]; |
| 2 | 442 uint8_t key_index; |
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443 if (parse_key(params, &key_index, &indata[2], HMACLEN) != 0) |
| 2 | 444 { |
| 445 printf_P(PSTR("FAIL: Bad input\n")); | |
| 5 | 446 return; |
| 2 | 447 } |
| 0 | 448 |
| 8 | 449 #ifndef SIM_DEBUG |
| 5 | 450 long_delay(200); |
| 8 | 451 #endif |
| 5 | 452 |
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453 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
| 2 | 454 printf_P(PSTR("HMAC: ")); |
| 7 | 455 printhex(outdata, HMACLEN, stdout); |
| 5 | 456 fputc('\n', stdout); |
| 457 } | |
| 458 | |
| 459 static void | |
| 460 cmd_decrypt(const char *params) | |
| 461 { | |
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462 uint8_t indata[HMACLEN+AESLEN]; // XXX |
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463 // a temporary buffer |
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464 uint8_t output[HMACLEN] = {'D', ':'}; |
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e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
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465 _Static_assert(AESLEN+2 <= sizeof(output), "sufficient output buffer"); |
| 5 | 466 uint8_t key_index; |
|
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467 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
| 5 | 468 { |
| 469 printf_P(PSTR("FAIL: Bad input\n")); | |
| 470 return; | |
| 471 } | |
| 472 | |
| 8 | 473 #ifndef SIM_DEBUG |
| 5 | 474 long_delay(200); |
| 8 | 475 #endif |
| 7 | 476 |
| 5 | 477 // check the signature |
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478 memcpy(&output[2], &indata[HMACLEN], AESLEN); |
| 12 | 479 hmac_sha1(output, avr_keys[key_index], KEYLEN*8, output, (2+AESLEN)*8); |
| 5 | 480 |
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481 if (memcmp(output, indata, HMACLEN) != 0) { |
| 5 | 482 printf_P(PSTR("FAIL: hmac mismatch\n")); |
| 483 } | |
| 484 | |
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485 uint8_t tmpbuf[256]; |
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486 aesInit(avr_keys[key_index], tmpbuf); |
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487 aesDecrypt(&indata[HMACLEN], NULL); |
| 5 | 488 |
| 489 printf_P(PSTR("DECRYPTED: ")); | |
| 490 printhex(output, AESLEN, stdout); | |
| 2 | 491 fputc('\n', stdout); |
| 492 } | |
| 493 | |
| 494 static void | |
| 495 cmd_oneshot_reboot(const char *params) | |
| 496 { | |
| 497 uint32_t new_delay = strtoul(params, NULL, 10); | |
| 498 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 1 | 499 { |
| 2 | 500 oneshot_count = new_delay; |
| 1 | 501 } |
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502 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
| 0 | 503 } |
| 504 | |
| 505 static void | |
| 506 load_params() | |
| 507 { | |
| 508 uint16_t magic; | |
| 509 eeprom_read(magic, magic); | |
| 510 if (magic == EXPECT_MAGIC) | |
| 511 { | |
| 1 | 512 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
| 513 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
| 2 | 514 eeprom_read(newboot_limit, newboot_limit); |
| 1 | 515 } |
| 2 | 516 |
| 16 | 517 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
| 518 || watchdog_long_limit > WATCHDOG_LONG_MAX) | |
| 519 { | |
| 520 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; | |
| 521 } | |
| 522 | |
| 523 if (watchdog_short_limit != 0 | |
| 524 && watchdog_short_limit < WATCHDOG_SHORT_MIN) | |
| 525 { | |
| 526 watchdog_short_limit = 0; | |
| 527 } | |
| 528 | |
| 529 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) | |
| 530 { | |
| 531 newboot_limit = NEWBOOT_DEFAULT; | |
| 532 } | |
| 533 | |
| 534 | |
| 2 | 535 eeprom_read(avr_keys, avr_keys); |
| 0 | 536 } |
| 537 | |
| 2 | 538 static void |
|
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539 cmd_alive() |
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540 { |
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541 printf_P(PSTR("Ah, good.\n")); |
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542 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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543 { |
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544 watchdog_long_count = 0; |
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545 watchdog_short_count = 0; |
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546 } |
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547 long_reboot_mode = 0; |
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548 } |
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549 |
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550 static void |
| 2 | 551 cmd_vcc() |
| 0 | 552 { |
| 2 | 553 uint16_t vcc = adc_vcc(); |
| 12 | 554 printf_P(PSTR("vcc: %u mV\n"), vcc); |
| 0 | 555 } |
| 556 | |
| 557 static void | |
| 558 read_handler() | |
| 559 { | |
| 17 | 560 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
| 561 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
| 562 | |
| 563 LOCAL_PSTR(get_params); | |
| 564 LOCAL_PSTR(set_params); | |
| 565 LOCAL_PSTR(set_key); | |
| 566 LOCAL_PSTR(oneshot); | |
| 567 LOCAL_PSTR(hmac); | |
| 568 LOCAL_PSTR(decrypt); | |
| 569 LOCAL_PSTR(alive); | |
| 570 LOCAL_PSTR(vcc); | |
| 571 LOCAL_PSTR(reset); | |
| 572 LOCAL_PSTR(newboot); | |
| 573 LOCAL_PSTR(oldboot); | |
| 574 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); | |
| 575 LOCAL_HELP(set_key, "20_byte_hex>"); | |
| 576 LOCAL_HELP(timeout, "<timeout>"); | |
| 577 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); | |
| 578 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
| 579 | |
| 580 static const struct handler { | |
| 581 PGM_P name; | |
| 582 void(*cmd)(const char *param); | |
| 583 // existence of arg_help indicates if the cmd takes a parameter. | |
| 584 PGM_P arg_help; | |
| 585 } handlers[11] PROGMEM = | |
| 586 { | |
| 587 {get_params_str, cmd_get_params, NULL}, | |
| 588 {set_params_str, cmd_set_params, set_params_help}, | |
| 589 {set_key_str, cmd_set_avr_key, set_key_help}, | |
| 590 {oneshot_str, cmd_oneshot_reboot, timeout_help}, | |
| 591 {hmac_str, cmd_hmac, hmac_help}, | |
| 592 {decrypt_str, cmd_decrypt, decrypt_help}, | |
| 593 {alive_str, cmd_alive, NULL}, | |
| 594 {vcc_str, cmd_vcc, NULL}, | |
| 595 {reset_str, cmd_reset, NULL}, | |
| 596 {newboot_str, cmd_newboot, NULL}, | |
| 597 {oldboot_str, cmd_oldboot, NULL}, | |
| 598 }; | |
| 599 | |
| 600 if (readbuf[0] == '\0') | |
| 601 { | |
| 602 return; | |
| 603 } | |
| 604 | |
| 605 if (strcmp_P(readbuf, PSTR("help"))) | |
| 606 { | |
| 607 printf_P(PSTR("Commands:---\n")); | |
| 608 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 609 { | |
| 610 struct handler h; | |
| 611 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 612 printf_P(h.name); | |
| 613 if (h.arg_help) | |
| 614 { | |
| 615 putchar(' '); | |
| 616 printf_P(h.arg_help); | |
| 617 } | |
| 618 putchar('\n'); | |
| 619 }; | |
| 620 printf_P(PSTR("---\n")); | |
| 621 } | |
| 622 | |
| 623 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 624 { | |
| 625 struct handler h; | |
| 626 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 627 | |
| 628 const int h_len = strlen_P(h.name); | |
| 629 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
| 630 { | |
| 631 if (h.arg_help) | |
| 632 { | |
| 633 if (readbuf[h_len] == ' ') | |
| 634 { | |
| 635 void(*cmd)(const char*) = (void*)pgm_read_word(h.cmd); | |
| 636 cmd(&readbuf[h_len+1]); | |
| 637 return; | |
| 638 } | |
| 639 } | |
| 640 else | |
| 641 { | |
| 642 if (readbuf[h_len] == '\0') | |
| 643 { | |
| 644 void(*void_cmd)() = (void*)pgm_read_word(h.cmd); | |
| 645 void_cmd(); | |
| 646 return; | |
| 647 } | |
| 648 } | |
| 649 } | |
| 650 } | |
| 651 | |
| 652 #if 0 | |
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653 // TODO: make this an array, print automatic help |
| 2 | 654 if (strcmp_P(readbuf, PSTR("get_params")) == 0) |
| 0 | 655 { |
| 656 cmd_get_params(); | |
| 657 } | |
| 658 else if (strncmp_P(readbuf, PSTR("set_params "), 11) == 0) | |
| 659 { | |
| 660 cmd_set_params(&readbuf[11]); | |
| 661 } | |
| 2 | 662 else if (strncmp_P(readbuf, PSTR("set_key "), 8) == 0) |
| 0 | 663 { |
| 2 | 664 cmd_set_avr_key(&readbuf[8]); |
| 0 | 665 } |
| 2 | 666 else if (strncmp_P(readbuf, PSTR("oneshot "), 8) == 0) |
| 0 | 667 { |
| 2 | 668 cmd_oneshot_reboot(&readbuf[8]); |
| 0 | 669 } |
| 2 | 670 else if (strncmp_P(readbuf, PSTR("hmac "), 5) == 0) |
| 0 | 671 { |
| 2 | 672 cmd_hmac(&readbuf[5]); |
| 0 | 673 } |
| 5 | 674 else if (strncmp_P(readbuf, PSTR("decrypt "), 8) == 0) |
| 675 { | |
| 12 | 676 cmd_decrypt(&readbuf[8]); |
| 5 | 677 } |
|
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678 else if (strcmp_P(readbuf, PSTR("alive")) == 0) |
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679 { |
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680 cmd_alive(); |
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681 } |
| 2 | 682 else if (strcmp_P(readbuf, PSTR("vcc")) == 0) |
| 0 | 683 { |
| 2 | 684 cmd_vcc(); |
| 0 | 685 } |
| 686 else if (strcmp_P(readbuf, PSTR("reset")) == 0) | |
| 687 { | |
| 688 cmd_reset(); | |
| 689 } | |
| 4 | 690 else if (strcmp_P(readbuf, PSTR("newboot")) == 0) |
| 691 { | |
| 692 cmd_newboot(); | |
| 693 } | |
|
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694 else if (strcmp_P(readbuf, PSTR("oldboot")) == 0) |
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695 { |
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696 cmd_oldboot(); |
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697 } |
| 0 | 698 else |
| 17 | 699 |
| 700 #endif | |
| 701 | |
| 702 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
| 0 | 703 } |
| 704 | |
| 705 ISR(INT0_vect) | |
| 706 { | |
| 707 blink(); | |
| 708 _delay_ms(100); | |
| 709 blink(); | |
| 710 } | |
| 711 | |
| 712 ISR(USART_RX_vect) | |
| 713 { | |
| 714 char c = UDR0; | |
| 715 #ifdef HAVE_UART_ECHO | |
| 716 uart_putchar(c, NULL); | |
| 717 #endif | |
| 718 if (c == '\r' || c == '\n') | |
| 719 { | |
| 720 if (readpos > 0) | |
| 721 { | |
| 722 readbuf[readpos] = '\0'; | |
| 723 have_cmd = 1; | |
| 724 readpos = 0; | |
| 725 } | |
| 726 } | |
| 727 else | |
| 728 { | |
| 729 readbuf[readpos] = c; | |
| 730 readpos++; | |
| 731 if (readpos >= sizeof(readbuf)) | |
| 732 { | |
| 733 readpos = 0; | |
| 734 } | |
| 735 } | |
| 736 } | |
| 737 | |
| 2 | 738 ISR(TIMER1_COMPA_vect) |
| 0 | 739 { |
| 2 | 740 TCNT1 = 0; |
| 0 | 741 |
| 742 clock_epoch += TICK; | |
| 743 | |
| 1 | 744 // watchdogs count up, continuous |
| 745 if (watchdog_long_limit > 0) { | |
| 2 | 746 watchdog_long_count += TICK; |
| 1 | 747 if (watchdog_long_count >= watchdog_long_limit) |
| 748 { | |
| 749 watchdog_long_count = 0; | |
| 750 watchdog_long_hit = 1; | |
| 751 } | |
| 0 | 752 } |
| 753 | |
| 1 | 754 if (watchdog_short_limit > 0) { |
| 2 | 755 watchdog_short_count += TICK; |
| 1 | 756 if (watchdog_short_count >= watchdog_short_limit) |
| 757 { | |
| 758 watchdog_short_count = 0; | |
| 759 watchdog_short_hit = 1; | |
| 760 } | |
| 0 | 761 } |
| 762 | |
| 2 | 763 // newboot counts down |
| 1 | 764 if (newboot_count > 0) |
| 0 | 765 { |
| 2 | 766 newboot_count-=TICK; |
| 767 if (newboot_count <= 0) | |
| 1 | 768 { |
| 769 newboot_hit = 1; | |
| 2 | 770 newboot_count = 0; |
| 1 | 771 } |
| 0 | 772 } |
| 1 | 773 |
| 2 | 774 if (oneshot_count > 0) |
| 775 { | |
| 776 oneshot_count-=TICK; | |
| 777 if (oneshot_count <= 0) | |
| 778 { | |
| 779 oneshot_hit = 1; | |
| 780 oneshot_count = 0; | |
| 781 } | |
| 782 } | |
| 0 | 783 } |
| 784 | |
| 785 static void | |
| 786 idle_sleep() | |
| 787 { | |
| 788 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 789 sleep_mode(); | |
| 790 } | |
| 791 | |
| 792 static uint16_t | |
| 793 adc_vcc() | |
| 794 { | |
| 795 PRR &= ~_BV(PRADC); | |
| 796 | |
| 797 // /16 prescaler | |
| 798 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 799 | |
| 800 // set to measure 1.1 reference | |
| 801 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 802 // average a number of samples | |
| 803 uint16_t sum = 0; | |
| 804 uint8_t num = 0; | |
| 805 for (uint8_t n = 0; n < 20; n++) | |
| 806 { | |
| 807 ADCSRA |= _BV(ADSC); | |
| 808 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 809 | |
| 810 uint8_t low_11 = ADCL; | |
| 811 uint8_t high_11 = ADCH; | |
| 812 uint16_t val = low_11 + (high_11 << 8); | |
| 813 | |
| 814 if (n >= 4) | |
| 815 { | |
| 816 sum += val; | |
| 817 num++; | |
| 818 } | |
| 819 } | |
| 820 ADCSRA = 0; | |
| 821 PRR |= _BV(PRADC); | |
| 822 | |
| 823 //float res_volts = 1.1 * 1024 * num / sum; | |
| 824 //return 1000 * res_volts; | |
| 825 return ((uint32_t)1100*1024*num) / sum; | |
| 826 } | |
| 827 | |
| 828 static void | |
| 2 | 829 reboot_pi() |
| 830 { | |
| 831 // pull it low for 30ms | |
| 832 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); | |
| 833 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
| 834 _delay_ms(30); | |
| 835 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); | |
| 836 } | |
| 837 | |
| 838 static void | |
| 839 set_pi_boot_normal(uint8_t normal) | |
| 840 { | |
| 841 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 842 if (normal) | |
| 843 { | |
| 844 // tristate | |
| 845 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 846 } | |
| 847 else | |
| 848 { | |
| 849 // pull it low | |
| 850 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
| 851 | |
| 852 } | |
| 853 } | |
| 854 | |
| 855 static void | |
| 856 check_flags() | |
| 857 { | |
|
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858 if (watchdog_long_hit) |
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859 { |
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860 // alternate between booting normal and emergency |
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861 if (long_reboot_mode) |
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862 { |
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863 cmd_newboot(); |
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864 } |
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865 long_reboot_mode ^= 1; |
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866 } |
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867 |
| 2 | 868 if (watchdog_long_hit |
| 869 || watchdog_short_hit | |
| 870 || oneshot_hit) | |
| 871 { | |
| 12 | 872 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
| 873 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
| 874 long_delay(300); | |
| 2 | 875 reboot_pi(); |
| 876 } | |
| 877 | |
| 878 if (newboot_hit) { | |
| 879 set_pi_boot_normal(0); | |
| 880 } | |
| 881 | |
| 882 watchdog_long_hit = 0; | |
| 883 watchdog_short_hit = 0; | |
| 884 newboot_hit = 0; | |
| 885 oneshot_hit = 0; | |
| 886 } | |
| 887 | |
| 888 static void | |
| 0 | 889 do_comms() |
| 890 { | |
| 891 // avoid receiving rubbish, perhaps | |
| 892 uart_on(); | |
| 893 | |
| 894 // write sd card here? same 3.3v regulator... | |
| 895 | |
| 1 | 896 while (1) |
| 0 | 897 { |
| 1 | 898 wdt_reset(); |
| 2 | 899 |
| 900 check_flags(); | |
| 901 | |
| 0 | 902 if (have_cmd) |
| 903 { | |
| 904 have_cmd = 0; | |
| 905 read_handler(); | |
| 906 continue; | |
| 907 } | |
| 908 | |
| 909 // wait for commands from the master | |
| 910 idle_sleep(); | |
| 911 } | |
| 912 } | |
| 913 | |
| 914 static void | |
| 915 blink() | |
| 916 { | |
| 917 PORT_LED &= ~_BV(PIN_LED); | |
| 918 _delay_ms(1); | |
| 919 PORT_LED |= _BV(PIN_LED); | |
| 920 } | |
| 921 | |
| 922 static void | |
| 923 long_delay(int ms) | |
| 924 { | |
| 925 int iter = ms / 100; | |
| 926 | |
| 927 for (int i = 0; i < iter; i++) | |
| 928 { | |
| 929 _delay_ms(100); | |
| 930 } | |
| 931 } | |
| 932 | |
| 933 ISR(BADISR_vect) | |
| 934 { | |
| 935 //uart_on(); | |
| 936 printf_P(PSTR("Bad interrupt\n")); | |
| 937 } | |
| 938 | |
| 939 int main(void) | |
| 940 { | |
| 17 | 941 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
| 942 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
943 |
| 0 | 944 setup_chip(); |
| 945 blink(); | |
| 946 | |
| 947 stdout = &mystdout; | |
| 948 uart_on(); | |
| 949 | |
| 12 | 950 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]")); |
| 0 | 951 |
| 2 | 952 set_pi_boot_normal(0); |
| 953 | |
| 0 | 954 load_params(); |
| 955 | |
| 956 setup_tick_counter(); | |
| 957 | |
| 958 sei(); | |
| 959 | |
| 8 | 960 #if 0 |
| 961 // encryption test | |
| 962 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
| 963 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
| 12 | 964 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
| 965 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
| 966 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
| 8 | 967 #endif |
| 968 | |
| 1 | 969 // doesn't return |
| 970 do_comms(); | |
| 0 | 971 |
| 972 return 0; /* never reached */ | |
| 973 } |