templog: main.c annotate

annotate main.c @ 381:83c83014e5e3

report raw ds18b20 values instead

author	Matt Johnston <matt@ucc.asn.au>
date	Tue, 03 Jul 2012 22:44:21 +0800
parents	d4c9c360448f
children	6e47a61edc47

rev	line source
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	1 #include <stdio.h>
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	2 #include <string.h>
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	3 #include <stddef.h>
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	4 #include <avr/io.h>
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	5 #include <avr/interrupt.h>
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	6 #include <avr/sleep.h>
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	7 #include <util/delay.h>
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	8 #include <avr/pgmspace.h>
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	9 #include <avr/eeprom.h>
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	10 #include <avr/wdt.h>
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	11 #include <util/atomic.h>
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	12 #include <util/crc16.h>
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	13
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	14 // for DWORD of get_fattime()
309 49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	15 #include "integer.h"
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	16
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	17 #include "simple_ds18b20.h"
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	18 #include "onewire.h"
309 49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	19
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	20 // configuration params
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	21 // - measurement interval
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	22 // - transmit interval
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	23 // - bluetooth params
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	24 // - number of sensors (and range?)
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	25
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	26 // 1 second. we have 1024 prescaler, 32768 crystal.
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	27 #define SLEEP_COMPARE 32
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	28 // limited to uint16_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	29 #define MEASURE_WAKE 60
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	30
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	31 #define VALUE_NOSENSOR 0x07D0 // 125 degrees
83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	32 #define VALUE_BROKEN 0x07D1 // 125.0625
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	33
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	34 // limited to uint16_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	35 #define COMMS_WAKE 3600 // XXX testing
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	36 // limited to uint8_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	37 #define WAKE_SECS 60 // XXX testing
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	38
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	39 #define BAUD 19200
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	40 #define UBRR ((F_CPU)/8/(BAUD)-1)
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	41
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	42 #define PORT_LED PORTC
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	43 #define DDR_LED DDRC
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	44 #define PIN_LED PC4
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	45
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	46 #define PORT_SHDN PORTD
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	47 #define DDR_SHDN DDRD
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	48 #define PIN_SHDN PD7
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	49
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	50 // limited to uint16_t
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	51 // XXX - increasing this to 300 causes strange failures,
cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	52 // not sure why
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	53 #define NUM_MEASUREMENTS 280
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	54 // limited to uint8_t
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	55 #define MAX_SENSORS 3
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	56
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	57 // fixed at 8, have a shorter name
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	58 #define ID_LEN OW_ROMCODE_SIZE
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	59
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	60 // #define HAVE_UART_ECHO
449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	61
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	62 int uart_putchar(char c, FILE *stream);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	63 static void long_delay(int ms);
330 7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	64 static void blink();
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	65 static uint16_t adc_vcc();
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	66
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	67 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	68 _FDEV_SETUP_WRITE);
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	69
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	70 uint16_t crc_out;
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	71 static FILE _crc_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL,
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	72 _FDEV_SETUP_WRITE);
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	73 // convenience
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	74 static FILE *crc_stdout = &_crc_stdout;
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	75
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	76 // ---- Atomic guards required accessing these variables
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	77 static uint32_t clock_epoch;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	78 static uint16_t comms_count;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	79 static uint16_t measure_count;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	80 // ---- End atomic guards required
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	81
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	82 static uint16_t n_measurements;
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	83
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	84 // stored as
83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	85 static uint16_t measurements[NUM_MEASUREMENTS][MAX_SENSORS];
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	86 static uint32_t first_measurement_clock;
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	87 // last_measurement_clock is redundant but checks that we're not missing
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	88 // samples
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	89 static uint32_t last_measurement_clock;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	90
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	91 static uint32_t last_comms_clock;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	92
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	93 // boolean flags
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	94 static uint8_t need_measurement;
5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	95 static uint8_t need_comms;
346 d6219df77c41 main.c: Matt Johnston <matt@ucc.asn.au> parents: 341 diff changeset	96 static uint8_t uart_enabled;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	97
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	98 // counts down from WAKE_SECS to 0, goes to deep sleep when hits 0
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	99 static uint8_t comms_timeout;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	100
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	101 static uint8_t readpos;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	102 static char readbuf[30];
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	103 static uint8_t have_cmd;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	104
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	105
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	106 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	107 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size))
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	108 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst))
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	109 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size))
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	110 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	111
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	112 #define EXPECT_MAGIC 0x67c9
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	113
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	114 struct __attribute__ ((__packed__)) __eeprom_data {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	115 uint16_t magic;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	116 uint8_t n_sensors;
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	117 uint8_t sensor_id[MAX_SENSORS][ID_LEN];
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	118 };
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	119
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	120 #define DEBUG(str) printf_P(PSTR(str))
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	121
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	122 static void deep_sleep();
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	123
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	124 // Very first setup
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	125 static void
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	126 setup_chip()
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	127 {
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	128 cli();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	129
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	130 // stop watchdog timer (might have been used to cause a reset)
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	131 wdt_reset();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	132 MCUSR &= ~_BV(WDRF);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	133 WDTCSR \|= _BV(WDCE) \| _BV(WDE);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	134 WDTCSR = 0;
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	135
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	136 // Set clock to 2mhz
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	137 CLKPR = _BV(CLKPCE);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	138 // divide by 4
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	139 CLKPR = _BV(CLKPS1);
358 71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	140
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	141 // enable pullups
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	142 PORTB = 0xff; // XXX change when using SPI
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	143 PORTD = 0xff;
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	144 PORTC = 0xff;
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	145
325 b05c9fd7c098 Merge Matt Johnston <matt@ucc.asn.au> parents: 323 324 diff changeset	146 // 3.3v power for bluetooth and SD
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	147 DDR_LED \|= _BV(PIN_LED);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	148 DDR_SHDN \|= _BV(PIN_SHDN);
325 b05c9fd7c098 Merge Matt Johnston <matt@ucc.asn.au> parents: 323 324 diff changeset	149
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	150 // set pullup
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	151 PORTD \|= _BV(PD2);
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	152 // INT0 setup
358 71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	153 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work?
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	154 EIMSK = _BV(INT0);
358 71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	155
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	156 // comparator disable
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	157 ACSR = _BV(ACD);
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	158
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	159 // disable adc pin input buffers
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	160 DIDR0 = 0x3F; // acd0-adc5
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	161 DIDR1 = (1<<AIN1D)\|(1<<AIN0D); // ain0/ain1
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	162
71d2cc90354a try a few more power saving measures, untested Matt Johnston <matt@ucc.asn.au> parents: 352 diff changeset	163 sei();
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	164 }
e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	165
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	166 static void
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	167 set_aux_power(uint8_t on)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	168 {
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	169 if (on)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	170 {
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	171 PORT_SHDN &= ~_BV(PIN_SHDN);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	172 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	173 else
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	174 {
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	175 PORT_SHDN \|= _BV(PIN_SHDN);
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	176 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	177 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	178
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	179 static void
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	180 setup_tick_counter()
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	181 {
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	182 // set up counter2.
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	183 // COM21 COM20 Set OC2 on Compare Match (p116)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	184 // WGM21 Clear counter on compare
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	185 //TCCR2A = _BV(COM2A1) \| _BV(COM2A0) \| _BV(WGM21);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	186 // toggle on match
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	187 TCCR2A = _BV(COM2A0);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	188 // CS22 CS21 CS20 clk/1024
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	189 TCCR2B = _BV(CS22) \| _BV(CS21) \| _BV(CS20);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	190 // set async mode
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	191 ASSR \|= _BV(AS2);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	192 TCNT2 = 0;
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	193 OCR2A = SLEEP_COMPARE;
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	194 // interrupt
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	195 TIMSK2 = _BV(OCIE2A);
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	196 }
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	197
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	198 static void
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	199 uart_on()
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	200 {
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	201 // Power reduction register
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	202 PRR &= ~_BV(PRUSART0);
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	203
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	204 // All of this needs to be done each time after turning off the PRR
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	205 // baud rate
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	206 UBRR0H = (unsigned char)(UBRR >> 8);
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	207 UBRR0L = (unsigned char)UBRR;
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	208 // set 2x clock, improves accuracy of UBRR
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	209 UCSR0A \|= _BV(U2X0);
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	210 UCSR0B = _BV(RXCIE0) \| _BV(RXEN0) \| _BV(TXEN0);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	211 //8N1
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	212 UCSR0C = _BV(UCSZ01) \| _BV(UCSZ00);
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	213 uart_enabled = 1;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	214 }
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	215
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	216 static void
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	217 uart_off()
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	218 {
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	219 // Turn of interrupts and disable tx/rx
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	220 UCSR0B = 0;
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	221 uart_enabled = 0;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	222
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	223 // Power reduction register
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	224 PRR \|= _BV(PRUSART0);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	225 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	226
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	227 int
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	228 uart_putchar(char c, FILE *stream)
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	229 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	230 if (!uart_enabled)
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	231 {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	232 return EOF;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	233 }
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	234 // XXX could perhaps sleep in the loop for power.
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	235 if (c == '\n')
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	236 {
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	237 loop_until_bit_is_set(UCSR0A, UDRE0);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	238 UDR0 = '\r';
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	239 }
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	240 loop_until_bit_is_set(UCSR0A, UDRE0);
e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	241 UDR0 = c;
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	242 if (stream == crc_stdout)
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	243 {
332 05c1249da994 - Move crc16 to utils and fix it Matt Johnston <matt@ucc.asn.au> parents: 331 diff changeset	244 crc_out = _crc_ccitt_update(crc_out, c);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	245 }
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	246 if (c == '\r')
8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	247 {
8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	248 loop_until_bit_is_set(UCSR0A, UDRE0);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	249 UDR0 = '\n';
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	250 if (stream == crc_stdout)
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	251 {
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	252 crc_out = _crc_ccitt_update(crc_out, '\n');
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	253 }
316 8f32eb67a279 reading DS18B20 works Matt Johnston <matt@ucc.asn.au> parents: 315 diff changeset	254 }
346 d6219df77c41 main.c: Matt Johnston <matt@ucc.asn.au> parents: 341 diff changeset	255 return (unsigned char)c;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	256 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	257
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	258 static void
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	259 cmd_fetch()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	260 {
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	261 crc_out = 0;
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	262 uint8_t n_sensors;
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	263 eeprom_read(n_sensors, n_sensors);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	264
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	265 uint16_t millivolt_vcc = adc_vcc();
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	266
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	267 uint32_t epoch_copy;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	268 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	269 {
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	270 epoch_copy = clock_epoch;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	271 }
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	272
366 daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	273 fprintf_P(crc_stdout, PSTR("START\n"
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	274 "now=%lu\n"
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	275 "time_step=%hu\n"
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	276 "first_time=%lu\n"
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	277 "last_time=%lu\n"
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	278 "comms_time=%lu\n"
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	279 "voltage=%hu\n"
366 daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	280 ),
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	281 epoch_copy,
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	282 (uint16_t)MEASURE_WAKE,
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	283 first_measurement_clock,
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	284 last_measurement_clock,
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	285 last_comms_clock,
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	286 millivolt_vcc
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	287 );
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	288 fprintf_P(crc_stdout, PSTR("sensors=%u\n"), n_sensors);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	289 for (uint8_t s = 0; s < n_sensors; s++)
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	290 {
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	291 uint8_t id[ID_LEN];
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	292 fprintf_P(crc_stdout, PSTR("sensor_id%u="), s);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	293 eeprom_read_to(id, sensor_id[s], ID_LEN);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	294 printhex(id, ID_LEN, crc_stdout);
f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	295 fputc('\n', crc_stdout);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	296 }
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	297 fprintf_P(crc_stdout, PSTR("measurements=%hu\n"), n_measurements);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	298 for (uint16_t n = 0; n < n_measurements; n++)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	299 {
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	300 fprintf_P(crc_stdout, PSTR("meas%hu="), n);
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	301 for (uint8_t s = 0; s < n_sensors; s++)
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	302 {
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	303 fprintf_P(crc_stdout, PSTR(" %04hx"), measurements[n][s]);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	304 }
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	305 fputc('\n', crc_stdout);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	306 }
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	307 fprintf_P(crc_stdout, PSTR("END\n"));
331 5de3fc71ce48 - Make the python work on openwrt Matt Johnston <matt@ucc.asn.au> parents: 330 diff changeset	308 fprintf_P(stdout, PSTR("CRC=%hu\n"), crc_out);
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	309 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	310
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	311 static void
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	312 cmd_clear()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	313 {
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	314 n_measurements = 0;
338 12123e390169 More minor work Matt Johnston <matt@ucc.asn.au> parents: 333 diff changeset	315 printf_P(PSTR("cleared\n"));
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	316 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	317
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	318 static void
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	319 cmd_btoff()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	320 {
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	321 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	322 {
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	323 comms_count = 0;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	324 }
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	325 printf_P(PSTR("off:%hu\n"), COMMS_WAKE);
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	326 _delay_ms(100);
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	327 comms_timeout = 0;
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	328 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	329
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	330 static void
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	331 cmd_awake()
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	332 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	333 comms_timeout = WAKE_SECS;
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	334 printf_P(PSTR("awake %hu\n"), WAKE_SECS);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	335 }
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	336
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	337 static void
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	338 cmd_reset()
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	339 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	340 printf_P(PSTR("reset\n"));
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	341 _delay_ms(100);
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	342 cli(); // disable interrupts
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	343 wdt_enable(WDTO_15MS); // enable watchdog
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	344 while(1); // wait for watchdog to reset processor
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	345 }
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	346
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	347 static void
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	348 cmd_measure()
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	349 {
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	350 printf_P(PSTR("measuring\n"));
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	351 need_measurement = 1;
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	352 }
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	353
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	354 static void
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	355 cmd_sensors()
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	356 {
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	357 uint8_t ret = simple_ds18b20_start_meas(NULL);
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	358 printf_P(PSTR("All sensors, ret %d, waiting...\n"), ret);
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	359 long_delay(DS18B20_TCONV_12BIT);
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	360 simple_ds18b20_read_all();
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	361 }
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	362
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	363 #if 0
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	364 // 0 on success
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	365 static uint8_t
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	366 get_hex_string(const char hex, uint8_t out, uint8_t size)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	367 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	368 uint8_t upper;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	369 uint8_t o;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	370 for (uint8_t i = 0, z = 0; o < size; i++)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	371 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	372 uint8_t h = hex[i];
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	373 if (h >= 'A' && h <= 'F')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	374 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	375 // lower case
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	376 h += 0x20;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	377 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	378 uint8_t nibble;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	379 if (h >= '0' && h <= '9')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	380 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	381 nibble = h - '0';
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	382 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	383 else if (h >= 'a' && h <= 'f')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	384 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	385 nibble = 10 + h - 'a';
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	386 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	387 else if (h == ' ' \|\| h == ':')
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	388 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	389 continue;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	390 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	391 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	392 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	393 printf_P(PSTR("Bad hex 0x%x '%c'\n"), hex[i], hex[i]);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	394 return 1;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	395 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	396
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	397 if (z % 2 == 0)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	398 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	399 upper = nibble << 4;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	400 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	401 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	402 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	403 out[o] = upper \| nibble;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	404 o++;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	405 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	406
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	407 z++;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	408 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	409
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	410 if (o != size)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	411 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	412 printf_P(PSTR("Short hex\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	413 return 1;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	414 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	415 return 0;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	416 }
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	417 #endif
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	418
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	419 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	420 add_sensor(uint8_t *id)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	421 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	422 uint8_t n;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	423 eeprom_read(n, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	424 if (n < MAX_SENSORS)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	425 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	426 cli();
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	427 eeprom_write_from(id, sensor_id[n], ID_LEN);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	428 n++;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	429 eeprom_write(n, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	430 sei();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	431 printf_P(PSTR("Added sensor %d : "), n);
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	432 printhex(id, ID_LEN, stdout);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	433 putchar('\n');
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	434 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	435 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	436 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	437 printf_P(PSTR("Too many sensors\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	438 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	439 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	440
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	441 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	442 cmd_add_all()
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	443 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	444 uint8_t id[OW_ROMCODE_SIZE];
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	445 printf_P("Adding all\n");
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	446 ow_reset();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	447 for( uint8_t diff = OW_SEARCH_FIRST; diff != OW_LAST_DEVICE; )
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	448 {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	449 diff = ow_rom_search( diff, &id[0] );
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	450 if( diff == OW_PRESENCE_ERR ) {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	451 printf_P( PSTR("No Sensor found\r") );
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	452 return;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	453 }
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	454
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	455 if( diff == OW_DATA_ERR ) {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	456 printf_P( PSTR("Bus Error\r") );
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	457 return;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	458 }
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	459 add_sensor(id);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	460 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	461 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	462
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	463 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	464 cmd_init()
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	465 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	466 printf_P(PSTR("Resetting sensor list\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	467 uint8_t zero = 0;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	468 cli();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	469 eeprom_write(zero, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	470 sei();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	471 printf_P(PSTR("Done.\n"));
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	472 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	473
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	474 static void
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	475 check_first_startup()
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	476 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	477 uint16_t magic;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	478 eeprom_read(magic, magic);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	479 if (magic != EXPECT_MAGIC)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	480 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	481 printf_P(PSTR("First boot, looking for sensors...\n"));
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	482 // in case of power fumbles don't want to reset during eeprom write,
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	483 long_delay(2);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	484 cmd_init();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	485 cmd_add_all();
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	486 cli();
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	487 magic = EXPECT_MAGIC;
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	488 eeprom_write(magic, magic);
cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	489 sei();
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	490 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	491 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	492
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	493 static void
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	494 read_handler()
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	495 {
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	496 if (strcmp_P(readbuf, PSTR("fetch")) == 0)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	497 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	498 cmd_fetch();
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	499 }
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	500 else if (strcmp_P(readbuf, PSTR("clear")) == 0)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	501 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	502 cmd_clear();
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	503 }
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	504 else if (strcmp_P(readbuf, PSTR("btoff")) == 0)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	505 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	506 cmd_btoff();
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	507 }
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	508 else if (strcmp_P(readbuf, PSTR("measure")) == 0)
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	509 {
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	510 cmd_measure();
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	511 }
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	512 else if (strcmp_P(readbuf, PSTR("sensors")) == 0)
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	513 {
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	514 cmd_sensors();
31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	515 }
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	516 else if (strcmp_P(readbuf, PSTR("addall"))== 0)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	517 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	518 cmd_add_all();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	519 }
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	520 else if (strcmp_P(readbuf, PSTR("awake"))== 0)
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	521 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	522 cmd_awake();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	523 }
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	524 else if (strcmp_P(readbuf, PSTR("init")) == 0)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	525 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	526 cmd_init();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	527 }
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	528 else if (strcmp_P(readbuf, PSTR("reset")) == 0)
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	529 {
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	530 cmd_reset();
5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	531 }
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	532 else
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	533 {
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	534 printf_P(PSTR("Bad command\n"));
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	535 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	536 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	537
326 f6b5941b4c34 Untested - calculate crc in uart_putchar Matt Johnston <matt@ucc.asn.au> parents: 325 diff changeset	538 ISR(INT0_vect)
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	539 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	540 need_comms = 1;
360 5d86f1182f62 add "awake" and "reset" functions Matt Johnston <matt@ucc.asn.au> parents: 358 diff changeset	541 comms_timeout = WAKE_SECS;
330 7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	542 blink();
7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	543 _delay_ms(100);
7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	544 blink();
324 e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	545 }
e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	546
e3664732f11f Add INT0 button Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	547
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	548 ISR(USART_RX_vect)
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	549 {
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	550 char c = UDR0;
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	551 #ifdef HAVE_UART_ECHO
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	552 uart_putchar(c, NULL);
339 449272fc63a3 - Debug log file for server Matt Johnston <matt@ucc.asn.au> parents: 338 diff changeset	553 #endif
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	554 if (c == '\r' \|\| c == '\n')
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	555 {
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	556 if (readpos > 0)
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	557 {
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	558 readbuf[readpos] = '\0';
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	559 have_cmd = 1;
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	560 readpos = 0;
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	561 }
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	562 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	563 else
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	564 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	565 readbuf[readpos] = c;
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	566 readpos++;
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	567 if (readpos >= sizeof(readbuf))
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	568 {
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	569 readpos = 0;
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	570 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	571 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	572 }
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	573
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	574 ISR(TIMER2_COMPA_vect)
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	575 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	576 TCNT2 = 0;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	577 measure_count ++;
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	578 comms_count ++;
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	579
323 5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	580 clock_epoch ++;
5181ea55ea77 Add clock_epoch Matt Johnston <matt@ucc.asn.au> parents: 322 diff changeset	581
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	582 if (comms_timeout != 0)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	583 {
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	584 comms_timeout--;
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	585 }
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	586
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	587 if (measure_count >= MEASURE_WAKE)
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	588 {
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	589 measure_count = 0;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	590 need_measurement = 1;
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	591 }
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	592
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	593 if (comms_count >= COMMS_WAKE)
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	594 {
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	595 comms_count = 0;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	596 need_comms = 1;
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	597 }
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	598 }
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	599
309 49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	600 DWORD get_fattime (void)
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	601 {
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	602 return 0;
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	603 }
49e83333e546 Add FatFS Matt Johnston <matt@ucc.asn.au> parents: 308 diff changeset	604
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	605 static void
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	606 deep_sleep()
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	607 {
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	608 // p119 of manual
308 e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	609 OCR2A = SLEEP_COMPARE;
e36ee3e156c1 switch to atmega328 Matt Johnston <matt@ucc.asn.au> parents: 307 diff changeset	610 loop_until_bit_is_clear(ASSR, OCR2AUB);
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	611
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	612 set_sleep_mode(SLEEP_MODE_PWR_SAVE);
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	613 sleep_mode();
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	614 }
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	615
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	616 static void
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	617 idle_sleep()
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	618 {
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	619 set_sleep_mode(SLEEP_MODE_IDLE);
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	620 sleep_mode();
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	621 }
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	622
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	623 static uint16_t
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	624 adc_vcc()
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	625 {
cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	626 PRR &= ~_BV(PRADC);
cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	627
368 d4c9c360448f merge Matt Johnston <matt@ucc.asn.au> parents: 366 367 diff changeset	628 // /16 prescaler
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	629 ADCSRA = _BV(ADEN) \| _BV(ADPS2);
cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	630
cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	631 // set to measure 1.1 reference
364 8645fdcacad1 fix voltage Matt Johnston <matt@ucc.asn.au> parents: 361 diff changeset	632 ADMUX = _BV(REFS0) \| _BV(MUX3) \| _BV(MUX2) \| _BV(MUX1);
366 daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	633 // average a number of samples
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	634 uint16_t sum = 0;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	635 uint8_t num = 0;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	636 for (uint8_t n = 0; n < 20; n++)
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	637 {
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	638 ADCSRA \|= _BV(ADSC);
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	639 loop_until_bit_is_clear(ADCSRA, ADSC);
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	640
366 daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	641 uint8_t low_11 = ADCL;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	642 uint8_t high_11 = ADCH;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	643 uint16_t val = low_11 + (high_11 << 8);
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	644
366 daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	645 if (n >= 4)
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	646 {
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	647 sum += val;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	648 num++;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	649 }
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	650 }
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	651 ADCSRA = 0;
daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	652 PRR \|= _BV(PRADC);
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	653
366 daad73f65c0f average voltages Matt Johnston <matt@ucc.asn.au> parents: 365 diff changeset	654 float res_volts = 1.1 * 1024 * num / sum;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	655
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	656 return 1000 * res_volts;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	657 }
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	658
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	659 static void
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	660 do_measurement()
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	661 {
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	662 uint8_t n_sensors;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	663 eeprom_read(n_sensors, n_sensors);
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	664
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	665 blink();
83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	666
361 cfcd200c69da untested code to log voltage and internal temperature Matt Johnston <matt@ucc.asn.au> parents: 360 diff changeset	667 simple_ds18b20_start_meas(NULL);
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	668 // sleep rather than using a long delay
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	669 deep_sleep();
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	670 //_delay_ms(DS18B20_TCONV_12BIT);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	671
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	672 if (n_measurements == NUM_MEASUREMENTS)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	673 {
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	674 n_measurements = 0;
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	675 }
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	676
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	677 for (uint8_t s = 0; s < MAX_SENSORS; s++)
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	678 {
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	679 uint16_t reading;
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	680 if (s >= n_sensors)
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	681 {
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	682 reading = VALUE_NOSENSOR;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	683 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	684 else
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	685 {
321 df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	686 uint8_t id[ID_LEN];
df7384336798 Add shutdown handling, print sensors in "fetch" output Matt Johnston <matt@ucc.asn.au> parents: 320 diff changeset	687 eeprom_read_to(id, sensor_id[s], ID_LEN);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	688
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	689 uint8_t ret = simple_ds18b20_read_raw(id, &reading);
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	690 if (ret != DS18X20_OK)
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	691 {
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	692 reading = VALUE_BROKEN;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	693 }
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	694 }
381 83c83014e5e3 report raw ds18b20 values instead Matt Johnston <matt@ucc.asn.au> parents: 368 diff changeset	695 measurements[n_measurements][s] = reading;
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	696 }
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	697
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	698 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	699 {
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	700 if (n_measurements == 0)
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	701 {
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	702 first_measurement_clock = clock_epoch;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	703 }
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	704 last_measurement_clock = clock_epoch;
328 46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	705 }
46070aaf29ea A bit of work on the server python Matt Johnston <matt@ucc.asn.au> parents: 326 diff changeset	706
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	707 n_measurements++;
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	708 //do_adc_335();
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	709 }
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	710
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	711 static void
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	712 do_comms()
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	713 {
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	714 // turn on bluetooth
365 d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	715 ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	716 {
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	717 last_comms_clock = clock_epoch;
d31a6550d264 - add some atomic guards Matt Johnston <matt@ucc.asn.au> parents: 364 diff changeset	718 }
330 7ac6b8846eea - some fixes for server code Matt Johnston <matt@ucc.asn.au> parents: 328 diff changeset	719 set_aux_power(1);
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	720 uart_on();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	721
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	722 // write sd card here? same 3.3v regulator...
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	723
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	724 for (comms_timeout = WAKE_SECS; comms_timeout > 0; )
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	725 {
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	726 if (need_measurement)
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	727 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	728 need_measurement = 0;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	729 do_measurement();
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	730 continue;
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	731 }
ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	732
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	733 if (have_cmd)
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	734 {
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	735 have_cmd = 0;
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	736 read_handler();
349 e7f070855a22 mostly works for testing Matt Johnston <matt@ucc.asn.au> parents: 347 diff changeset	737 continue;
333 298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	738 }
298e502fdcd4 Add some web server handling Matt Johnston <matt@ucc.asn.au> parents: 332 diff changeset	739
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	740 // wait for commands from the master
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	741 idle_sleep();
56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	742 }
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	743
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	744 uart_off();
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	745 // in case bluetooth takes time to flush
99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	746 _delay_ms(100);
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	747 set_aux_power(0);
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	748 }
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	749
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	750 static void
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	751 blink()
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	752 {
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	753 PORT_LED &= ~_BV(PIN_LED);
315 7d409dded901 Import ds18x20 code Matt Johnston <matt@ucc.asn.au> parents: 314 diff changeset	754 _delay_ms(1);
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	755 PORT_LED \|= _BV(PIN_LED);
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	756 }
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	757
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	758 static void
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	759 long_delay(int ms)
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	760 {
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	761 int iter = ms / 100;
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	762
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	763 for (int i = 0; i < iter; i++)
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	764 {
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	765 _delay_ms(100);
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	766 }
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	767 }
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	768
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	769 ISR(BADISR_vect)
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	770 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	771 //uart_on();
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	772 printf_P(PSTR("Bad interrupt\n"));
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	773 }
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	774
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	775 int main(void)
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	776 {
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	777 setup_chip();
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	778 blink();
315 7d409dded901 Import ds18x20 code Matt Johnston <matt@ucc.asn.au> parents: 314 diff changeset	779
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	780 set_aux_power(0);
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	781
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	782 stdout = &mystdout;
313 139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	783 uart_on();
139ecb1840fd serial prints something Matt Johnston <matt@ucc.asn.au> parents: 312 diff changeset	784
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	785 printf(PSTR("Started.\n"));
319 9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	786
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	787 check_first_startup();
9621436cfa07 Add eeprom stuff Matt Johnston <matt@ucc.asn.au> parents: 318 diff changeset	788
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	789 uart_off();
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	790
312 ef64a178092f - Some basic ADC code Matt Johnston <matt@ucc.asn.au> parents: 311 diff changeset	791 // turn off everything except timer2
352 99f8b97a9449 Use the PRR etc, set value to proper ones Matt Johnston <matt@ucc.asn.au> parents: 349 diff changeset	792 PRR = _BV(PRTWI) \| _BV(PRTIM0) \| _BV(PRTIM1) \| _BV(PRSPI) \| _BV(PRUSART0) \| _BV(PRADC);
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	793
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	794 // for testing
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	795 uart_on();
7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	796
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	797 setup_tick_counter();
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	798
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	799 sei();
314 7aebb1452422 deep sleep works Matt Johnston <matt@ucc.asn.au> parents: 313 diff changeset	800
331 5de3fc71ce48 - Make the python work on openwrt Matt Johnston <matt@ucc.asn.au> parents: 330 diff changeset	801 need_comms = 1;
341 ccab04e2f601 - decrease measurement interval, measure at start Matt Johnston <matt@ucc.asn.au> parents: 339 diff changeset	802 need_measurement = 1;
331 5de3fc71ce48 - Make the python work on openwrt Matt Johnston <matt@ucc.asn.au> parents: 330 diff changeset	803
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	804 for(;;)
840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	805 {
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	806 if (need_measurement)
e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	807 {
320 cff7a4459dc9 Lots of it works now. Matt Johnston <matt@ucc.asn.au> parents: 319 diff changeset	808 need_measurement = 0;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	809 do_measurement();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	810 continue;
307 e50091063890 Some counter2 bits Matt Johnston <matt@ucc.asn.au> parents: 306 diff changeset	811 }
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	812
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	813 if (need_comms)
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	814 {
322 840f51824254 untested, add comms timeout code Matt Johnston <matt@ucc.asn.au> parents: 321 diff changeset	815 need_comms = 0;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	816 do_comms();
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	817 continue;
310 0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	818 }
0a64532c1de1 Fill out more main.c structure Matt Johnston <matt@ucc.asn.au> parents: 309 diff changeset	819
347 56f22e29582a fix tabbing Matt Johnston <matt@ucc.asn.au> parents: 346 diff changeset	820 deep_sleep();
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	821 }
318 31199b2941f6 Add simple_ds18b20.c etc Matt Johnston <matt@ucc.asn.au> parents: 316 diff changeset	822
306 848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	823 return 0; /* never reached */
848b0fe159d2 Some basic bits Matt Johnston <matt@ucc.asn.au> parents: diff changeset	824 }

Mercurial > templog

annotate main.c @ 381:83c83014e5e3