Mercurial > pihelp
annotate main.c @ 18:021e6e0006f4
debug printing, 5v adc, fixes
| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Thu, 13 Jun 2013 23:44:59 +0800 |
| parents | 21717153e0f1 |
| children | 5f9a40d6991b bc48a1d17edf |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 3 #include <stddef.h> | |
| 4 #include <stdbool.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <avr/io.h> | |
| 7 #include <avr/interrupt.h> | |
| 8 #include <avr/sleep.h> | |
| 9 #include <util/delay.h> | |
| 10 #include <avr/pgmspace.h> | |
| 11 #include <avr/eeprom.h> | |
| 12 #include <avr/wdt.h> | |
| 13 #include <util/atomic.h> | |
| 14 #include <util/crc16.h> | |
| 15 | |
| 2 | 16 #include "hmac-sha1.h" |
| 5 | 17 #include "aes.h" |
| 2 | 18 |
| 1 | 19 //#include "simple_ds18b20.h" |
| 20 //#include "onewire.h" | |
| 0 | 21 |
| 5 | 22 LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); |
| 23 | |
| 0 | 24 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
| 25 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
| 26 | |
| 27 // TICK should be 8 or less (8 untested). all timers need | |
| 28 // to be a multiple. | |
| 29 | |
| 1 | 30 #define TICK 1 |
| 17 | 31 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
| 5 | 32 #define NKEYS 10 |
| 33 #define HMACLEN 20 | |
| 34 #define AESLEN 16 | |
| 35 #define KEYLEN HMACLEN | |
| 1 | 36 |
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37 #define BAUD 19200 |
| 0 | 38 #define UBRR ((F_CPU)/8/(BAUD)-1) |
| 39 | |
| 2 | 40 #define PORT_PI_BOOT PORTD |
| 41 #define DDR_PI_BOOT DDRD | |
| 4 | 42 #define PIN_PI_BOOT PD5 |
| 2 | 43 |
| 44 #define PORT_PI_RESET PORTD | |
| 45 #define DDR_PI_RESET DDRD | |
| 46 #define PIN_PI_RESET PD6 | |
| 47 | |
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48 #define PORT_PI_WARNING PORTD |
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49 #define DDR_PI_WARNING DDRD |
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50 #define PIN_PI_WARNING PD7 |
| 0 | 51 |
| 52 // #define HAVE_UART_ECHO | |
| 53 | |
| 7 | 54 // stores a value of clock_epoch combined with the remainder of TCNT1, |
| 0 | 55 // for 1/32 second accuracy |
| 56 struct epoch_ticks | |
| 57 { | |
| 58 uint32_t ticks; | |
| 59 // remainder | |
| 60 uint8_t rem; | |
| 61 }; | |
| 62 | |
| 16 | 63 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
| 64 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
| 65 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
| 66 | |
| 67 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
| 68 | |
| 69 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
| 70 #define NEWBOOT_MIN (60*2) // 2 minutes | |
| 71 #define NEWBOOT_MAX (60*30) // 30 mins | |
| 72 | |
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73 #define WARNING_TIME 10 |
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74 |
| 1 | 75 // eeprom-settable parameters, default values defined here. |
| 76 // all timeouts should be a multiple of TICK | |
| 16 | 77 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
| 1 | 78 static uint32_t watchdog_short_limit = 0; |
| 16 | 79 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
| 0 | 80 |
| 1 | 81 // avr proves itself |
| 2 | 82 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
| 0 | 83 |
| 84 // ---- Atomic guards required accessing these variables | |
| 85 // clock_epoch in seconds | |
| 86 static uint32_t clock_epoch; | |
| 1 | 87 // watchdog counts up |
| 88 static uint32_t watchdog_long_count; | |
| 89 static uint32_t watchdog_short_count; | |
| 2 | 90 // newboot counts down |
| 1 | 91 static uint32_t newboot_count; |
| 2 | 92 // oneshot counts down |
| 93 static uint32_t oneshot_count; | |
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94 // countdown after the warning. |
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95 static uint8_t reboot_count; |
| 2 | 96 |
| 0 | 97 // ---- End atomic guards required |
| 98 | |
| 99 // boolean flags | |
| 1 | 100 static uint8_t watchdog_long_hit; |
| 101 static uint8_t watchdog_short_hit; | |
| 102 static uint8_t newboot_hit; | |
| 2 | 103 static uint8_t oneshot_hit; |
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104 static uint8_t reboot_hit; |
| 0 | 105 |
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106 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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107 // working firmware should boot. set back to 0 for each 'alive' |
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108 // command |
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109 static uint8_t long_reboot_mode = 0; |
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110 |
| 0 | 111 static uint8_t readpos; |
| 1 | 112 static char readbuf[50]; |
| 0 | 113 static uint8_t have_cmd; |
| 114 | |
| 115 int uart_putchar(char c, FILE *stream); | |
| 116 static void long_delay(int ms); | |
| 117 static void blink(); | |
| 118 static uint16_t adc_vcc(); | |
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119 static uint16_t adc_5v(uint16_t vcc); |
| 2 | 120 static void set_pi_boot_normal(uint8_t normal); |
| 0 | 121 |
| 17 | 122 |
| 0 | 123 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
| 124 _FDEV_SETUP_WRITE); | |
| 125 | |
| 126 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
| 127 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 128 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 129 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 130 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 131 | |
| 1 | 132 #define EXPECT_MAGIC 0xdf83 |
| 0 | 133 |
| 134 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 1 | 135 uint32_t watchdog_long_limit; |
| 136 uint32_t watchdog_short_limit; | |
| 137 uint32_t newboot_limit; | |
| 0 | 138 |
| 2 | 139 uint8_t avr_keys[NKEYS][KEYLEN]; |
| 0 | 140 |
| 141 uint16_t magic; | |
| 142 }; | |
| 143 | |
| 144 // Very first setup | |
| 145 static void | |
| 146 setup_chip() | |
| 147 { | |
| 148 cli(); | |
| 149 | |
| 150 // stop watchdog timer (might have been used to cause a reset) | |
| 151 wdt_reset(); | |
| 152 MCUSR &= ~_BV(WDRF); | |
| 153 WDTCSR |= _BV(WDCE) | _BV(WDE); | |
| 154 WDTCSR = 0; | |
| 155 | |
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156 // set to 8 seconds, in case sha1 is slow etc. |
| 1 | 157 wdt_enable(WDTO_8S); |
| 158 | |
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159 // Set scaler to /1, -> clock to 8mhz |
| 0 | 160 CLKPR = _BV(CLKPCE); |
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161 CLKPR = 0; |
| 0 | 162 |
| 163 // enable pullups | |
| 1 | 164 // XXX matt pihelp |
| 5 | 165 //PORTB = 0xff; // XXX change when using SPI |
| 166 //PORTD = 0xff; | |
| 167 //PORTC = 0xff; | |
| 0 | 168 |
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169 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
| 0 | 170 |
| 5 | 171 #if 0 |
| 0 | 172 // set pullup |
| 173 PORTD |= _BV(PD2); | |
| 174 // INT0 setup | |
| 175 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
| 176 EIMSK = _BV(INT0); | |
| 5 | 177 #endif |
| 0 | 178 |
| 179 // comparator disable | |
| 180 ACSR = _BV(ACD); | |
| 181 | |
| 182 // disable adc pin input buffers | |
| 183 DIDR0 = 0x3F; // acd0-adc5 | |
| 184 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
| 185 | |
| 186 sei(); | |
| 187 } | |
| 188 | |
| 189 static void | |
| 190 get_epoch_ticks(struct epoch_ticks *t) | |
| 191 { | |
| 192 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 193 { | |
| 194 t->ticks = clock_epoch; | |
| 7 | 195 t->rem = TCNT1; |
| 0 | 196 } |
| 197 } | |
| 198 | |
| 199 static void | |
| 200 setup_tick_counter() | |
| 201 { | |
| 2 | 202 // set up counter1 |
| 203 | |
| 0 | 204 // set up counter2. |
| 205 // COM21 COM20 Set OC2 on Compare Match (p116) | |
| 206 // WGM21 Clear counter on compare | |
| 207 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
| 208 // toggle on match | |
| 2 | 209 TCCR1A = _BV(COM1A0); |
| 8 | 210 #ifdef SIM_DEBUG |
| 211 // systemclock/8 | |
| 212 TCCR1B = _BV(CS11); | |
| 213 #else | |
| 7 | 214 // systemclock/64 |
| 215 TCCR1B = _BV(CS11) | _BV(CS10); | |
| 8 | 216 #endif |
| 2 | 217 TCNT1 = 0; |
| 218 OCR1A = SLEEP_COMPARE; | |
| 0 | 219 // interrupt |
| 2 | 220 TIMSK1 = _BV(OCIE1A); |
| 0 | 221 } |
| 222 | |
| 223 static void | |
| 224 uart_on() | |
| 225 { | |
| 226 // Power reduction register | |
| 227 PRR &= ~_BV(PRUSART0); | |
| 228 | |
| 229 // All of this needs to be done each time after turning off the PRR | |
| 230 // baud rate | |
| 231 UBRR0H = (unsigned char)(UBRR >> 8); | |
| 232 UBRR0L = (unsigned char)UBRR; | |
| 233 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
| 234 //8N1 | |
| 235 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
| 236 } | |
| 237 | |
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238 #ifdef SIM_DEBUG |
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239 static char sim_out[140]; |
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240 static uint8_t sim_idx = 0; |
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241 static uint8_t last_sim_idx = 0; |
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242 #endif |
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243 |
| 0 | 244 int |
| 245 uart_putchar(char c, FILE *stream) | |
| 246 { | |
| 247 // XXX could perhaps sleep in the loop for power. | |
| 248 if (c == '\n') | |
| 249 { | |
| 250 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 251 UDR0 = '\r'; | |
| 252 } | |
| 253 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 254 UDR0 = c; | |
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255 #ifdef SIM_DEBUG |
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256 sim_out[sim_idx] = c; |
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257 sim_idx++; |
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258 sim_idx %= sizeof(sim_out); |
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259 #endif |
| 0 | 260 if (c == '\r') |
| 261 { | |
| 262 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 263 UDR0 = '\n'; | |
| 264 } | |
| 265 return (unsigned char)c; | |
| 266 } | |
| 267 | |
| 268 static void | |
| 269 cmd_reset() | |
| 270 { | |
| 271 printf_P(PSTR("reset\n")); | |
| 272 _delay_ms(100); | |
| 273 cli(); // disable interrupts | |
| 274 wdt_enable(WDTO_15MS); // enable watchdog | |
| 275 while(1); // wait for watchdog to reset processor | |
| 276 } | |
| 277 | |
| 2 | 278 static void |
| 279 cmd_newboot() | |
| 280 { | |
| 281 set_pi_boot_normal(1); | |
| 282 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 283 { | |
| 284 newboot_count = newboot_limit; | |
| 285 } | |
| 286 printf_P(PSTR("newboot for %d secs"), newboot_limit); | |
| 287 } | |
| 288 | |
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289 static void |
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290 cmd_oldboot() |
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291 { |
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292 set_pi_boot_normal(0); |
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293 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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294 { |
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295 newboot_count = 0; |
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296 } |
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297 printf_P(PSTR("back to old boot\n")); |
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298 } |
| 1 | 299 |
| 0 | 300 |
| 301 static void | |
| 1 | 302 cmd_get_params() |
| 0 | 303 { |
| 2 | 304 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
| 1 | 305 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
| 306 { | |
| 2 | 307 cur_watchdog_long = watchdog_long_count; |
| 308 cur_watchdog_short = watchdog_short_count; | |
| 309 cur_newboot = newboot_count; | |
| 310 cur_oneshot = oneshot_count; | |
| 1 | 311 } |
| 312 | |
| 2 | 313 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu) oneshot (%lu)\n"), |
| 1 | 314 watchdog_long_limit, |
| 2 | 315 cur_watchdog_long, |
| 1 | 316 watchdog_short_limit, |
| 2 | 317 cur_watchdog_short, |
| 1 | 318 newboot_limit, |
| 2 | 319 cur_newboot, |
| 320 cur_oneshot); | |
| 0 | 321 } |
| 322 | |
| 323 static void | |
| 1 | 324 cmd_set_params(const char *params) |
| 0 | 325 { |
| 1 | 326 uint32_t new_watchdog_long_limit; |
| 327 uint32_t new_watchdog_short_limit; | |
| 328 uint32_t new_newboot_limit; | |
| 329 | |
| 330 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
| 331 &new_watchdog_long_limit, | |
| 332 &new_watchdog_short_limit, | |
| 333 &new_newboot_limit); | |
| 334 | |
| 335 if (ret != 3) | |
| 0 | 336 { |
| 1 | 337 printf_P(PSTR("Bad values\n")); |
| 338 } | |
| 339 else | |
| 340 { | |
| 341 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 342 { | |
| 343 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
| 344 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
| 345 eeprom_write(new_newboot_limit, newboot_limit); | |
| 346 uint16_t magic = EXPECT_MAGIC; | |
| 347 eeprom_write(magic, magic); | |
| 0 | 348 } |
| 1 | 349 printf_P(PSTR("set_params for next boot\n")); |
| 350 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
| 351 new_watchdog_long_limit, | |
| 352 new_watchdog_short_limit, | |
| 353 new_newboot_limit); | |
| 354 } | |
| 355 } | |
| 0 | 356 |
| 1 | 357 uint8_t from_hex(char c) |
| 358 { | |
| 359 if (c >= '0' && c <= '9') { | |
| 360 return c-'0'; | |
| 361 } | |
| 362 if (c >= 'a' && c <= 'f') { | |
| 363 return c-'a' + 0xa; | |
| 364 } | |
| 365 if (c >= 'A' && c <= 'F') { | |
| 366 return c-'A' + 0xa; | |
| 367 } | |
| 368 return 0; | |
| 369 } | |
| 370 | |
| 2 | 371 static void |
| 372 printhex_nibble(const unsigned char b, FILE *stream) | |
| 373 { | |
| 374 unsigned char c = b & 0x0f; | |
| 375 if ( c > 9 ) { | |
| 376 c += 'A'-10; | |
| 377 } | |
| 378 else { | |
| 379 c += '0'; | |
| 380 } | |
| 381 fputc(c, stream); | |
| 382 } | |
| 383 | |
| 384 void | |
| 385 printhex_byte(const unsigned char b, FILE *stream) | |
| 386 { | |
| 387 printhex_nibble( b >> 4, stream); | |
| 388 printhex_nibble( b, stream); | |
| 389 } | |
| 390 | |
| 391 void | |
| 392 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
| 393 { | |
| 394 for (uint8_t i = 0; i < n; i++) | |
| 395 { | |
| 396 printhex_byte(id[i], stream); | |
| 397 } | |
| 398 } | |
| 399 | |
| 400 static int8_t | |
| 5 | 401 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
| 402 uint8_t bytes_len) | |
| 2 | 403 { |
| 404 // "N HEXKEY" | |
| 5 | 405 if (strlen(params) != bytes_len*2 + 2) { |
| 2 | 406 printf_P(PSTR("Wrong length key\n")); |
| 407 return -1; | |
| 408 } | |
| 409 | |
| 410 if (params[1] != ' ') | |
| 411 { | |
| 412 printf_P(PSTR("Missing space\n")); | |
| 413 return -1; | |
| 414 } | |
| 415 | |
| 416 *key_index = from_hex(params[0]); | |
| 417 if (*key_index >= NKEYS) | |
| 418 { | |
| 419 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
| 420 return -1; | |
| 421 } | |
| 422 | |
| 5 | 423 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
| 2 | 424 { |
| 425 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
| 426 } | |
| 427 return 0; | |
| 428 } | |
| 429 | |
| 1 | 430 static void |
| 431 cmd_set_avr_key(const char *params) | |
| 432 { | |
| 2 | 433 uint8_t new_key[KEYLEN]; |
| 434 uint8_t key_index; | |
| 5 | 435 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
| 2 | 436 { |
| 1 | 437 return; |
| 0 | 438 } |
| 2 | 439 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
| 8 | 440 #ifndef SIM_DEBUG |
| 2 | 441 eeprom_write(avr_keys, avr_keys); |
| 8 | 442 #endif |
| 2 | 443 } |
| 444 | |
| 445 static void | |
| 446 cmd_hmac(const char *params) | |
| 447 { | |
|
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448 uint8_t indata[2+HMACLEN] = {'H', ':'}; |
| 7 | 449 uint8_t outdata[HMACLEN]; |
| 2 | 450 uint8_t key_index; |
|
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451 if (parse_key(params, &key_index, &indata[2], HMACLEN) != 0) |
| 2 | 452 { |
| 453 printf_P(PSTR("FAIL: Bad input\n")); | |
| 5 | 454 return; |
| 2 | 455 } |
| 0 | 456 |
| 8 | 457 #ifndef SIM_DEBUG |
| 5 | 458 long_delay(200); |
| 8 | 459 #endif |
| 5 | 460 |
|
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461 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
| 2 | 462 printf_P(PSTR("HMAC: ")); |
| 7 | 463 printhex(outdata, HMACLEN, stdout); |
| 5 | 464 fputc('\n', stdout); |
| 465 } | |
| 466 | |
| 467 static void | |
| 468 cmd_decrypt(const char *params) | |
| 469 { | |
|
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470 uint8_t indata[HMACLEN+AESLEN]; // XXX |
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471 // a temporary buffer |
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472 uint8_t output[HMACLEN] = {'D', ':'}; |
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473 _Static_assert(AESLEN+2 <= sizeof(output), "sufficient output buffer"); |
| 5 | 474 uint8_t key_index; |
|
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475 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
| 5 | 476 { |
| 477 printf_P(PSTR("FAIL: Bad input\n")); | |
| 478 return; | |
| 479 } | |
| 480 | |
| 8 | 481 #ifndef SIM_DEBUG |
| 5 | 482 long_delay(200); |
| 8 | 483 #endif |
| 7 | 484 |
| 5 | 485 // check the signature |
|
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486 memcpy(&output[2], &indata[HMACLEN], AESLEN); |
| 12 | 487 hmac_sha1(output, avr_keys[key_index], KEYLEN*8, output, (2+AESLEN)*8); |
| 5 | 488 |
|
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489 if (memcmp(output, indata, HMACLEN) != 0) { |
| 5 | 490 printf_P(PSTR("FAIL: hmac mismatch\n")); |
| 491 } | |
| 492 | |
|
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493 uint8_t tmpbuf[256]; |
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494 aesInit(avr_keys[key_index], tmpbuf); |
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495 aesDecrypt(&indata[HMACLEN], NULL); |
| 5 | 496 |
| 497 printf_P(PSTR("DECRYPTED: ")); | |
| 498 printhex(output, AESLEN, stdout); | |
| 2 | 499 fputc('\n', stdout); |
| 500 } | |
| 501 | |
| 502 static void | |
| 503 cmd_oneshot_reboot(const char *params) | |
| 504 { | |
| 505 uint32_t new_delay = strtoul(params, NULL, 10); | |
| 506 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 1 | 507 { |
| 2 | 508 oneshot_count = new_delay; |
| 1 | 509 } |
|
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510 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
| 0 | 511 } |
| 512 | |
| 513 static void | |
|
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514 clamp_params() |
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515 { |
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516 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
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517 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
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518 { |
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519 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
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520 } |
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521 |
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522 if (watchdog_short_limit != 0 |
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523 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
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524 { |
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525 watchdog_short_limit = 0; |
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526 } |
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527 |
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528 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
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529 { |
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530 newboot_limit = NEWBOOT_DEFAULT; |
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531 } |
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532 } |
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533 |
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534 static void |
| 0 | 535 load_params() |
| 536 { | |
| 537 uint16_t magic; | |
| 538 eeprom_read(magic, magic); | |
| 539 if (magic == EXPECT_MAGIC) | |
| 540 { | |
| 1 | 541 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
| 542 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
| 2 | 543 eeprom_read(newboot_limit, newboot_limit); |
| 1 | 544 } |
| 2 | 545 |
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546 clamp_params(); |
| 16 | 547 |
| 2 | 548 eeprom_read(avr_keys, avr_keys); |
| 0 | 549 } |
| 550 | |
| 2 | 551 static void |
|
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552 cmd_alive() |
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553 { |
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554 printf_P(PSTR("Ah, good.\n")); |
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555 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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556 { |
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557 watchdog_long_count = 0; |
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558 watchdog_short_count = 0; |
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559 } |
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560 long_reboot_mode = 0; |
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561 } |
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562 |
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|
563 static void |
| 2 | 564 cmd_vcc() |
| 0 | 565 { |
| 2 | 566 uint16_t vcc = adc_vcc(); |
|
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567 uint16_t v5 = adc_5v(vcc); |
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568 printf_P(PSTR("vcc: %u mV\n5v: %u mV\n"), vcc, v5); |
| 0 | 569 } |
| 570 | |
| 571 static void | |
| 572 read_handler() | |
| 573 { | |
| 17 | 574 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
| 575 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
| 576 | |
| 577 LOCAL_PSTR(get_params); | |
| 578 LOCAL_PSTR(set_params); | |
| 579 LOCAL_PSTR(set_key); | |
| 580 LOCAL_PSTR(oneshot); | |
| 581 LOCAL_PSTR(hmac); | |
| 582 LOCAL_PSTR(decrypt); | |
| 583 LOCAL_PSTR(alive); | |
| 584 LOCAL_PSTR(vcc); | |
| 585 LOCAL_PSTR(reset); | |
| 586 LOCAL_PSTR(newboot); | |
| 587 LOCAL_PSTR(oldboot); | |
| 588 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); | |
| 589 LOCAL_HELP(set_key, "20_byte_hex>"); | |
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590 LOCAL_HELP(oneshot, "<timeout>"); |
| 17 | 591 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
| 592 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
| 593 | |
| 594 static const struct handler { | |
| 595 PGM_P name; | |
| 596 void(*cmd)(const char *param); | |
| 597 // existence of arg_help indicates if the cmd takes a parameter. | |
| 598 PGM_P arg_help; | |
| 599 } handlers[11] PROGMEM = | |
| 600 { | |
| 601 {get_params_str, cmd_get_params, NULL}, | |
| 602 {set_params_str, cmd_set_params, set_params_help}, | |
| 603 {set_key_str, cmd_set_avr_key, set_key_help}, | |
|
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604 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, |
| 17 | 605 {hmac_str, cmd_hmac, hmac_help}, |
| 606 {decrypt_str, cmd_decrypt, decrypt_help}, | |
| 607 {alive_str, cmd_alive, NULL}, | |
| 608 {vcc_str, cmd_vcc, NULL}, | |
| 609 {reset_str, cmd_reset, NULL}, | |
| 610 {newboot_str, cmd_newboot, NULL}, | |
| 611 {oldboot_str, cmd_oldboot, NULL}, | |
| 612 }; | |
| 613 | |
| 614 if (readbuf[0] == '\0') | |
| 615 { | |
| 616 return; | |
| 617 } | |
| 618 | |
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619 if (strcmp_P(readbuf, PSTR("help")) == 0) |
| 17 | 620 { |
| 621 printf_P(PSTR("Commands:---\n")); | |
| 622 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 623 { | |
| 624 struct handler h; | |
| 625 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 626 printf_P(h.name); | |
| 627 if (h.arg_help) | |
| 628 { | |
| 629 putchar(' '); | |
| 630 printf_P(h.arg_help); | |
| 631 } | |
| 632 putchar('\n'); | |
| 633 }; | |
| 634 printf_P(PSTR("---\n")); | |
|
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635 return; |
| 17 | 636 } |
| 637 | |
| 638 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 639 { | |
| 640 struct handler h; | |
| 641 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 642 | |
| 643 const int h_len = strlen_P(h.name); | |
| 644 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
| 645 { | |
| 646 if (h.arg_help) | |
| 647 { | |
| 648 if (readbuf[h_len] == ' ') | |
| 649 { | |
|
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650 h.cmd(&readbuf[h_len+1]); |
| 17 | 651 return; |
| 652 } | |
| 653 } | |
| 654 else | |
| 655 { | |
| 656 if (readbuf[h_len] == '\0') | |
| 657 { | |
|
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658 void(*void_cmd)() = h.cmd; |
| 17 | 659 void_cmd(); |
| 660 return; | |
| 661 } | |
| 662 } | |
| 663 } | |
| 664 } | |
| 665 | |
| 666 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
| 0 | 667 } |
| 668 | |
| 669 ISR(INT0_vect) | |
| 670 { | |
| 671 blink(); | |
| 672 _delay_ms(100); | |
| 673 blink(); | |
| 674 } | |
| 675 | |
| 676 ISR(USART_RX_vect) | |
| 677 { | |
| 678 char c = UDR0; | |
| 679 #ifdef HAVE_UART_ECHO | |
| 680 uart_putchar(c, NULL); | |
| 681 #endif | |
| 682 if (c == '\r' || c == '\n') | |
| 683 { | |
| 684 if (readpos > 0) | |
| 685 { | |
| 686 readbuf[readpos] = '\0'; | |
| 687 have_cmd = 1; | |
| 688 readpos = 0; | |
| 689 } | |
| 690 } | |
| 691 else | |
| 692 { | |
| 693 readbuf[readpos] = c; | |
| 694 readpos++; | |
| 695 if (readpos >= sizeof(readbuf)) | |
| 696 { | |
| 697 readpos = 0; | |
| 698 } | |
| 699 } | |
| 700 } | |
| 701 | |
| 2 | 702 ISR(TIMER1_COMPA_vect) |
| 0 | 703 { |
| 2 | 704 TCNT1 = 0; |
| 0 | 705 |
| 706 clock_epoch += TICK; | |
| 707 | |
| 1 | 708 // watchdogs count up, continuous |
| 709 if (watchdog_long_limit > 0) { | |
| 2 | 710 watchdog_long_count += TICK; |
| 1 | 711 if (watchdog_long_count >= watchdog_long_limit) |
| 712 { | |
| 713 watchdog_long_count = 0; | |
| 714 watchdog_long_hit = 1; | |
| 715 } | |
| 0 | 716 } |
| 717 | |
| 1 | 718 if (watchdog_short_limit > 0) { |
| 2 | 719 watchdog_short_count += TICK; |
| 1 | 720 if (watchdog_short_count >= watchdog_short_limit) |
| 721 { | |
| 722 watchdog_short_count = 0; | |
| 723 watchdog_short_hit = 1; | |
| 724 } | |
| 0 | 725 } |
| 726 | |
| 2 | 727 // newboot counts down |
| 1 | 728 if (newboot_count > 0) |
| 0 | 729 { |
| 2 | 730 newboot_count-=TICK; |
| 731 if (newboot_count <= 0) | |
| 1 | 732 { |
| 733 newboot_hit = 1; | |
| 2 | 734 newboot_count = 0; |
| 1 | 735 } |
| 0 | 736 } |
| 1 | 737 |
| 2 | 738 if (oneshot_count > 0) |
| 739 { | |
| 740 oneshot_count-=TICK; | |
| 741 if (oneshot_count <= 0) | |
| 742 { | |
| 743 oneshot_hit = 1; | |
| 744 oneshot_count = 0; | |
| 745 } | |
| 746 } | |
|
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747 |
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748 if (reboot_count > 0) |
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749 { |
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750 reboot_count -= TICK; |
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751 if (reboot_count <= 0) |
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752 { |
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753 reboot_hit = 1; |
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|
754 reboot_count = 0; |
|
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|
755 } |
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|
756 } |
| 0 | 757 } |
| 758 | |
| 759 static void | |
| 760 idle_sleep() | |
| 761 { | |
| 762 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 763 sleep_mode(); | |
| 764 } | |
| 765 | |
| 766 static uint16_t | |
| 767 adc_vcc() | |
| 768 { | |
| 769 PRR &= ~_BV(PRADC); | |
| 770 | |
| 771 // /16 prescaler | |
| 772 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 773 | |
| 774 // set to measure 1.1 reference | |
| 775 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 776 // average a number of samples | |
| 777 uint16_t sum = 0; | |
| 778 uint8_t num = 0; | |
| 779 for (uint8_t n = 0; n < 20; n++) | |
| 780 { | |
| 781 ADCSRA |= _BV(ADSC); | |
| 782 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 783 | |
| 784 uint8_t low_11 = ADCL; | |
| 785 uint8_t high_11 = ADCH; | |
| 786 uint16_t val = low_11 + (high_11 << 8); | |
| 787 | |
| 788 if (n >= 4) | |
| 789 { | |
| 790 sum += val; | |
| 791 num++; | |
| 792 } | |
| 793 } | |
| 794 ADCSRA = 0; | |
| 795 PRR |= _BV(PRADC); | |
| 796 | |
| 797 //float res_volts = 1.1 * 1024 * num / sum; | |
| 798 //return 1000 * res_volts; | |
| 799 return ((uint32_t)1100*1024*num) / sum; | |
| 800 } | |
| 801 | |
|
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802 #define SCALER_5V 2 |
|
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|
803 |
|
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|
804 static uint16_t |
|
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|
805 adc_5v(uint16_t vcc) |
|
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806 { |
|
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|
807 PRR &= ~_BV(PRADC); |
|
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|
808 |
|
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|
809 // /16 prescaler |
|
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810 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
|
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|
811 |
|
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|
812 // set to measure ADC4 against AVCC |
|
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|
813 ADMUX = _BV(REFS0) | _BV(MUX2); |
|
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814 // average a number of samples |
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|
815 uint16_t sum = 0; |
|
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816 uint8_t num = 0; |
|
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817 for (uint8_t n = 0; n < 20; n++) |
|
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818 { |
|
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819 ADCSRA |= _BV(ADSC); |
|
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820 loop_until_bit_is_clear(ADCSRA, ADSC); |
|
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|
821 |
|
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822 uint8_t low_11 = ADCL; |
|
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823 uint8_t high_11 = ADCH; |
|
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824 uint16_t val = low_11 + (high_11 << 8); |
|
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|
825 |
|
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826 if (n >= 4) |
|
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|
827 { |
|
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|
828 sum += val; |
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|
829 num++; |
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830 } |
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|
831 } |
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|
832 ADCSRA = 0; |
|
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|
833 PRR |= _BV(PRADC); |
|
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|
834 |
|
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835 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024));; |
|
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836 } |
|
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|
837 |
| 0 | 838 static void |
| 2 | 839 reboot_pi() |
| 840 { | |
|
18
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841 printf_P(PSTR("Real reboot now\n")); |
|
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|
842 // pull it low for 200ms |
| 2 | 843 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
| 844 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
|
18
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845 _delay_ms(200); |
|
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diff
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|
846 |
|
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|
847 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
|
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diff
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|
848 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
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|
849 } |
|
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|
850 |
|
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|
851 static void |
|
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diff
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|
852 wait_reboot_pi() |
|
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|
853 { |
|
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Matt Johnston <matt@ucc.asn.au>
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|
854 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
|
021e6e0006f4
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|
855 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
|
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diff
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|
856 { |
|
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|
857 reboot_count = WARNING_TIME; |
|
021e6e0006f4
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diff
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|
858 } |
|
021e6e0006f4
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|
859 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
| 2 | 860 } |
| 861 | |
| 862 static void | |
| 863 set_pi_boot_normal(uint8_t normal) | |
| 864 { | |
| 865 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 866 if (normal) | |
| 867 { | |
| 868 // tristate | |
| 869 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 870 } | |
| 871 else | |
| 872 { | |
| 873 // pull it low | |
| 874 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
| 875 | |
| 876 } | |
| 877 } | |
| 878 | |
| 879 static void | |
| 880 check_flags() | |
| 881 { | |
|
15
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|
882 if (watchdog_long_hit) |
|
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|
883 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
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|
884 // alternate between booting normal and emergency |
|
915be6f0ff13
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diff
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|
885 if (long_reboot_mode) |
|
915be6f0ff13
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|
886 { |
|
915be6f0ff13
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|
887 cmd_newboot(); |
|
915be6f0ff13
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|
888 } |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
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|
889 long_reboot_mode ^= 1; |
|
915be6f0ff13
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|
890 } |
|
915be6f0ff13
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diff
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|
891 |
| 2 | 892 if (watchdog_long_hit |
| 893 || watchdog_short_hit | |
| 894 || oneshot_hit) | |
| 895 { | |
| 12 | 896 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
| 897 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
|
18
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diff
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|
898 wait_reboot_pi(); |
| 2 | 899 } |
| 900 | |
| 901 if (newboot_hit) { | |
| 902 set_pi_boot_normal(0); | |
| 903 } | |
| 904 | |
|
18
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|
905 if (reboot_hit) { |
|
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|
906 reboot_pi(); |
|
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|
907 } |
|
021e6e0006f4
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diff
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|
908 |
| 2 | 909 watchdog_long_hit = 0; |
| 910 watchdog_short_hit = 0; | |
| 911 newboot_hit = 0; | |
| 912 oneshot_hit = 0; | |
|
18
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|
913 reboot_hit = 0; |
| 2 | 914 } |
| 915 | |
| 916 static void | |
| 0 | 917 do_comms() |
| 918 { | |
| 919 // avoid receiving rubbish, perhaps | |
| 920 uart_on(); | |
| 921 | |
| 922 // write sd card here? same 3.3v regulator... | |
| 923 | |
| 1 | 924 while (1) |
| 0 | 925 { |
| 1 | 926 wdt_reset(); |
| 2 | 927 |
|
18
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diff
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|
928 #ifdef SIM_DEBUG |
|
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|
929 if (sim_idx != last_sim_idx) |
|
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|
930 { |
|
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|
931 last_sim_idx = sim_idx; |
|
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|
932 } |
|
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|
933 #endif |
|
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|
934 |
| 2 | 935 check_flags(); |
| 936 | |
| 0 | 937 if (have_cmd) |
| 938 { | |
| 939 have_cmd = 0; | |
| 940 read_handler(); | |
| 941 continue; | |
| 942 } | |
| 943 | |
| 944 // wait for commands from the master | |
| 945 idle_sleep(); | |
| 946 } | |
| 947 } | |
| 948 | |
| 949 static void | |
| 950 blink() | |
| 951 { | |
|
18
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|
952 #if 0 |
|
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|
953 PORT_ &= ~_BV(PIN_LED); |
| 0 | 954 _delay_ms(1); |
| 955 PORT_LED |= _BV(PIN_LED); | |
|
18
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|
956 #endif |
| 0 | 957 } |
| 958 | |
| 959 static void | |
| 960 long_delay(int ms) | |
| 961 { | |
| 962 int iter = ms / 100; | |
| 963 | |
| 964 for (int i = 0; i < iter; i++) | |
| 965 { | |
| 966 _delay_ms(100); | |
| 967 } | |
| 968 } | |
| 969 | |
| 970 ISR(BADISR_vect) | |
| 971 { | |
| 972 //uart_on(); | |
| 973 printf_P(PSTR("Bad interrupt\n")); | |
| 974 } | |
| 975 | |
| 976 int main(void) | |
| 977 { | |
| 17 | 978 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
| 979 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
|
15
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|
980 |
| 0 | 981 setup_chip(); |
| 982 blink(); | |
| 983 | |
| 984 stdout = &mystdout; | |
| 985 uart_on(); | |
| 986 | |
| 12 | 987 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]")); |
| 0 | 988 |
| 2 | 989 set_pi_boot_normal(0); |
| 990 | |
| 0 | 991 load_params(); |
| 992 | |
| 993 setup_tick_counter(); | |
| 994 | |
| 995 sei(); | |
| 996 | |
| 8 | 997 #if 0 |
| 998 // encryption test | |
| 999 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
| 1000 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
| 12 | 1001 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
| 1002 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
| 1003 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
| 8 | 1004 #endif |
| 1005 | |
| 1 | 1006 // doesn't return |
| 1007 do_comms(); | |
| 0 | 1008 |
| 1009 return 0; /* never reached */ | |
| 1010 } |