Mercurial > pihelp
annotate main.c @ 31:5d6a841eef82
/128 prescaler for adc
author | Matt Johnston <matt@ucc.asn.au> |
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date | Thu, 27 Jun 2013 00:12:32 +0800 |
parents | ce5097eacf2f |
children | cce426bb6d3e |
rev | line source |
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0 | 1 #include <stdio.h> |
2 #include <string.h> | |
3 #include <stddef.h> | |
4 #include <stdbool.h> | |
5 #include <stdlib.h> | |
6 #include <avr/io.h> | |
7 #include <avr/interrupt.h> | |
8 #include <avr/sleep.h> | |
9 #include <util/delay.h> | |
10 #include <avr/pgmspace.h> | |
11 #include <avr/eeprom.h> | |
12 #include <avr/wdt.h> | |
13 #include <util/atomic.h> | |
14 #include <util/crc16.h> | |
15 | |
2 | 16 #include "hmac-sha1.h" |
5 | 17 #include "aes.h" |
2 | 18 |
19
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19 #include "fat.h" |
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20 #include "fat_config.h" |
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21 #include "partition.h" |
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22 #include "sd_raw.h" |
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23 #include "sd_raw_config.h" |
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24 |
1 | 25 //#include "simple_ds18b20.h" |
26 //#include "onewire.h" | |
0 | 27 |
20 | 28 // not set via bootloader |
29 //LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); | |
5 | 30 |
0 | 31 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
32 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
33 | |
34 // TICK should be 8 or less (8 untested). all timers need | |
35 // to be a multiple. | |
36 | |
1 | 37 #define TICK 1 |
17 | 38 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
5 | 39 #define NKEYS 10 |
40 #define HMACLEN 20 | |
41 #define AESLEN 16 | |
42 #define KEYLEN HMACLEN | |
1 | 43 |
27 | 44 #define BAUD 115200 |
20 | 45 #define UBRR ((F_CPU)/(16*(BAUD))-1) |
0 | 46 |
2 | 47 #define PORT_PI_BOOT PORTD |
48 #define DDR_PI_BOOT DDRD | |
4 | 49 #define PIN_PI_BOOT PD5 |
2 | 50 |
51 #define PORT_PI_RESET PORTD | |
52 #define DDR_PI_RESET DDRD | |
53 #define PIN_PI_RESET PD6 | |
54 | |
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55 #define PORT_PI_WARNING PORTD |
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56 #define DDR_PI_WARNING DDRD |
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57 #define PIN_PI_WARNING PD7 |
0 | 58 |
59 // #define HAVE_UART_ECHO | |
60 | |
7 | 61 // stores a value of clock_epoch combined with the remainder of TCNT1, |
0 | 62 // for 1/32 second accuracy |
63 struct epoch_ticks | |
64 { | |
65 uint32_t ticks; | |
66 // remainder | |
20 | 67 uint16_t rem; |
0 | 68 }; |
69 | |
16 | 70 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
71 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
72 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
73 | |
74 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
75 | |
76 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
77 #define NEWBOOT_MIN (60*2) // 2 minutes | |
78 #define NEWBOOT_MAX (60*30) // 30 mins | |
79 | |
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80 #define WARNING_TIME 10 |
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81 |
1 | 82 // eeprom-settable parameters, default values defined here. |
83 // all timeouts should be a multiple of TICK | |
16 | 84 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
1 | 85 static uint32_t watchdog_short_limit = 0; |
16 | 86 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
0 | 87 |
1 | 88 // avr proves itself |
2 | 89 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
0 | 90 |
91 // ---- Atomic guards required accessing these variables | |
92 // clock_epoch in seconds | |
93 static uint32_t clock_epoch; | |
1 | 94 // watchdog counts up |
95 static uint32_t watchdog_long_count; | |
96 static uint32_t watchdog_short_count; | |
2 | 97 // newboot counts down |
1 | 98 static uint32_t newboot_count; |
2 | 99 // oneshot counts down |
100 static uint32_t oneshot_count; | |
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101 // countdown after the warning. |
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102 static uint8_t reboot_count; |
27 | 103 // set by adc completion interrupt |
104 static uint8_t adc_done; | |
2 | 105 |
0 | 106 // ---- End atomic guards required |
107 | |
108 // boolean flags | |
1 | 109 static uint8_t watchdog_long_hit; |
110 static uint8_t watchdog_short_hit; | |
111 static uint8_t newboot_hit; | |
2 | 112 static uint8_t oneshot_hit; |
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113 static uint8_t reboot_hit; |
0 | 114 |
22 | 115 // informational for status messages |
116 static uint8_t boot_normal_status; | |
117 | |
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118 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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119 // working firmware should boot. set back to 0 for each 'alive' |
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120 // command |
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121 static uint8_t long_reboot_mode = 0; |
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122 |
0 | 123 static uint8_t readpos; |
20 | 124 static char readbuf[150]; |
0 | 125 static uint8_t have_cmd; |
126 | |
127 int uart_putchar(char c, FILE *stream); | |
22 | 128 static void long_delay(uint16_t ms); |
0 | 129 static void blink(); |
130 static uint16_t adc_vcc(); | |
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131 static uint16_t adc_5v(uint16_t vcc); |
20 | 132 static uint16_t adc_temp(); |
2 | 133 static void set_pi_boot_normal(uint8_t normal); |
0 | 134 |
17 | 135 |
0 | 136 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
137 _FDEV_SETUP_WRITE); | |
138 | |
139 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
140 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
141 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
142 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
143 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
144 | |
1 | 145 #define EXPECT_MAGIC 0xdf83 |
0 | 146 |
147 struct __attribute__ ((__packed__)) __eeprom_data { | |
1 | 148 uint32_t watchdog_long_limit; |
149 uint32_t watchdog_short_limit; | |
150 uint32_t newboot_limit; | |
0 | 151 |
2 | 152 uint8_t avr_keys[NKEYS][KEYLEN]; |
0 | 153 |
154 uint16_t magic; | |
155 }; | |
156 | |
157 // Very first setup | |
158 static void | |
159 setup_chip() | |
160 { | |
161 cli(); | |
162 | |
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163 // set to 8 seconds, in case sha1 is slow etc. |
1 | 164 wdt_enable(WDTO_8S); |
165 | |
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166 // Set scaler to /1, -> clock to 8mhz |
0 | 167 CLKPR = _BV(CLKPCE); |
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168 CLKPR = 0; |
0 | 169 |
170 // enable pullups | |
1 | 171 // XXX matt pihelp |
5 | 172 //PORTB = 0xff; // XXX change when using SPI |
173 //PORTD = 0xff; | |
174 //PORTC = 0xff; | |
0 | 175 |
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176 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
0 | 177 |
5 | 178 #if 0 |
0 | 179 // set pullup |
180 PORTD |= _BV(PD2); | |
181 // INT0 setup | |
182 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
183 EIMSK = _BV(INT0); | |
5 | 184 #endif |
0 | 185 |
186 // comparator disable | |
187 ACSR = _BV(ACD); | |
188 | |
189 // disable adc pin input buffers | |
190 DIDR0 = 0x3F; // acd0-adc5 | |
191 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
192 | |
193 sei(); | |
194 } | |
195 | |
196 static void | |
197 get_epoch_ticks(struct epoch_ticks *t) | |
198 { | |
199 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
200 { | |
201 t->ticks = clock_epoch; | |
7 | 202 t->rem = TCNT1; |
0 | 203 } |
204 } | |
205 | |
206 static void | |
207 setup_tick_counter() | |
208 { | |
2 | 209 // set up counter1 |
210 | |
0 | 211 // set up counter2. |
212 // COM21 COM20 Set OC2 on Compare Match (p116) | |
213 // WGM21 Clear counter on compare | |
214 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
215 // toggle on match | |
2 | 216 TCCR1A = _BV(COM1A0); |
8 | 217 #ifdef SIM_DEBUG |
218 // systemclock/8 | |
219 TCCR1B = _BV(CS11); | |
220 #else | |
20 | 221 // systemclock/256 |
222 TCCR1B = _BV(CS12); | |
8 | 223 #endif |
2 | 224 TCNT1 = 0; |
225 OCR1A = SLEEP_COMPARE; | |
0 | 226 // interrupt |
2 | 227 TIMSK1 = _BV(OCIE1A); |
0 | 228 } |
229 | |
230 static void | |
231 uart_on() | |
232 { | |
233 // Power reduction register | |
234 PRR &= ~_BV(PRUSART0); | |
235 | |
236 // All of this needs to be done each time after turning off the PRR | |
237 // baud rate | |
238 UBRR0H = (unsigned char)(UBRR >> 8); | |
239 UBRR0L = (unsigned char)UBRR; | |
240 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
241 //8N1 | |
242 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
243 } | |
244 | |
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245 #ifdef SIM_DEBUG |
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246 static char sim_out[140]; |
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247 static uint8_t sim_idx = 0; |
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248 static uint8_t last_sim_idx = 0; |
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249 #endif |
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250 |
0 | 251 int |
252 uart_putchar(char c, FILE *stream) | |
253 { | |
254 // XXX could perhaps sleep in the loop for power. | |
255 if (c == '\n') | |
256 { | |
257 loop_until_bit_is_set(UCSR0A, UDRE0); | |
258 UDR0 = '\r'; | |
259 } | |
260 loop_until_bit_is_set(UCSR0A, UDRE0); | |
261 UDR0 = c; | |
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262 #ifdef SIM_DEBUG |
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263 sim_out[sim_idx] = c; |
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264 sim_idx++; |
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265 sim_idx %= sizeof(sim_out); |
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266 #endif |
0 | 267 if (c == '\r') |
268 { | |
269 loop_until_bit_is_set(UCSR0A, UDRE0); | |
270 UDR0 = '\n'; | |
271 } | |
272 return (unsigned char)c; | |
273 } | |
274 | |
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275 uint8_t find_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name, struct fat_dir_entry_struct* dir_entry) |
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276 { |
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277 while(fat_read_dir(dd, dir_entry)) |
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278 { |
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279 if(strcmp(dir_entry->long_name, name) == 0) |
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280 { |
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281 fat_reset_dir(dd); |
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282 return 1; |
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283 } |
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284 } |
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285 |
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286 return 0; |
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287 } |
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288 |
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289 struct fat_file_struct* |
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290 open_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name) |
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291 { |
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292 struct fat_dir_entry_struct file_entry; |
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293 if(!find_file_in_dir(fs, dd, name, &file_entry)) |
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294 return 0; |
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295 |
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296 return fat_open_file(fs, &file_entry); |
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297 } |
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298 |
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299 static void |
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300 hmac_file(const char* fn) |
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301 { |
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302 sd_raw_init(); |
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303 struct partition_struct* partition = partition_open(sd_raw_read, sd_raw_read_interval, 0, 0, 0); |
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304 struct fat_fs_struct* fs = fat_open(partition); |
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305 struct fat_dir_entry_struct directory; |
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306 fat_get_dir_entry_of_path(fs, "/", &directory); |
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307 |
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308 struct sd_raw_info disk_info; |
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309 sd_raw_get_info(&disk_info); |
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310 printf("diskinfo size %d", disk_info.capacity); |
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311 |
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312 struct fat_dir_struct* dd = fat_open_dir(fs, &directory); |
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313 struct fat_file_struct* fd = open_file_in_dir(fs, dd, "fn"); |
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314 |
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315 char c = 0; |
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316 char buf[512]; |
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317 for (int i = 0; i < 10; i++) |
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318 { |
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319 fat_read_file(fd, buf, sizeof(buf)); |
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320 c ^= buf[0]; |
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321 } |
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322 printf("total %d\n", c); |
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323 } |
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324 |
20 | 325 static void cmd_reset() __attribute__ ((noreturn)); |
0 | 326 static void |
20 | 327 cmd_reset() |
0 | 328 { |
329 printf_P(PSTR("reset\n")); | |
330 _delay_ms(100); | |
331 cli(); // disable interrupts | |
332 wdt_enable(WDTO_15MS); // enable watchdog | |
333 while(1); // wait for watchdog to reset processor | |
334 } | |
335 | |
2 | 336 static void |
337 cmd_newboot() | |
338 { | |
339 set_pi_boot_normal(1); | |
340 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
341 { | |
342 newboot_count = newboot_limit; | |
343 } | |
20 | 344 printf_P(PSTR("newboot for %d secs\n"), newboot_limit); |
2 | 345 } |
346 | |
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347 static void |
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348 cmd_oldboot() |
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349 { |
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350 set_pi_boot_normal(0); |
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351 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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352 { |
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353 newboot_count = 0; |
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354 } |
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355 printf_P(PSTR("back to old boot\n")); |
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356 } |
1 | 357 |
0 | 358 |
359 static void | |
20 | 360 cmd_status() |
0 | 361 { |
2 | 362 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
20 | 363 struct epoch_ticks t; |
364 | |
365 get_epoch_ticks(&t); | |
366 | |
1 | 367 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
368 { | |
2 | 369 cur_watchdog_long = watchdog_long_count; |
370 cur_watchdog_short = watchdog_short_count; | |
371 cur_newboot = newboot_count; | |
372 cur_oneshot = oneshot_count; | |
1 | 373 } |
374 | |
20 | 375 printf_P(PSTR("limit (current)\n" |
376 "watchdog_long %lu (%lu) watchdog newboot mode %d\n" | |
377 "watchdog_short %lu (%lu)\n" | |
378 "newboot %lu (%lu)\n" | |
379 "oneshot (%lu)\n" | |
380 "uptime %lu rem %u\n" | |
22 | 381 "boot normal %hhu\n" |
20 | 382 ), |
383 watchdog_long_limit, cur_watchdog_long, long_reboot_mode, | |
384 watchdog_short_limit, cur_watchdog_short, | |
385 newboot_limit, cur_newboot, | |
386 cur_oneshot, | |
22 | 387 t.ticks, t.rem, |
388 boot_normal_status); | |
0 | 389 } |
390 | |
391 static void | |
1 | 392 cmd_set_params(const char *params) |
0 | 393 { |
1 | 394 uint32_t new_watchdog_long_limit; |
395 uint32_t new_watchdog_short_limit; | |
396 uint32_t new_newboot_limit; | |
397 | |
398 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
399 &new_watchdog_long_limit, | |
400 &new_watchdog_short_limit, | |
401 &new_newboot_limit); | |
402 | |
403 if (ret != 3) | |
0 | 404 { |
1 | 405 printf_P(PSTR("Bad values\n")); |
406 } | |
407 else | |
408 { | |
409 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
410 { | |
411 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
412 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
413 eeprom_write(new_newboot_limit, newboot_limit); | |
414 uint16_t magic = EXPECT_MAGIC; | |
415 eeprom_write(magic, magic); | |
0 | 416 } |
1 | 417 printf_P(PSTR("set_params for next boot\n")); |
418 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
419 new_watchdog_long_limit, | |
420 new_watchdog_short_limit, | |
421 new_newboot_limit); | |
422 } | |
423 } | |
0 | 424 |
1 | 425 uint8_t from_hex(char c) |
426 { | |
427 if (c >= '0' && c <= '9') { | |
428 return c-'0'; | |
429 } | |
430 if (c >= 'a' && c <= 'f') { | |
431 return c-'a' + 0xa; | |
432 } | |
433 if (c >= 'A' && c <= 'F') { | |
434 return c-'A' + 0xa; | |
435 } | |
436 return 0; | |
437 } | |
438 | |
2 | 439 static void |
440 printhex_nibble(const unsigned char b, FILE *stream) | |
441 { | |
442 unsigned char c = b & 0x0f; | |
443 if ( c > 9 ) { | |
444 c += 'A'-10; | |
445 } | |
446 else { | |
447 c += '0'; | |
448 } | |
449 fputc(c, stream); | |
450 } | |
451 | |
452 void | |
453 printhex_byte(const unsigned char b, FILE *stream) | |
454 { | |
455 printhex_nibble( b >> 4, stream); | |
456 printhex_nibble( b, stream); | |
457 } | |
458 | |
459 void | |
460 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
461 { | |
462 for (uint8_t i = 0; i < n; i++) | |
463 { | |
464 printhex_byte(id[i], stream); | |
465 } | |
466 } | |
467 | |
468 static int8_t | |
5 | 469 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
470 uint8_t bytes_len) | |
2 | 471 { |
472 // "N HEXKEY" | |
5 | 473 if (strlen(params) != bytes_len*2 + 2) { |
20 | 474 printf_P(PSTR("Wrong length key. wanted %d, got %d, '%s'\n"), |
475 bytes_len*2+2, strlen(params), params); | |
2 | 476 return -1; |
477 } | |
478 | |
479 if (params[1] != ' ') | |
480 { | |
481 printf_P(PSTR("Missing space\n")); | |
482 return -1; | |
483 } | |
484 | |
485 *key_index = from_hex(params[0]); | |
486 if (*key_index >= NKEYS) | |
487 { | |
488 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
489 return -1; | |
490 } | |
491 | |
5 | 492 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
2 | 493 { |
494 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
495 } | |
496 return 0; | |
497 } | |
498 | |
1 | 499 static void |
500 cmd_set_avr_key(const char *params) | |
501 { | |
2 | 502 uint8_t new_key[KEYLEN]; |
503 uint8_t key_index; | |
5 | 504 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
2 | 505 { |
1 | 506 return; |
0 | 507 } |
2 | 508 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
8 | 509 #ifndef SIM_DEBUG |
2 | 510 eeprom_write(avr_keys, avr_keys); |
8 | 511 #endif |
20 | 512 printf_P(PSTR("Set key %d: "), key_index); |
513 printhex(new_key, sizeof(new_key), stdout); | |
514 putchar('\n'); | |
2 | 515 } |
516 | |
517 static void | |
518 cmd_hmac(const char *params) | |
519 { | |
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520 uint8_t indata[2+HMACLEN] = {'H', ':'}; |
7 | 521 uint8_t outdata[HMACLEN]; |
2 | 522 uint8_t key_index; |
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523 if (parse_key(params, &key_index, &indata[2], HMACLEN) != 0) |
2 | 524 { |
525 printf_P(PSTR("FAIL: Bad input\n")); | |
5 | 526 return; |
2 | 527 } |
0 | 528 |
8 | 529 #ifndef SIM_DEBUG |
5 | 530 long_delay(200); |
8 | 531 #endif |
5 | 532 |
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533 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
2 | 534 printf_P(PSTR("HMAC: ")); |
7 | 535 printhex(outdata, HMACLEN, stdout); |
20 | 536 putchar('\n'); |
5 | 537 } |
538 | |
539 static void | |
540 cmd_decrypt(const char *params) | |
541 { | |
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542 uint8_t indata[HMACLEN+AESLEN]; // XXX |
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543 // a temporary buffer |
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544 uint8_t output[HMACLEN] = {'D', ':'}; |
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545 _Static_assert(AESLEN+2 <= sizeof(output), "sufficient output buffer"); |
5 | 546 uint8_t key_index; |
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547 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
5 | 548 { |
549 printf_P(PSTR("FAIL: Bad input\n")); | |
550 return; | |
551 } | |
552 | |
8 | 553 #ifndef SIM_DEBUG |
5 | 554 long_delay(200); |
8 | 555 #endif |
7 | 556 |
5 | 557 // check the signature |
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558 memcpy(&output[2], &indata[HMACLEN], AESLEN); |
12 | 559 hmac_sha1(output, avr_keys[key_index], KEYLEN*8, output, (2+AESLEN)*8); |
5 | 560 |
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561 if (memcmp(output, indata, HMACLEN) != 0) { |
5 | 562 printf_P(PSTR("FAIL: hmac mismatch\n")); |
563 } | |
564 | |
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565 uint8_t tmpbuf[256]; |
27 | 566 aesInit(avr_keys[key_index], tmpbuf); |
567 aesDecrypt(&indata[HMACLEN], NULL); | |
5 | 568 |
569 printf_P(PSTR("DECRYPTED: ")); | |
570 printhex(output, AESLEN, stdout); | |
20 | 571 putchar('\n'); |
2 | 572 } |
573 | |
574 static void | |
575 cmd_oneshot_reboot(const char *params) | |
576 { | |
577 uint32_t new_delay = strtoul(params, NULL, 10); | |
578 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
1 | 579 { |
2 | 580 oneshot_count = new_delay; |
1 | 581 } |
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582 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
0 | 583 } |
584 | |
585 static void | |
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586 clamp_params() |
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587 { |
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588 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
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589 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
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590 { |
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591 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
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592 } |
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593 |
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594 if (watchdog_short_limit != 0 |
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595 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
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596 { |
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597 watchdog_short_limit = 0; |
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598 } |
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599 |
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600 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
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601 { |
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602 newboot_limit = NEWBOOT_DEFAULT; |
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603 } |
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604 } |
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605 |
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606 static void |
0 | 607 load_params() |
608 { | |
609 uint16_t magic; | |
610 eeprom_read(magic, magic); | |
611 if (magic == EXPECT_MAGIC) | |
612 { | |
1 | 613 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
614 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
2 | 615 eeprom_read(newboot_limit, newboot_limit); |
1 | 616 } |
2 | 617 |
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618 clamp_params(); |
16 | 619 |
2 | 620 eeprom_read(avr_keys, avr_keys); |
0 | 621 } |
622 | |
2 | 623 static void |
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624 cmd_alive() |
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625 { |
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626 printf_P(PSTR("Ah, good.\n")); |
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627 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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628 { |
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629 watchdog_long_count = 0; |
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630 watchdog_short_count = 0; |
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631 } |
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632 long_reboot_mode = 0; |
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633 } |
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634 |
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635 static void |
2 | 636 cmd_vcc() |
0 | 637 { |
2 | 638 uint16_t vcc = adc_vcc(); |
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639 uint16_t v5 = adc_5v(vcc); |
21 | 640 uint16_t temp = adc_temp(); |
641 // roughly? | |
642 uint16_t temp_deg = temp - 290; | |
643 printf_P(PSTR("vcc: %u mV\n" | |
644 "5v: %u mV\n" | |
26 | 645 "temp: %u mV (%dºC)\n" |
646 ), | |
27 | 647 vcc, v5, temp, temp_deg); |
0 | 648 } |
649 | |
20 | 650 |
27 | 651 void(*bootloader)() __attribute__ ((noreturn)) = (void*)0x7800; |
652 | |
20 | 653 #ifndef PROG_PASSWORD |
654 #define PROG_PASSWORD "Y2vvjxO5" | |
655 #endif | |
656 | |
657 static void | |
658 cmd_prog(const char* arg) | |
659 { | |
660 if (strcmp(arg, PROG_PASSWORD) != 0) | |
661 { | |
662 printf_P(PSTR("Bad prog password\n")); | |
663 return; | |
664 } | |
665 | |
666 // disable wdt | |
667 wdt_disable(); | |
668 | |
669 // disable interrupts | |
670 TIMSK0 = 0; | |
671 TIMSK1 = 0; | |
672 TIMSK2 = 0; | |
673 EIMSK = 0; | |
674 PCMSK0 = 0; | |
675 PCMSK1 = 0; | |
676 PCMSK2 = 0; | |
677 ACSR &= ~_BV(ACIE); | |
678 ADCSRA &= ~_BV(ADIE); | |
679 UCSR0B &= ~_BV(RXCIE0); | |
680 UCSR0B &= _BV(TXCIE0); | |
681 // doesn't do TWI, other uart, probably others | |
682 | |
683 _delay_ms(20); | |
684 | |
685 bootloader(); | |
686 } | |
27 | 687 |
688 | |
689 static void | |
690 adc_sleep() | |
691 { | |
692 set_sleep_mode(SLEEP_MODE_IDLE); | |
693 sleep_mode(); | |
694 } | |
695 | |
696 #define BITSET(v, n) (((v) >> (n)) & 1) | |
697 | |
698 static inline uint8_t | |
699 popcnt(uint8_t v) | |
700 { | |
701 return BITSET(v, 0) | |
702 + BITSET(v, 1) | |
703 + BITSET(v, 2) | |
704 + BITSET(v, 3) | |
705 + BITSET(v, 4) | |
706 + BITSET(v, 5) | |
707 + BITSET(v, 6) | |
708 + BITSET(v, 7); | |
709 } | |
710 | |
711 static uint8_t | |
712 adc_bit() | |
713 { | |
714 ADCSRA |= _BV(ADSC); | |
715 loop_until_bit_is_clear(ADCSRA, ADSC); | |
716 uint8_t low = ADCL; | |
717 uint8_t high = ADCH; | |
718 return (popcnt(low)&1) ^ (popcnt(high)&1); | |
719 } | |
720 | |
721 static void | |
722 adc_random(uint8_t admux, | |
723 uint8_t *out, uint16_t num, uint32_t *tries) | |
724 { | |
725 uint8_t ret = 0; | |
726 uint8_t count = 0; | |
727 | |
728 PRR &= ~_BV(PRADC); | |
729 // /16 prescaler for 691mhz, no interrupt | |
730 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
731 | |
732 *tries = 0; | |
733 for (int i = 0; i < num; i++) | |
734 { | |
735 while (count <= 7) | |
736 { | |
737 (*tries)++; | |
738 | |
739 // Von Neumann extractor | |
740 uint8_t one = adc_bit(); | |
741 uint8_t two = adc_bit(); | |
742 if (one == two) | |
743 { | |
744 continue; | |
745 } | |
746 ret |= one << count; | |
747 count++; | |
748 } | |
749 out[i] = ret; | |
750 } | |
751 ADCSRA = 0; | |
752 PRR |= _BV(PRADC); | |
753 } | |
754 | |
755 ISR(ADC_vect) | |
756 { | |
757 adc_done = 1; | |
758 } | |
759 | |
760 static void | |
761 adc_generic(uint8_t admux, uint8_t *ret_num, uint16_t *ret_sum) | |
762 { | |
763 PRR &= ~_BV(PRADC); | |
764 | |
31 | 765 // /128 prescaler (86kHz), interrupt |
766 ADCSRA = _BV(ADEN) | |
767 | _BV(ADPS2) | _BV(ADPS1) | _BV(ADPS0) | |
768 | _BV(ADIE); | |
27 | 769 |
770 // set to measure 1.1 reference | |
771 ADMUX = admux; | |
772 | |
773 // delay after setting reference etc, allow settling | |
774 long_delay(300); | |
775 // average a number of samples | |
776 uint16_t sum = 0; | |
777 uint8_t num = 0; | |
778 for (uint8_t n = 0; n < 20; n++) | |
779 { | |
780 while (1) | |
781 { | |
782 adc_done = 0; | |
783 ADCSRA |= _BV(ADSC); | |
784 adc_sleep(); | |
785 | |
786 uint8_t done; | |
787 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
788 { | |
789 done = adc_done; | |
790 } | |
791 if (done) | |
792 { | |
793 break; | |
794 } | |
795 } | |
796 | |
797 uint8_t low_11 = ADCL; | |
798 uint8_t high_11 = ADCH; | |
799 uint16_t val = low_11 + (high_11 << 8); | |
800 | |
801 if (n >= 4) | |
802 { | |
803 sum += val; | |
804 num++; | |
805 } | |
806 } | |
807 ADCSRA = 0; | |
808 PRR |= _BV(PRADC); | |
809 | |
810 *ret_num = num; | |
811 *ret_sum = sum; | |
812 } | |
813 | |
814 static uint16_t | |
815 adc_vcc() | |
816 { | |
817 const uint8_t mux = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
818 uint16_t sum; | |
819 uint8_t num; | |
820 | |
821 adc_generic(mux, &num, &sum); | |
822 | |
823 //float res_volts = 1.1 * 1024 * num / sum; | |
824 //return 1000 * res_volts; | |
825 return ((uint32_t)1100*1024*num) / sum; | |
826 } | |
827 | |
828 #define SCALER_5V 2 | |
829 | |
830 static uint16_t | |
831 adc_5v(uint16_t vcc) | |
832 { | |
833 // set to measure ADC4 against AVCC | |
834 const uint8_t mux = _BV(REFS0) | _BV(MUX2); | |
835 uint16_t sum; | |
836 uint8_t num; | |
837 | |
838 adc_generic(mux, &num, &sum); | |
839 | |
840 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024)); | |
841 } | |
842 | |
843 static uint16_t | |
844 adc_temp() | |
845 { | |
846 // set to measure temperature against 1.1v reference. | |
847 const uint8_t mux = _BV(REFS0) | _BV(REFS1) | _BV(MUX3); | |
848 uint16_t sum; | |
849 uint8_t num; | |
850 | |
851 adc_generic(mux, &num, &sum); | |
852 | |
853 // return the voltage | |
854 | |
855 return ((uint32_t)1100*sum) / (num*1024); | |
856 } | |
857 | |
858 static void | |
859 cmd_random(const char* params) | |
860 { | |
861 uint8_t admux; | |
862 uint16_t num; | |
863 uint8_t buf[100]; | |
864 | |
865 int ret = sscanf_P(params, PSTR("%hhu %u"), | |
866 &admux, &num); | |
867 if (!ret) | |
868 { | |
869 printf_P(PSTR("Bad arguments\n")); | |
870 return; | |
871 } | |
872 uint32_t tries = 0; | |
873 printf_P(PSTR("output: ")); | |
874 for (int i = 0; i < num; i+= sizeof(buf)) | |
875 { | |
876 uint32_t t; | |
877 uint16_t nr = MIN(num-i, sizeof(buf)); | |
878 adc_random(admux, buf, nr, &t); | |
879 printhex(buf, nr, stdout); | |
880 tries += t; | |
881 } | |
882 putchar('\n'); | |
883 printf_P(PSTR("%ld tries\n"), tries); | |
884 } | |
885 | |
886 | |
20 | 887 |
0 | 888 static void |
889 read_handler() | |
890 { | |
17 | 891 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
892 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
893 | |
894 LOCAL_PSTR(set_params); | |
895 LOCAL_PSTR(set_key); | |
896 LOCAL_PSTR(oneshot); | |
897 LOCAL_PSTR(hmac); | |
898 LOCAL_PSTR(decrypt); | |
899 LOCAL_PSTR(alive); | |
900 LOCAL_PSTR(vcc); | |
901 LOCAL_PSTR(reset); | |
902 LOCAL_PSTR(newboot); | |
903 LOCAL_PSTR(oldboot); | |
20 | 904 LOCAL_PSTR(status); |
27 | 905 LOCAL_PSTR(random); |
906 LOCAL_PSTR(prog); | |
17 | 907 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); |
908 LOCAL_HELP(set_key, "20_byte_hex>"); | |
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909 LOCAL_HELP(oneshot, "<timeout>"); |
27 | 910 LOCAL_HELP(prog, "<password>"); |
911 LOCAL_HELP(random, "<admux> <nbytes>"); | |
17 | 912 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
913 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
914 | |
915 static const struct handler { | |
916 PGM_P name; | |
917 void(*cmd)(const char *param); | |
918 // existence of arg_help indicates if the cmd takes a parameter. | |
919 PGM_P arg_help; | |
20 | 920 } handlers[] PROGMEM = |
17 | 921 { |
20 | 922 {alive_str, cmd_alive, NULL}, |
923 {newboot_str, cmd_newboot, NULL}, | |
924 {oldboot_str, cmd_oldboot, NULL}, | |
925 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, | |
926 {status_str, cmd_status, NULL}, | |
927 {hmac_str, cmd_hmac, hmac_help}, | |
928 {decrypt_str, cmd_decrypt, decrypt_help}, | |
17 | 929 {set_params_str, cmd_set_params, set_params_help}, |
930 {set_key_str, cmd_set_avr_key, set_key_help}, | |
27 | 931 {random_str, cmd_random, random_help}, |
17 | 932 {vcc_str, cmd_vcc, NULL}, |
933 {reset_str, cmd_reset, NULL}, | |
27 | 934 {prog_str, cmd_prog, prog_help}, |
17 | 935 }; |
936 | |
937 if (readbuf[0] == '\0') | |
938 { | |
939 return; | |
940 } | |
941 | |
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942 if (strcmp_P(readbuf, PSTR("help")) == 0) |
17 | 943 { |
944 printf_P(PSTR("Commands:---\n")); | |
945 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
946 { | |
947 struct handler h; | |
948 memcpy_P(&h, &handlers[i], sizeof(h)); | |
949 printf_P(h.name); | |
950 if (h.arg_help) | |
951 { | |
952 putchar(' '); | |
953 printf_P(h.arg_help); | |
954 } | |
955 putchar('\n'); | |
956 }; | |
957 printf_P(PSTR("---\n")); | |
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958 return; |
17 | 959 } |
960 | |
961 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
962 { | |
963 struct handler h; | |
964 memcpy_P(&h, &handlers[i], sizeof(h)); | |
965 | |
966 const int h_len = strlen_P(h.name); | |
967 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
968 { | |
969 if (h.arg_help) | |
970 { | |
971 if (readbuf[h_len] == ' ') | |
972 { | |
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973 h.cmd(&readbuf[h_len+1]); |
17 | 974 return; |
975 } | |
976 } | |
977 else | |
978 { | |
979 if (readbuf[h_len] == '\0') | |
980 { | |
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981 void(*void_cmd)() = h.cmd; |
17 | 982 void_cmd(); |
983 return; | |
984 } | |
985 } | |
986 } | |
987 } | |
988 | |
989 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
0 | 990 } |
991 | |
992 ISR(INT0_vect) | |
993 { | |
994 blink(); | |
995 _delay_ms(100); | |
996 blink(); | |
997 } | |
998 | |
999 ISR(USART_RX_vect) | |
1000 { | |
1001 char c = UDR0; | |
1002 #ifdef HAVE_UART_ECHO | |
1003 uart_putchar(c, NULL); | |
1004 #endif | |
1005 if (c == '\r' || c == '\n') | |
1006 { | |
1007 if (readpos > 0) | |
1008 { | |
1009 readbuf[readpos] = '\0'; | |
1010 have_cmd = 1; | |
1011 readpos = 0; | |
1012 } | |
1013 } | |
1014 else | |
1015 { | |
1016 readbuf[readpos] = c; | |
1017 readpos++; | |
1018 if (readpos >= sizeof(readbuf)) | |
1019 { | |
1020 readpos = 0; | |
1021 } | |
1022 } | |
1023 } | |
1024 | |
2 | 1025 ISR(TIMER1_COMPA_vect) |
0 | 1026 { |
2 | 1027 TCNT1 = 0; |
0 | 1028 |
1029 clock_epoch += TICK; | |
1030 | |
1 | 1031 // watchdogs count up, continuous |
1032 if (watchdog_long_limit > 0) { | |
2 | 1033 watchdog_long_count += TICK; |
1 | 1034 if (watchdog_long_count >= watchdog_long_limit) |
1035 { | |
1036 watchdog_long_count = 0; | |
1037 watchdog_long_hit = 1; | |
1038 } | |
0 | 1039 } |
1040 | |
1 | 1041 if (watchdog_short_limit > 0) { |
2 | 1042 watchdog_short_count += TICK; |
1 | 1043 if (watchdog_short_count >= watchdog_short_limit) |
1044 { | |
1045 watchdog_short_count = 0; | |
1046 watchdog_short_hit = 1; | |
1047 } | |
0 | 1048 } |
1049 | |
2 | 1050 // newboot counts down |
1 | 1051 if (newboot_count > 0) |
0 | 1052 { |
2 | 1053 newboot_count-=TICK; |
1054 if (newboot_count <= 0) | |
1 | 1055 { |
1056 newboot_hit = 1; | |
2 | 1057 newboot_count = 0; |
1 | 1058 } |
0 | 1059 } |
1 | 1060 |
2 | 1061 if (oneshot_count > 0) |
1062 { | |
1063 oneshot_count-=TICK; | |
1064 if (oneshot_count <= 0) | |
1065 { | |
1066 oneshot_hit = 1; | |
1067 oneshot_count = 0; | |
1068 } | |
1069 } | |
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1070 |
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1071 if (reboot_count > 0) |
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1072 { |
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1073 reboot_count -= TICK; |
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1074 if (reboot_count <= 0) |
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1075 { |
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1076 reboot_hit = 1; |
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1077 reboot_count = 0; |
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1078 } |
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1079 } |
0 | 1080 } |
1081 | |
1082 static void | |
1083 idle_sleep() | |
1084 { | |
1085 set_sleep_mode(SLEEP_MODE_IDLE); | |
1086 sleep_mode(); | |
1087 } | |
1088 | |
21 | 1089 static void |
2 | 1090 reboot_pi() |
1091 { | |
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1092 printf_P(PSTR("Real reboot now\n")); |
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1093 // pull it low for 200ms |
2 | 1094 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
1095 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
18
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1096 _delay_ms(200); |
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1097 |
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1098 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
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1099 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
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1100 } |
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1101 |
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1102 static void |
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1103 wait_reboot_pi() |
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1104 { |
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1105 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
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1106 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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1107 { |
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1108 reboot_count = WARNING_TIME; |
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1109 } |
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1110 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
2 | 1111 } |
1112 | |
1113 static void | |
1114 set_pi_boot_normal(uint8_t normal) | |
1115 { | |
22 | 1116 boot_normal_status = normal; |
2 | 1117 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
1118 if (normal) | |
1119 { | |
1120 // tristate | |
1121 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
1122 } | |
1123 else | |
1124 { | |
1125 // pull it low | |
1126 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
1127 | |
1128 } | |
1129 } | |
1130 | |
1131 static void | |
1132 check_flags() | |
1133 { | |
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1134 if (watchdog_long_hit) |
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1135 { |
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1136 // alternate between booting normal and emergency |
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1137 if (long_reboot_mode) |
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1138 { |
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1139 cmd_newboot(); |
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1140 } |
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1141 long_reboot_mode ^= 1; |
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1142 } |
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1143 |
2 | 1144 if (watchdog_long_hit |
1145 || watchdog_short_hit | |
1146 || oneshot_hit) | |
1147 { | |
12 | 1148 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
1149 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
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1150 wait_reboot_pi(); |
2 | 1151 } |
1152 | |
1153 if (newboot_hit) { | |
1154 set_pi_boot_normal(0); | |
1155 } | |
1156 | |
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1157 if (reboot_hit) { |
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1158 reboot_pi(); |
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1159 } |
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1160 |
2 | 1161 watchdog_long_hit = 0; |
1162 watchdog_short_hit = 0; | |
1163 newboot_hit = 0; | |
1164 oneshot_hit = 0; | |
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1165 reboot_hit = 0; |
2 | 1166 } |
1167 | |
1168 static void | |
0 | 1169 do_comms() |
1170 { | |
1171 // avoid receiving rubbish, perhaps | |
1172 uart_on(); | |
1173 | |
1174 // write sd card here? same 3.3v regulator... | |
1175 | |
1 | 1176 while (1) |
0 | 1177 { |
1 | 1178 wdt_reset(); |
2 | 1179 |
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1180 #ifdef SIM_DEBUG |
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1181 if (sim_idx != last_sim_idx) |
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1182 { |
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1183 last_sim_idx = sim_idx; |
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1184 } |
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1185 #endif |
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1186 |
2 | 1187 check_flags(); |
1188 | |
0 | 1189 if (have_cmd) |
1190 { | |
1191 have_cmd = 0; | |
1192 read_handler(); | |
1193 continue; | |
1194 } | |
1195 | |
1196 // wait for commands from the master | |
1197 idle_sleep(); | |
1198 } | |
1199 } | |
1200 | |
1201 static void | |
1202 blink() | |
1203 { | |
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1204 #if 0 |
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1205 PORT_ &= ~_BV(PIN_LED); |
0 | 1206 _delay_ms(1); |
1207 PORT_LED |= _BV(PIN_LED); | |
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1208 #endif |
0 | 1209 } |
1210 | |
1211 static void | |
22 | 1212 long_delay(uint16_t ms) |
0 | 1213 { |
22 | 1214 uint16_t iter = ms / 10; |
0 | 1215 |
22 | 1216 for (uint16_t i = 0; i < iter; i++) |
0 | 1217 { |
22 | 1218 _delay_ms(10); |
0 | 1219 } |
1220 } | |
1221 | |
1222 ISR(BADISR_vect) | |
1223 { | |
1224 //uart_on(); | |
1225 printf_P(PSTR("Bad interrupt\n")); | |
1226 } | |
1227 | |
20 | 1228 // disable watchdog on boot |
1229 void wdt_init(void) __attribute__((naked)) __attribute__((section(".init3"))); | |
1230 void wdt_init(void) | |
1231 { | |
1232 MCUSR = 0; | |
1233 wdt_disable(); | |
1234 } | |
1235 | |
0 | 1236 int main(void) |
1237 { | |
17 | 1238 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
1239 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
20 | 1240 _Static_assert((F_CPU)%(16*(BAUD)) == 0, "baud rate good multiple"); |
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1241 |
0 | 1242 setup_chip(); |
1243 blink(); | |
1244 | |
1245 stdout = &mystdout; | |
1246 uart_on(); | |
1247 | |
20 | 1248 long_delay(500); |
1249 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]\n")); | |
0 | 1250 |
2 | 1251 set_pi_boot_normal(0); |
1252 | |
0 | 1253 load_params(); |
1254 | |
1255 setup_tick_counter(); | |
1256 | |
1257 sei(); | |
1258 | |
8 | 1259 #if 0 |
1260 // encryption test | |
1261 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
1262 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
12 | 1263 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
1264 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
1265 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
8 | 1266 #endif |
1267 | |
1 | 1268 // doesn't return |
1269 do_comms(); | |
0 | 1270 |
1271 return 0; /* never reached */ | |
1272 } |