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annotate main.c @ 19:5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
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| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Tue, 25 Jun 2013 13:55:11 +0800 |
| parents | 021e6e0006f4 |
| children | 534009795508 |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 3 #include <stddef.h> | |
| 4 #include <stdbool.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <avr/io.h> | |
| 7 #include <avr/interrupt.h> | |
| 8 #include <avr/sleep.h> | |
| 9 #include <util/delay.h> | |
| 10 #include <avr/pgmspace.h> | |
| 11 #include <avr/eeprom.h> | |
| 12 #include <avr/wdt.h> | |
| 13 #include <util/atomic.h> | |
| 14 #include <util/crc16.h> | |
| 15 | |
| 2 | 16 #include "hmac-sha1.h" |
| 5 | 17 #include "aes.h" |
| 2 | 18 |
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19 #include "fat.h" |
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20 #include "fat_config.h" |
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21 #include "partition.h" |
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22 #include "sd_raw.h" |
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23 #include "sd_raw_config.h" |
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24 |
| 1 | 25 //#include "simple_ds18b20.h" |
| 26 //#include "onewire.h" | |
| 0 | 27 |
| 5 | 28 LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); |
| 29 | |
| 0 | 30 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
| 31 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
| 32 | |
| 33 // TICK should be 8 or less (8 untested). all timers need | |
| 34 // to be a multiple. | |
| 35 | |
| 1 | 36 #define TICK 1 |
| 17 | 37 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
| 5 | 38 #define NKEYS 10 |
| 39 #define HMACLEN 20 | |
| 40 #define AESLEN 16 | |
| 41 #define KEYLEN HMACLEN | |
| 1 | 42 |
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43 #define BAUD 19200 |
| 0 | 44 #define UBRR ((F_CPU)/8/(BAUD)-1) |
| 45 | |
| 2 | 46 #define PORT_PI_BOOT PORTD |
| 47 #define DDR_PI_BOOT DDRD | |
| 4 | 48 #define PIN_PI_BOOT PD5 |
| 2 | 49 |
| 50 #define PORT_PI_RESET PORTD | |
| 51 #define DDR_PI_RESET DDRD | |
| 52 #define PIN_PI_RESET PD6 | |
| 53 | |
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54 #define PORT_PI_WARNING PORTD |
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55 #define DDR_PI_WARNING DDRD |
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56 #define PIN_PI_WARNING PD7 |
| 0 | 57 |
| 58 // #define HAVE_UART_ECHO | |
| 59 | |
| 7 | 60 // stores a value of clock_epoch combined with the remainder of TCNT1, |
| 0 | 61 // for 1/32 second accuracy |
| 62 struct epoch_ticks | |
| 63 { | |
| 64 uint32_t ticks; | |
| 65 // remainder | |
| 66 uint8_t rem; | |
| 67 }; | |
| 68 | |
| 16 | 69 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
| 70 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
| 71 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
| 72 | |
| 73 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
| 74 | |
| 75 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
| 76 #define NEWBOOT_MIN (60*2) // 2 minutes | |
| 77 #define NEWBOOT_MAX (60*30) // 30 mins | |
| 78 | |
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79 #define WARNING_TIME 10 |
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80 |
| 1 | 81 // eeprom-settable parameters, default values defined here. |
| 82 // all timeouts should be a multiple of TICK | |
| 16 | 83 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
| 1 | 84 static uint32_t watchdog_short_limit = 0; |
| 16 | 85 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
| 0 | 86 |
| 1 | 87 // avr proves itself |
| 2 | 88 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
| 0 | 89 |
| 90 // ---- Atomic guards required accessing these variables | |
| 91 // clock_epoch in seconds | |
| 92 static uint32_t clock_epoch; | |
| 1 | 93 // watchdog counts up |
| 94 static uint32_t watchdog_long_count; | |
| 95 static uint32_t watchdog_short_count; | |
| 2 | 96 // newboot counts down |
| 1 | 97 static uint32_t newboot_count; |
| 2 | 98 // oneshot counts down |
| 99 static uint32_t oneshot_count; | |
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100 // countdown after the warning. |
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101 static uint8_t reboot_count; |
| 2 | 102 |
| 0 | 103 // ---- End atomic guards required |
| 104 | |
| 105 // boolean flags | |
| 1 | 106 static uint8_t watchdog_long_hit; |
| 107 static uint8_t watchdog_short_hit; | |
| 108 static uint8_t newboot_hit; | |
| 2 | 109 static uint8_t oneshot_hit; |
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110 static uint8_t reboot_hit; |
| 0 | 111 |
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112 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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113 // working firmware should boot. set back to 0 for each 'alive' |
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114 // command |
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115 static uint8_t long_reboot_mode = 0; |
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116 |
| 0 | 117 static uint8_t readpos; |
| 1 | 118 static char readbuf[50]; |
| 0 | 119 static uint8_t have_cmd; |
| 120 | |
| 121 int uart_putchar(char c, FILE *stream); | |
| 122 static void long_delay(int ms); | |
| 123 static void blink(); | |
| 124 static uint16_t adc_vcc(); | |
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125 static uint16_t adc_5v(uint16_t vcc); |
| 2 | 126 static void set_pi_boot_normal(uint8_t normal); |
| 0 | 127 |
| 17 | 128 |
| 0 | 129 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
| 130 _FDEV_SETUP_WRITE); | |
| 131 | |
| 132 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
| 133 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 134 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 135 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 136 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 137 | |
| 1 | 138 #define EXPECT_MAGIC 0xdf83 |
| 0 | 139 |
| 140 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 1 | 141 uint32_t watchdog_long_limit; |
| 142 uint32_t watchdog_short_limit; | |
| 143 uint32_t newboot_limit; | |
| 0 | 144 |
| 2 | 145 uint8_t avr_keys[NKEYS][KEYLEN]; |
| 0 | 146 |
| 147 uint16_t magic; | |
| 148 }; | |
| 149 | |
| 150 // Very first setup | |
| 151 static void | |
| 152 setup_chip() | |
| 153 { | |
| 154 cli(); | |
| 155 | |
| 156 // stop watchdog timer (might have been used to cause a reset) | |
| 157 wdt_reset(); | |
| 158 MCUSR &= ~_BV(WDRF); | |
| 159 WDTCSR |= _BV(WDCE) | _BV(WDE); | |
| 160 WDTCSR = 0; | |
| 161 | |
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162 // set to 8 seconds, in case sha1 is slow etc. |
| 1 | 163 wdt_enable(WDTO_8S); |
| 164 | |
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165 // Set scaler to /1, -> clock to 8mhz |
| 0 | 166 CLKPR = _BV(CLKPCE); |
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167 CLKPR = 0; |
| 0 | 168 |
| 169 // enable pullups | |
| 1 | 170 // XXX matt pihelp |
| 5 | 171 //PORTB = 0xff; // XXX change when using SPI |
| 172 //PORTD = 0xff; | |
| 173 //PORTC = 0xff; | |
| 0 | 174 |
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175 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
| 0 | 176 |
| 5 | 177 #if 0 |
| 0 | 178 // set pullup |
| 179 PORTD |= _BV(PD2); | |
| 180 // INT0 setup | |
| 181 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
| 182 EIMSK = _BV(INT0); | |
| 5 | 183 #endif |
| 0 | 184 |
| 185 // comparator disable | |
| 186 ACSR = _BV(ACD); | |
| 187 | |
| 188 // disable adc pin input buffers | |
| 189 DIDR0 = 0x3F; // acd0-adc5 | |
| 190 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
| 191 | |
| 192 sei(); | |
| 193 } | |
| 194 | |
| 195 static void | |
| 196 get_epoch_ticks(struct epoch_ticks *t) | |
| 197 { | |
| 198 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 199 { | |
| 200 t->ticks = clock_epoch; | |
| 7 | 201 t->rem = TCNT1; |
| 0 | 202 } |
| 203 } | |
| 204 | |
| 205 static void | |
| 206 setup_tick_counter() | |
| 207 { | |
| 2 | 208 // set up counter1 |
| 209 | |
| 0 | 210 // set up counter2. |
| 211 // COM21 COM20 Set OC2 on Compare Match (p116) | |
| 212 // WGM21 Clear counter on compare | |
| 213 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
| 214 // toggle on match | |
| 2 | 215 TCCR1A = _BV(COM1A0); |
| 8 | 216 #ifdef SIM_DEBUG |
| 217 // systemclock/8 | |
| 218 TCCR1B = _BV(CS11); | |
| 219 #else | |
| 7 | 220 // systemclock/64 |
| 221 TCCR1B = _BV(CS11) | _BV(CS10); | |
| 8 | 222 #endif |
| 2 | 223 TCNT1 = 0; |
| 224 OCR1A = SLEEP_COMPARE; | |
| 0 | 225 // interrupt |
| 2 | 226 TIMSK1 = _BV(OCIE1A); |
| 0 | 227 } |
| 228 | |
| 229 static void | |
| 230 uart_on() | |
| 231 { | |
| 232 // Power reduction register | |
| 233 PRR &= ~_BV(PRUSART0); | |
| 234 | |
| 235 // All of this needs to be done each time after turning off the PRR | |
| 236 // baud rate | |
| 237 UBRR0H = (unsigned char)(UBRR >> 8); | |
| 238 UBRR0L = (unsigned char)UBRR; | |
| 239 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
| 240 //8N1 | |
| 241 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
| 242 } | |
| 243 | |
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244 #ifdef SIM_DEBUG |
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245 static char sim_out[140]; |
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246 static uint8_t sim_idx = 0; |
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247 static uint8_t last_sim_idx = 0; |
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248 #endif |
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249 |
| 0 | 250 int |
| 251 uart_putchar(char c, FILE *stream) | |
| 252 { | |
| 253 // XXX could perhaps sleep in the loop for power. | |
| 254 if (c == '\n') | |
| 255 { | |
| 256 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 257 UDR0 = '\r'; | |
| 258 } | |
| 259 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 260 UDR0 = c; | |
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261 #ifdef SIM_DEBUG |
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262 sim_out[sim_idx] = c; |
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263 sim_idx++; |
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264 sim_idx %= sizeof(sim_out); |
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265 #endif |
| 0 | 266 if (c == '\r') |
| 267 { | |
| 268 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 269 UDR0 = '\n'; | |
| 270 } | |
| 271 return (unsigned char)c; | |
| 272 } | |
| 273 | |
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274 uint8_t find_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name, struct fat_dir_entry_struct* dir_entry) |
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275 { |
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276 while(fat_read_dir(dd, dir_entry)) |
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277 { |
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278 if(strcmp(dir_entry->long_name, name) == 0) |
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279 { |
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280 fat_reset_dir(dd); |
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281 return 1; |
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282 } |
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283 } |
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284 |
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285 return 0; |
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286 } |
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287 |
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288 struct fat_file_struct* |
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289 open_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name) |
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290 { |
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291 struct fat_dir_entry_struct file_entry; |
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292 if(!find_file_in_dir(fs, dd, name, &file_entry)) |
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293 return 0; |
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294 |
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295 return fat_open_file(fs, &file_entry); |
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296 } |
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297 |
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298 static void |
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299 hmac_file(const char* fn) |
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300 { |
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301 sd_raw_init(); |
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302 struct partition_struct* partition = partition_open(sd_raw_read, sd_raw_read_interval, 0, 0, 0); |
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303 struct fat_fs_struct* fs = fat_open(partition); |
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304 struct fat_dir_entry_struct directory; |
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305 fat_get_dir_entry_of_path(fs, "/", &directory); |
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306 |
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307 struct sd_raw_info disk_info; |
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308 sd_raw_get_info(&disk_info); |
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309 printf("diskinfo size %d", disk_info.capacity); |
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310 |
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311 struct fat_dir_struct* dd = fat_open_dir(fs, &directory); |
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312 struct fat_file_struct* fd = open_file_in_dir(fs, dd, "fn"); |
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313 |
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314 char c = 0; |
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315 char buf[512]; |
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316 for (int i = 0; i < 10; i++) |
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317 { |
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318 fat_read_file(fd, buf, sizeof(buf)); |
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319 c ^= buf[0]; |
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320 } |
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321 printf("total %d\n", c); |
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322 } |
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323 |
| 0 | 324 static void |
| 325 cmd_reset() | |
| 326 { | |
| 327 printf_P(PSTR("reset\n")); | |
| 328 _delay_ms(100); | |
| 329 cli(); // disable interrupts | |
| 330 wdt_enable(WDTO_15MS); // enable watchdog | |
| 331 while(1); // wait for watchdog to reset processor | |
| 332 } | |
| 333 | |
| 2 | 334 static void |
| 335 cmd_newboot() | |
| 336 { | |
| 337 set_pi_boot_normal(1); | |
| 338 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 339 { | |
| 340 newboot_count = newboot_limit; | |
| 341 } | |
| 342 printf_P(PSTR("newboot for %d secs"), newboot_limit); | |
| 343 } | |
| 344 | |
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345 static void |
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346 cmd_oldboot() |
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347 { |
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348 set_pi_boot_normal(0); |
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349 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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350 { |
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351 newboot_count = 0; |
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352 } |
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353 printf_P(PSTR("back to old boot\n")); |
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354 } |
| 1 | 355 |
| 0 | 356 |
| 357 static void | |
| 1 | 358 cmd_get_params() |
| 0 | 359 { |
| 2 | 360 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
| 1 | 361 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
| 362 { | |
| 2 | 363 cur_watchdog_long = watchdog_long_count; |
| 364 cur_watchdog_short = watchdog_short_count; | |
| 365 cur_newboot = newboot_count; | |
| 366 cur_oneshot = oneshot_count; | |
| 1 | 367 } |
| 368 | |
| 2 | 369 printf_P(PSTR("limit (count) : watchdog_long %lu (%lu) watchdog_short %lu (%lu) newboot %lu (%lu) oneshot (%lu)\n"), |
| 1 | 370 watchdog_long_limit, |
| 2 | 371 cur_watchdog_long, |
| 1 | 372 watchdog_short_limit, |
| 2 | 373 cur_watchdog_short, |
| 1 | 374 newboot_limit, |
| 2 | 375 cur_newboot, |
| 376 cur_oneshot); | |
| 0 | 377 } |
| 378 | |
| 379 static void | |
| 1 | 380 cmd_set_params(const char *params) |
| 0 | 381 { |
| 1 | 382 uint32_t new_watchdog_long_limit; |
| 383 uint32_t new_watchdog_short_limit; | |
| 384 uint32_t new_newboot_limit; | |
| 385 | |
| 386 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
| 387 &new_watchdog_long_limit, | |
| 388 &new_watchdog_short_limit, | |
| 389 &new_newboot_limit); | |
| 390 | |
| 391 if (ret != 3) | |
| 0 | 392 { |
| 1 | 393 printf_P(PSTR("Bad values\n")); |
| 394 } | |
| 395 else | |
| 396 { | |
| 397 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 398 { | |
| 399 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
| 400 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
| 401 eeprom_write(new_newboot_limit, newboot_limit); | |
| 402 uint16_t magic = EXPECT_MAGIC; | |
| 403 eeprom_write(magic, magic); | |
| 0 | 404 } |
| 1 | 405 printf_P(PSTR("set_params for next boot\n")); |
| 406 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
| 407 new_watchdog_long_limit, | |
| 408 new_watchdog_short_limit, | |
| 409 new_newboot_limit); | |
| 410 } | |
| 411 } | |
| 0 | 412 |
| 1 | 413 uint8_t from_hex(char c) |
| 414 { | |
| 415 if (c >= '0' && c <= '9') { | |
| 416 return c-'0'; | |
| 417 } | |
| 418 if (c >= 'a' && c <= 'f') { | |
| 419 return c-'a' + 0xa; | |
| 420 } | |
| 421 if (c >= 'A' && c <= 'F') { | |
| 422 return c-'A' + 0xa; | |
| 423 } | |
| 424 return 0; | |
| 425 } | |
| 426 | |
| 2 | 427 static void |
| 428 printhex_nibble(const unsigned char b, FILE *stream) | |
| 429 { | |
| 430 unsigned char c = b & 0x0f; | |
| 431 if ( c > 9 ) { | |
| 432 c += 'A'-10; | |
| 433 } | |
| 434 else { | |
| 435 c += '0'; | |
| 436 } | |
| 437 fputc(c, stream); | |
| 438 } | |
| 439 | |
| 440 void | |
| 441 printhex_byte(const unsigned char b, FILE *stream) | |
| 442 { | |
| 443 printhex_nibble( b >> 4, stream); | |
| 444 printhex_nibble( b, stream); | |
| 445 } | |
| 446 | |
| 447 void | |
| 448 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
| 449 { | |
| 450 for (uint8_t i = 0; i < n; i++) | |
| 451 { | |
| 452 printhex_byte(id[i], stream); | |
| 453 } | |
| 454 } | |
| 455 | |
| 456 static int8_t | |
| 5 | 457 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
| 458 uint8_t bytes_len) | |
| 2 | 459 { |
| 460 // "N HEXKEY" | |
| 5 | 461 if (strlen(params) != bytes_len*2 + 2) { |
| 2 | 462 printf_P(PSTR("Wrong length key\n")); |
| 463 return -1; | |
| 464 } | |
| 465 | |
| 466 if (params[1] != ' ') | |
| 467 { | |
| 468 printf_P(PSTR("Missing space\n")); | |
| 469 return -1; | |
| 470 } | |
| 471 | |
| 472 *key_index = from_hex(params[0]); | |
| 473 if (*key_index >= NKEYS) | |
| 474 { | |
| 475 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
| 476 return -1; | |
| 477 } | |
| 478 | |
| 5 | 479 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
| 2 | 480 { |
| 481 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
| 482 } | |
| 483 return 0; | |
| 484 } | |
| 485 | |
| 1 | 486 static void |
| 487 cmd_set_avr_key(const char *params) | |
| 488 { | |
| 2 | 489 uint8_t new_key[KEYLEN]; |
| 490 uint8_t key_index; | |
| 5 | 491 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
| 2 | 492 { |
| 1 | 493 return; |
| 0 | 494 } |
| 2 | 495 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
| 8 | 496 #ifndef SIM_DEBUG |
| 2 | 497 eeprom_write(avr_keys, avr_keys); |
| 8 | 498 #endif |
| 2 | 499 } |
| 500 | |
| 501 static void | |
| 502 cmd_hmac(const char *params) | |
| 503 { | |
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504 uint8_t indata[2+HMACLEN] = {'H', ':'}; |
| 7 | 505 uint8_t outdata[HMACLEN]; |
| 2 | 506 uint8_t key_index; |
|
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507 if (parse_key(params, &key_index, &indata[2], HMACLEN) != 0) |
| 2 | 508 { |
| 509 printf_P(PSTR("FAIL: Bad input\n")); | |
| 5 | 510 return; |
| 2 | 511 } |
| 0 | 512 |
| 8 | 513 #ifndef SIM_DEBUG |
| 5 | 514 long_delay(200); |
| 8 | 515 #endif |
| 5 | 516 |
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517 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
| 2 | 518 printf_P(PSTR("HMAC: ")); |
| 7 | 519 printhex(outdata, HMACLEN, stdout); |
| 5 | 520 fputc('\n', stdout); |
| 521 } | |
| 522 | |
| 523 static void | |
| 524 cmd_decrypt(const char *params) | |
| 525 { | |
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526 uint8_t indata[HMACLEN+AESLEN]; // XXX |
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527 // a temporary buffer |
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528 uint8_t output[HMACLEN] = {'D', ':'}; |
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529 _Static_assert(AESLEN+2 <= sizeof(output), "sufficient output buffer"); |
| 5 | 530 uint8_t key_index; |
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531 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
| 5 | 532 { |
| 533 printf_P(PSTR("FAIL: Bad input\n")); | |
| 534 return; | |
| 535 } | |
| 536 | |
| 8 | 537 #ifndef SIM_DEBUG |
| 5 | 538 long_delay(200); |
| 8 | 539 #endif |
| 7 | 540 |
| 5 | 541 // check the signature |
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542 memcpy(&output[2], &indata[HMACLEN], AESLEN); |
| 12 | 543 hmac_sha1(output, avr_keys[key_index], KEYLEN*8, output, (2+AESLEN)*8); |
| 5 | 544 |
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545 if (memcmp(output, indata, HMACLEN) != 0) { |
| 5 | 546 printf_P(PSTR("FAIL: hmac mismatch\n")); |
| 547 } | |
| 548 | |
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549 uint8_t tmpbuf[256]; |
|
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550 //aesInit(avr_keys[key_index], tmpbuf); |
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551 //aesDecrypt(&indata[HMACLEN], NULL); |
| 5 | 552 |
| 553 printf_P(PSTR("DECRYPTED: ")); | |
| 554 printhex(output, AESLEN, stdout); | |
| 2 | 555 fputc('\n', stdout); |
| 556 } | |
| 557 | |
| 558 static void | |
| 559 cmd_oneshot_reboot(const char *params) | |
| 560 { | |
| 561 uint32_t new_delay = strtoul(params, NULL, 10); | |
| 562 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 1 | 563 { |
| 2 | 564 oneshot_count = new_delay; |
| 1 | 565 } |
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566 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
| 0 | 567 } |
| 568 | |
| 569 static void | |
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570 clamp_params() |
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571 { |
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572 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
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573 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
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574 { |
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575 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
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576 } |
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577 |
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578 if (watchdog_short_limit != 0 |
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579 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
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580 { |
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581 watchdog_short_limit = 0; |
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582 } |
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583 |
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584 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
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585 { |
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586 newboot_limit = NEWBOOT_DEFAULT; |
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587 } |
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588 } |
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589 |
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590 static void |
| 0 | 591 load_params() |
| 592 { | |
| 593 uint16_t magic; | |
| 594 eeprom_read(magic, magic); | |
| 595 if (magic == EXPECT_MAGIC) | |
| 596 { | |
| 1 | 597 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
| 598 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
| 2 | 599 eeprom_read(newboot_limit, newboot_limit); |
| 1 | 600 } |
| 2 | 601 |
|
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602 clamp_params(); |
| 16 | 603 |
| 2 | 604 eeprom_read(avr_keys, avr_keys); |
| 0 | 605 } |
| 606 | |
| 2 | 607 static void |
|
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608 cmd_alive() |
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609 { |
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610 printf_P(PSTR("Ah, good.\n")); |
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611 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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612 { |
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613 watchdog_long_count = 0; |
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614 watchdog_short_count = 0; |
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615 } |
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616 long_reboot_mode = 0; |
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617 } |
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618 |
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619 static void |
| 2 | 620 cmd_vcc() |
| 0 | 621 { |
| 2 | 622 uint16_t vcc = adc_vcc(); |
|
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623 uint16_t v5 = adc_5v(vcc); |
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624 printf_P(PSTR("vcc: %u mV\n5v: %u mV\n"), vcc, v5); |
| 0 | 625 } |
| 626 | |
| 627 static void | |
| 628 read_handler() | |
| 629 { | |
| 17 | 630 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
| 631 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
| 632 | |
| 633 LOCAL_PSTR(get_params); | |
| 634 LOCAL_PSTR(set_params); | |
| 635 LOCAL_PSTR(set_key); | |
| 636 LOCAL_PSTR(oneshot); | |
| 637 LOCAL_PSTR(hmac); | |
| 638 LOCAL_PSTR(decrypt); | |
| 639 LOCAL_PSTR(alive); | |
| 640 LOCAL_PSTR(vcc); | |
| 641 LOCAL_PSTR(reset); | |
| 642 LOCAL_PSTR(newboot); | |
| 643 LOCAL_PSTR(oldboot); | |
| 644 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); | |
| 645 LOCAL_HELP(set_key, "20_byte_hex>"); | |
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646 LOCAL_HELP(oneshot, "<timeout>"); |
| 17 | 647 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
| 648 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
| 649 | |
| 650 static const struct handler { | |
| 651 PGM_P name; | |
| 652 void(*cmd)(const char *param); | |
| 653 // existence of arg_help indicates if the cmd takes a parameter. | |
| 654 PGM_P arg_help; | |
| 655 } handlers[11] PROGMEM = | |
| 656 { | |
| 657 {get_params_str, cmd_get_params, NULL}, | |
| 658 {set_params_str, cmd_set_params, set_params_help}, | |
| 659 {set_key_str, cmd_set_avr_key, set_key_help}, | |
|
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660 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, |
| 17 | 661 {hmac_str, cmd_hmac, hmac_help}, |
| 662 {decrypt_str, cmd_decrypt, decrypt_help}, | |
| 663 {alive_str, cmd_alive, NULL}, | |
| 664 {vcc_str, cmd_vcc, NULL}, | |
| 665 {reset_str, cmd_reset, NULL}, | |
| 666 {newboot_str, cmd_newboot, NULL}, | |
| 667 {oldboot_str, cmd_oldboot, NULL}, | |
| 668 }; | |
| 669 | |
| 670 if (readbuf[0] == '\0') | |
| 671 { | |
| 672 return; | |
| 673 } | |
| 674 | |
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675 if (strcmp_P(readbuf, PSTR("help")) == 0) |
| 17 | 676 { |
| 677 printf_P(PSTR("Commands:---\n")); | |
| 678 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 679 { | |
| 680 struct handler h; | |
| 681 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 682 printf_P(h.name); | |
| 683 if (h.arg_help) | |
| 684 { | |
| 685 putchar(' '); | |
| 686 printf_P(h.arg_help); | |
| 687 } | |
| 688 putchar('\n'); | |
| 689 }; | |
| 690 printf_P(PSTR("---\n")); | |
|
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691 return; |
| 17 | 692 } |
| 693 | |
| 694 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 695 { | |
| 696 struct handler h; | |
| 697 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 698 | |
| 699 const int h_len = strlen_P(h.name); | |
| 700 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
| 701 { | |
| 702 if (h.arg_help) | |
| 703 { | |
| 704 if (readbuf[h_len] == ' ') | |
| 705 { | |
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706 h.cmd(&readbuf[h_len+1]); |
| 17 | 707 return; |
| 708 } | |
| 709 } | |
| 710 else | |
| 711 { | |
| 712 if (readbuf[h_len] == '\0') | |
| 713 { | |
|
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714 void(*void_cmd)() = h.cmd; |
| 17 | 715 void_cmd(); |
| 716 return; | |
| 717 } | |
| 718 } | |
| 719 } | |
| 720 } | |
| 721 | |
| 722 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
| 0 | 723 } |
| 724 | |
| 725 ISR(INT0_vect) | |
| 726 { | |
| 727 blink(); | |
| 728 _delay_ms(100); | |
| 729 blink(); | |
| 730 } | |
| 731 | |
| 732 ISR(USART_RX_vect) | |
| 733 { | |
| 734 char c = UDR0; | |
| 735 #ifdef HAVE_UART_ECHO | |
| 736 uart_putchar(c, NULL); | |
| 737 #endif | |
| 738 if (c == '\r' || c == '\n') | |
| 739 { | |
| 740 if (readpos > 0) | |
| 741 { | |
| 742 readbuf[readpos] = '\0'; | |
| 743 have_cmd = 1; | |
| 744 readpos = 0; | |
| 745 } | |
| 746 } | |
| 747 else | |
| 748 { | |
| 749 readbuf[readpos] = c; | |
| 750 readpos++; | |
| 751 if (readpos >= sizeof(readbuf)) | |
| 752 { | |
| 753 readpos = 0; | |
| 754 } | |
| 755 } | |
| 756 } | |
| 757 | |
| 2 | 758 ISR(TIMER1_COMPA_vect) |
| 0 | 759 { |
| 2 | 760 TCNT1 = 0; |
| 0 | 761 |
| 762 clock_epoch += TICK; | |
| 763 | |
| 1 | 764 // watchdogs count up, continuous |
| 765 if (watchdog_long_limit > 0) { | |
| 2 | 766 watchdog_long_count += TICK; |
| 1 | 767 if (watchdog_long_count >= watchdog_long_limit) |
| 768 { | |
| 769 watchdog_long_count = 0; | |
| 770 watchdog_long_hit = 1; | |
| 771 } | |
| 0 | 772 } |
| 773 | |
| 1 | 774 if (watchdog_short_limit > 0) { |
| 2 | 775 watchdog_short_count += TICK; |
| 1 | 776 if (watchdog_short_count >= watchdog_short_limit) |
| 777 { | |
| 778 watchdog_short_count = 0; | |
| 779 watchdog_short_hit = 1; | |
| 780 } | |
| 0 | 781 } |
| 782 | |
| 2 | 783 // newboot counts down |
| 1 | 784 if (newboot_count > 0) |
| 0 | 785 { |
| 2 | 786 newboot_count-=TICK; |
| 787 if (newboot_count <= 0) | |
| 1 | 788 { |
| 789 newboot_hit = 1; | |
| 2 | 790 newboot_count = 0; |
| 1 | 791 } |
| 0 | 792 } |
| 1 | 793 |
| 2 | 794 if (oneshot_count > 0) |
| 795 { | |
| 796 oneshot_count-=TICK; | |
| 797 if (oneshot_count <= 0) | |
| 798 { | |
| 799 oneshot_hit = 1; | |
| 800 oneshot_count = 0; | |
| 801 } | |
| 802 } | |
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803 |
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804 if (reboot_count > 0) |
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805 { |
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806 reboot_count -= TICK; |
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807 if (reboot_count <= 0) |
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808 { |
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809 reboot_hit = 1; |
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810 reboot_count = 0; |
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811 } |
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812 } |
| 0 | 813 } |
| 814 | |
| 815 static void | |
| 816 idle_sleep() | |
| 817 { | |
| 818 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 819 sleep_mode(); | |
| 820 } | |
| 821 | |
| 822 static uint16_t | |
| 823 adc_vcc() | |
| 824 { | |
| 825 PRR &= ~_BV(PRADC); | |
| 826 | |
| 827 // /16 prescaler | |
| 828 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 829 | |
| 830 // set to measure 1.1 reference | |
| 831 ADMUX = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 832 // average a number of samples | |
| 833 uint16_t sum = 0; | |
| 834 uint8_t num = 0; | |
| 835 for (uint8_t n = 0; n < 20; n++) | |
| 836 { | |
| 837 ADCSRA |= _BV(ADSC); | |
| 838 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 839 | |
| 840 uint8_t low_11 = ADCL; | |
| 841 uint8_t high_11 = ADCH; | |
| 842 uint16_t val = low_11 + (high_11 << 8); | |
| 843 | |
| 844 if (n >= 4) | |
| 845 { | |
| 846 sum += val; | |
| 847 num++; | |
| 848 } | |
| 849 } | |
| 850 ADCSRA = 0; | |
| 851 PRR |= _BV(PRADC); | |
| 852 | |
| 853 //float res_volts = 1.1 * 1024 * num / sum; | |
| 854 //return 1000 * res_volts; | |
| 855 return ((uint32_t)1100*1024*num) / sum; | |
| 856 } | |
| 857 | |
|
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858 #define SCALER_5V 2 |
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859 |
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860 static uint16_t |
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861 adc_5v(uint16_t vcc) |
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862 { |
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863 PRR &= ~_BV(PRADC); |
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864 |
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865 // /16 prescaler |
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866 ADCSRA = _BV(ADEN) | _BV(ADPS2); |
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867 |
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868 // set to measure ADC4 against AVCC |
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869 ADMUX = _BV(REFS0) | _BV(MUX2); |
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870 // average a number of samples |
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871 uint16_t sum = 0; |
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872 uint8_t num = 0; |
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873 for (uint8_t n = 0; n < 20; n++) |
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874 { |
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875 ADCSRA |= _BV(ADSC); |
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876 loop_until_bit_is_clear(ADCSRA, ADSC); |
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877 |
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878 uint8_t low_11 = ADCL; |
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879 uint8_t high_11 = ADCH; |
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880 uint16_t val = low_11 + (high_11 << 8); |
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881 |
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882 if (n >= 4) |
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883 { |
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884 sum += val; |
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885 num++; |
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886 } |
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887 } |
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888 ADCSRA = 0; |
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889 PRR |= _BV(PRADC); |
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890 |
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891 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024));; |
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892 } |
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893 |
| 0 | 894 static void |
| 2 | 895 reboot_pi() |
| 896 { | |
|
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897 printf_P(PSTR("Real reboot now\n")); |
|
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898 // pull it low for 200ms |
| 2 | 899 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
| 900 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
|
18
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901 _delay_ms(200); |
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902 |
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903 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
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904 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
19
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
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905 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
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906 hmac_file("stuff"); |
|
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907 } |
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908 |
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909 static void |
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910 wait_reboot_pi() |
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911 { |
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912 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
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913 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
|
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914 { |
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915 reboot_count = WARNING_TIME; |
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916 } |
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917 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
| 2 | 918 } |
| 919 | |
| 920 static void | |
| 921 set_pi_boot_normal(uint8_t normal) | |
| 922 { | |
| 923 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 924 if (normal) | |
| 925 { | |
| 926 // tristate | |
| 927 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 928 } | |
| 929 else | |
| 930 { | |
| 931 // pull it low | |
| 932 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
| 933 | |
| 934 } | |
| 935 } | |
| 936 | |
| 937 static void | |
| 938 check_flags() | |
| 939 { | |
|
15
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940 if (watchdog_long_hit) |
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941 { |
|
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942 // alternate between booting normal and emergency |
|
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943 if (long_reboot_mode) |
|
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944 { |
|
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945 cmd_newboot(); |
|
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946 } |
|
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947 long_reboot_mode ^= 1; |
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948 } |
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949 |
| 2 | 950 if (watchdog_long_hit |
| 951 || watchdog_short_hit | |
| 952 || oneshot_hit) | |
| 953 { | |
| 12 | 954 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
| 955 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
|
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956 wait_reboot_pi(); |
| 2 | 957 } |
| 958 | |
| 959 if (newboot_hit) { | |
| 960 set_pi_boot_normal(0); | |
| 961 } | |
| 962 | |
|
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963 if (reboot_hit) { |
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964 reboot_pi(); |
|
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965 } |
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|
966 |
| 2 | 967 watchdog_long_hit = 0; |
| 968 watchdog_short_hit = 0; | |
| 969 newboot_hit = 0; | |
| 970 oneshot_hit = 0; | |
|
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971 reboot_hit = 0; |
| 2 | 972 } |
| 973 | |
| 974 static void | |
| 0 | 975 do_comms() |
| 976 { | |
| 977 // avoid receiving rubbish, perhaps | |
| 978 uart_on(); | |
| 979 | |
| 980 // write sd card here? same 3.3v regulator... | |
| 981 | |
| 1 | 982 while (1) |
| 0 | 983 { |
| 1 | 984 wdt_reset(); |
| 2 | 985 |
|
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986 #ifdef SIM_DEBUG |
|
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987 if (sim_idx != last_sim_idx) |
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988 { |
|
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989 last_sim_idx = sim_idx; |
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990 } |
|
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991 #endif |
|
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|
992 |
| 2 | 993 check_flags(); |
| 994 | |
| 0 | 995 if (have_cmd) |
| 996 { | |
| 997 have_cmd = 0; | |
| 998 read_handler(); | |
| 999 continue; | |
| 1000 } | |
| 1001 | |
| 1002 // wait for commands from the master | |
| 1003 idle_sleep(); | |
| 1004 } | |
| 1005 } | |
| 1006 | |
| 1007 static void | |
| 1008 blink() | |
| 1009 { | |
|
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1010 #if 0 |
|
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1011 PORT_ &= ~_BV(PIN_LED); |
| 0 | 1012 _delay_ms(1); |
| 1013 PORT_LED |= _BV(PIN_LED); | |
|
18
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1014 #endif |
| 0 | 1015 } |
| 1016 | |
| 1017 static void | |
| 1018 long_delay(int ms) | |
| 1019 { | |
| 1020 int iter = ms / 100; | |
| 1021 | |
| 1022 for (int i = 0; i < iter; i++) | |
| 1023 { | |
| 1024 _delay_ms(100); | |
| 1025 } | |
| 1026 } | |
| 1027 | |
| 1028 ISR(BADISR_vect) | |
| 1029 { | |
| 1030 //uart_on(); | |
| 1031 printf_P(PSTR("Bad interrupt\n")); | |
| 1032 } | |
| 1033 | |
| 1034 int main(void) | |
| 1035 { | |
| 17 | 1036 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
| 1037 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
|
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|
1038 |
| 0 | 1039 setup_chip(); |
| 1040 blink(); | |
| 1041 | |
| 1042 stdout = &mystdout; | |
| 1043 uart_on(); | |
| 1044 | |
| 12 | 1045 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]")); |
| 0 | 1046 |
| 2 | 1047 set_pi_boot_normal(0); |
| 1048 | |
| 0 | 1049 load_params(); |
| 1050 | |
| 1051 setup_tick_counter(); | |
| 1052 | |
| 1053 sei(); | |
| 1054 | |
| 8 | 1055 #if 0 |
| 1056 // encryption test | |
| 1057 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
| 1058 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
| 12 | 1059 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
| 1060 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
| 1061 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
| 8 | 1062 #endif |
| 1063 | |
| 1 | 1064 // doesn't return |
| 1065 do_comms(); | |
| 0 | 1066 |
| 1067 return 0; /* never reached */ | |
| 1068 } |