Mercurial > pihelp
annotate main.c @ 35:cce426bb6d3e
fix rng and short watchdog
| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Thu, 27 Jun 2013 05:40:00 +0000 |
| parents | 5d6a841eef82 |
| children | c6f77df67dde |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 3 #include <stddef.h> | |
| 4 #include <stdbool.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <avr/io.h> | |
| 7 #include <avr/interrupt.h> | |
| 8 #include <avr/sleep.h> | |
| 9 #include <util/delay.h> | |
| 10 #include <avr/pgmspace.h> | |
| 11 #include <avr/eeprom.h> | |
| 12 #include <avr/wdt.h> | |
| 13 #include <util/atomic.h> | |
| 14 #include <util/crc16.h> | |
| 15 | |
| 2 | 16 #include "hmac-sha1.h" |
| 5 | 17 #include "aes.h" |
| 2 | 18 |
|
19
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
19 #include "fat.h" |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
20 #include "fat_config.h" |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
21 #include "partition.h" |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
22 #include "sd_raw.h" |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
23 #include "sd_raw_config.h" |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
24 |
| 1 | 25 //#include "simple_ds18b20.h" |
| 26 //#include "onewire.h" | |
| 0 | 27 |
| 20 | 28 // not set via bootloader |
| 29 //LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); | |
| 5 | 30 |
| 0 | 31 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
| 32 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
| 33 | |
| 34 // TICK should be 8 or less (8 untested). all timers need | |
| 35 // to be a multiple. | |
| 36 | |
| 1 | 37 #define TICK 1 |
| 17 | 38 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
| 5 | 39 #define NKEYS 10 |
| 40 #define HMACLEN 20 | |
| 41 #define AESLEN 16 | |
| 42 #define KEYLEN HMACLEN | |
| 1 | 43 |
| 27 | 44 #define BAUD 115200 |
| 20 | 45 #define UBRR ((F_CPU)/(16*(BAUD))-1) |
| 0 | 46 |
| 2 | 47 #define PORT_PI_BOOT PORTD |
| 48 #define DDR_PI_BOOT DDRD | |
| 4 | 49 #define PIN_PI_BOOT PD5 |
| 2 | 50 |
| 51 #define PORT_PI_RESET PORTD | |
| 52 #define DDR_PI_RESET DDRD | |
| 53 #define PIN_PI_RESET PD6 | |
| 54 | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
55 #define PORT_PI_WARNING PORTD |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
56 #define DDR_PI_WARNING DDRD |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
57 #define PIN_PI_WARNING PD7 |
| 0 | 58 |
| 59 // #define HAVE_UART_ECHO | |
| 60 | |
| 7 | 61 // stores a value of clock_epoch combined with the remainder of TCNT1, |
| 0 | 62 // for 1/32 second accuracy |
| 63 struct epoch_ticks | |
| 64 { | |
| 65 uint32_t ticks; | |
| 66 // remainder | |
| 20 | 67 uint16_t rem; |
| 0 | 68 }; |
| 69 | |
| 16 | 70 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
| 71 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
| 72 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
| 73 | |
| 74 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
| 75 | |
| 76 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
| 77 #define NEWBOOT_MIN (60*2) // 2 minutes | |
| 78 #define NEWBOOT_MAX (60*30) // 30 mins | |
| 79 | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
80 #define WARNING_TIME 10 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
81 |
| 1 | 82 // eeprom-settable parameters, default values defined here. |
| 83 // all timeouts should be a multiple of TICK | |
| 16 | 84 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
| 1 | 85 static uint32_t watchdog_short_limit = 0; |
| 16 | 86 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
| 0 | 87 |
| 1 | 88 // avr proves itself |
| 2 | 89 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
| 0 | 90 |
| 91 // ---- Atomic guards required accessing these variables | |
| 92 // clock_epoch in seconds | |
| 93 static uint32_t clock_epoch; | |
| 1 | 94 // watchdog counts up |
| 95 static uint32_t watchdog_long_count; | |
| 96 static uint32_t watchdog_short_count; | |
| 2 | 97 // newboot counts down |
| 1 | 98 static uint32_t newboot_count; |
| 2 | 99 // oneshot counts down |
| 100 static uint32_t oneshot_count; | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
101 // countdown after the warning. |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
102 static uint8_t reboot_count; |
| 27 | 103 // set by adc completion interrupt |
| 104 static uint8_t adc_done; | |
| 2 | 105 |
| 0 | 106 // ---- End atomic guards required |
| 107 | |
| 108 // boolean flags | |
| 1 | 109 static uint8_t watchdog_long_hit; |
| 110 static uint8_t watchdog_short_hit; | |
| 111 static uint8_t newboot_hit; | |
| 2 | 112 static uint8_t oneshot_hit; |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
113 static uint8_t reboot_hit; |
| 0 | 114 |
| 22 | 115 // informational for status messages |
| 116 static uint8_t boot_normal_status; | |
| 117 | |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
118 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
119 // working firmware should boot. set back to 0 for each 'alive' |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
120 // command |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
121 static uint8_t long_reboot_mode = 0; |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
122 |
| 0 | 123 static uint8_t readpos; |
| 20 | 124 static char readbuf[150]; |
| 0 | 125 static uint8_t have_cmd; |
| 126 | |
| 127 int uart_putchar(char c, FILE *stream); | |
| 22 | 128 static void long_delay(uint16_t ms); |
| 0 | 129 static void blink(); |
| 130 static uint16_t adc_vcc(); | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
131 static uint16_t adc_5v(uint16_t vcc); |
| 20 | 132 static uint16_t adc_temp(); |
| 2 | 133 static void set_pi_boot_normal(uint8_t normal); |
| 0 | 134 |
| 17 | 135 |
| 0 | 136 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
| 137 _FDEV_SETUP_WRITE); | |
| 138 | |
| 139 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
| 140 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 141 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 142 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 143 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 144 | |
| 1 | 145 #define EXPECT_MAGIC 0xdf83 |
| 0 | 146 |
| 147 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 1 | 148 uint32_t watchdog_long_limit; |
| 149 uint32_t watchdog_short_limit; | |
| 150 uint32_t newboot_limit; | |
| 0 | 151 |
| 2 | 152 uint8_t avr_keys[NKEYS][KEYLEN]; |
| 0 | 153 |
| 154 uint16_t magic; | |
| 155 }; | |
| 156 | |
| 157 // Very first setup | |
| 158 static void | |
| 159 setup_chip() | |
| 160 { | |
| 161 cli(); | |
| 162 | |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
163 // set to 8 seconds, in case sha1 is slow etc. |
| 1 | 164 wdt_enable(WDTO_8S); |
| 165 | |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
166 // Set scaler to /1, -> clock to 8mhz |
| 0 | 167 CLKPR = _BV(CLKPCE); |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
168 CLKPR = 0; |
| 0 | 169 |
| 170 // enable pullups | |
| 1 | 171 // XXX matt pihelp |
| 5 | 172 //PORTB = 0xff; // XXX change when using SPI |
| 173 //PORTD = 0xff; | |
| 174 //PORTC = 0xff; | |
| 0 | 175 |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
176 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
| 0 | 177 |
| 5 | 178 #if 0 |
| 0 | 179 // set pullup |
| 180 PORTD |= _BV(PD2); | |
| 181 // INT0 setup | |
| 182 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
| 183 EIMSK = _BV(INT0); | |
| 5 | 184 #endif |
| 0 | 185 |
| 186 // comparator disable | |
| 187 ACSR = _BV(ACD); | |
| 188 | |
| 189 // disable adc pin input buffers | |
| 190 DIDR0 = 0x3F; // acd0-adc5 | |
| 191 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
| 192 | |
| 193 sei(); | |
| 194 } | |
| 195 | |
| 196 static void | |
| 197 get_epoch_ticks(struct epoch_ticks *t) | |
| 198 { | |
| 199 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 200 { | |
| 201 t->ticks = clock_epoch; | |
| 7 | 202 t->rem = TCNT1; |
| 0 | 203 } |
| 204 } | |
| 205 | |
| 206 static void | |
| 207 setup_tick_counter() | |
| 208 { | |
| 2 | 209 // set up counter1 |
| 210 | |
| 0 | 211 // set up counter2. |
| 212 // COM21 COM20 Set OC2 on Compare Match (p116) | |
| 213 // WGM21 Clear counter on compare | |
| 214 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
| 215 // toggle on match | |
| 2 | 216 TCCR1A = _BV(COM1A0); |
| 8 | 217 #ifdef SIM_DEBUG |
| 218 // systemclock/8 | |
| 219 TCCR1B = _BV(CS11); | |
| 220 #else | |
| 20 | 221 // systemclock/256 |
| 222 TCCR1B = _BV(CS12); | |
| 8 | 223 #endif |
| 2 | 224 TCNT1 = 0; |
| 225 OCR1A = SLEEP_COMPARE; | |
| 0 | 226 // interrupt |
| 2 | 227 TIMSK1 = _BV(OCIE1A); |
| 0 | 228 } |
| 229 | |
| 230 static void | |
| 231 uart_on() | |
| 232 { | |
| 233 // Power reduction register | |
| 234 PRR &= ~_BV(PRUSART0); | |
| 235 | |
| 236 // All of this needs to be done each time after turning off the PRR | |
| 237 // baud rate | |
| 238 UBRR0H = (unsigned char)(UBRR >> 8); | |
| 239 UBRR0L = (unsigned char)UBRR; | |
| 240 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
| 241 //8N1 | |
| 242 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
| 243 } | |
| 244 | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
245 #ifdef SIM_DEBUG |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
246 static char sim_out[140]; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
247 static uint8_t sim_idx = 0; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
248 static uint8_t last_sim_idx = 0; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
249 #endif |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
250 |
| 0 | 251 int |
| 252 uart_putchar(char c, FILE *stream) | |
| 253 { | |
| 254 // XXX could perhaps sleep in the loop for power. | |
| 255 if (c == '\n') | |
| 256 { | |
| 257 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 258 UDR0 = '\r'; | |
| 259 } | |
| 260 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 261 UDR0 = c; | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
262 #ifdef SIM_DEBUG |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
263 sim_out[sim_idx] = c; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
264 sim_idx++; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
265 sim_idx %= sizeof(sim_out); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
266 #endif |
| 0 | 267 if (c == '\r') |
| 268 { | |
| 269 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 270 UDR0 = '\n'; | |
| 271 } | |
| 272 return (unsigned char)c; | |
| 273 } | |
| 274 | |
|
19
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
275 uint8_t find_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name, struct fat_dir_entry_struct* dir_entry) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
276 { |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
277 while(fat_read_dir(dd, dir_entry)) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
278 { |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
279 if(strcmp(dir_entry->long_name, name) == 0) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
280 { |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
281 fat_reset_dir(dd); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
282 return 1; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
283 } |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
284 } |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
285 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
286 return 0; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
287 } |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
288 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
289 struct fat_file_struct* |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
290 open_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
291 { |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
292 struct fat_dir_entry_struct file_entry; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
293 if(!find_file_in_dir(fs, dd, name, &file_entry)) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
294 return 0; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
295 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
296 return fat_open_file(fs, &file_entry); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
297 } |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
298 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
299 static void |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
300 hmac_file(const char* fn) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
301 { |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
302 sd_raw_init(); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
303 struct partition_struct* partition = partition_open(sd_raw_read, sd_raw_read_interval, 0, 0, 0); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
304 struct fat_fs_struct* fs = fat_open(partition); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
305 struct fat_dir_entry_struct directory; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
306 fat_get_dir_entry_of_path(fs, "/", &directory); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
307 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
308 struct sd_raw_info disk_info; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
309 sd_raw_get_info(&disk_info); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
310 printf("diskinfo size %d", disk_info.capacity); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
311 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
312 struct fat_dir_struct* dd = fat_open_dir(fs, &directory); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
313 struct fat_file_struct* fd = open_file_in_dir(fs, dd, "fn"); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
314 |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
315 char c = 0; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
316 char buf[512]; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
317 for (int i = 0; i < 10; i++) |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
318 { |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
319 fat_read_file(fd, buf, sizeof(buf)); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
320 c ^= buf[0]; |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
321 } |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
322 printf("total %d\n", c); |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
323 } |
|
5f9a40d6991b
Import SD handling from http://www.roland-riegel.de/sd-reader/index.html
Matt Johnston <matt@ucc.asn.au>
parents:
18
diff
changeset
|
324 |
| 20 | 325 static void cmd_reset() __attribute__ ((noreturn)); |
| 0 | 326 static void |
| 20 | 327 cmd_reset() |
| 0 | 328 { |
| 329 printf_P(PSTR("reset\n")); | |
| 330 _delay_ms(100); | |
| 331 cli(); // disable interrupts | |
| 332 wdt_enable(WDTO_15MS); // enable watchdog | |
| 333 while(1); // wait for watchdog to reset processor | |
| 334 } | |
| 335 | |
| 2 | 336 static void |
| 337 cmd_newboot() | |
| 338 { | |
| 339 set_pi_boot_normal(1); | |
| 340 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 341 { | |
| 342 newboot_count = newboot_limit; | |
| 343 } | |
| 20 | 344 printf_P(PSTR("newboot for %d secs\n"), newboot_limit); |
| 2 | 345 } |
| 346 | |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
347 static void |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
348 cmd_oldboot() |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
349 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
350 set_pi_boot_normal(0); |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
351 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
352 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
353 newboot_count = 0; |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
354 } |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
355 printf_P(PSTR("back to old boot\n")); |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
356 } |
| 1 | 357 |
| 0 | 358 |
| 359 static void | |
| 20 | 360 cmd_status() |
| 0 | 361 { |
| 2 | 362 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
| 20 | 363 struct epoch_ticks t; |
| 364 | |
| 365 get_epoch_ticks(&t); | |
| 366 | |
| 1 | 367 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
| 368 { | |
| 2 | 369 cur_watchdog_long = watchdog_long_count; |
| 370 cur_watchdog_short = watchdog_short_count; | |
| 371 cur_newboot = newboot_count; | |
| 372 cur_oneshot = oneshot_count; | |
| 1 | 373 } |
| 374 | |
| 20 | 375 printf_P(PSTR("limit (current)\n" |
| 376 "watchdog_long %lu (%lu) watchdog newboot mode %d\n" | |
| 377 "watchdog_short %lu (%lu)\n" | |
| 378 "newboot %lu (%lu)\n" | |
| 379 "oneshot (%lu)\n" | |
| 380 "uptime %lu rem %u\n" | |
| 22 | 381 "boot normal %hhu\n" |
| 20 | 382 ), |
| 383 watchdog_long_limit, cur_watchdog_long, long_reboot_mode, | |
| 384 watchdog_short_limit, cur_watchdog_short, | |
| 385 newboot_limit, cur_newboot, | |
| 386 cur_oneshot, | |
| 22 | 387 t.ticks, t.rem, |
| 388 boot_normal_status); | |
| 0 | 389 } |
| 390 | |
| 391 static void | |
| 1 | 392 cmd_set_params(const char *params) |
| 0 | 393 { |
| 1 | 394 uint32_t new_watchdog_long_limit; |
| 395 uint32_t new_watchdog_short_limit; | |
| 396 uint32_t new_newboot_limit; | |
| 397 | |
| 398 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
| 399 &new_watchdog_long_limit, | |
| 400 &new_watchdog_short_limit, | |
| 401 &new_newboot_limit); | |
| 402 | |
| 403 if (ret != 3) | |
| 0 | 404 { |
| 1 | 405 printf_P(PSTR("Bad values\n")); |
| 406 } | |
| 407 else | |
| 408 { | |
| 409 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 410 { | |
| 411 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
| 412 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
| 413 eeprom_write(new_newboot_limit, newboot_limit); | |
| 414 uint16_t magic = EXPECT_MAGIC; | |
| 415 eeprom_write(magic, magic); | |
| 0 | 416 } |
| 1 | 417 printf_P(PSTR("set_params for next boot\n")); |
| 418 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
| 419 new_watchdog_long_limit, | |
| 420 new_watchdog_short_limit, | |
| 421 new_newboot_limit); | |
| 422 } | |
| 423 } | |
| 0 | 424 |
| 35 | 425 // returns 1 if they are equal, timing independent |
| 426 static uint8_t | |
| 427 safe_mem_eq(const uint8_t *a, const uint8_t *b, int len) | |
| 428 { | |
| 429 uint8_t result = 0; | |
| 430 for (int i = 0; i < len; i++) | |
| 431 { | |
| 432 result |= a[i] ^ b[i]; | |
| 433 } | |
| 434 return result == 0; | |
| 435 } | |
| 436 | |
| 437 // returns 1 if they are equal | |
| 438 static uint8_t | |
| 439 safe_str_eq(const char *a, const char *b) | |
| 440 { | |
| 441 int la = strlen(a); | |
| 442 if (la != strlen(b)) | |
| 443 { | |
| 444 return 0; | |
| 445 } | |
| 446 return safe_mem_eq((const uint8_t*)a, (const uint8_t*)b, la); | |
| 447 } | |
| 448 | |
| 1 | 449 uint8_t from_hex(char c) |
| 450 { | |
| 451 if (c >= '0' && c <= '9') { | |
| 452 return c-'0'; | |
| 453 } | |
| 454 if (c >= 'a' && c <= 'f') { | |
| 455 return c-'a' + 0xa; | |
| 456 } | |
| 457 if (c >= 'A' && c <= 'F') { | |
| 458 return c-'A' + 0xa; | |
| 459 } | |
| 460 return 0; | |
| 461 } | |
| 462 | |
| 2 | 463 static void |
| 464 printhex_nibble(const unsigned char b, FILE *stream) | |
| 465 { | |
| 466 unsigned char c = b & 0x0f; | |
| 467 if ( c > 9 ) { | |
| 468 c += 'A'-10; | |
| 469 } | |
| 470 else { | |
| 471 c += '0'; | |
| 472 } | |
| 473 fputc(c, stream); | |
| 474 } | |
| 475 | |
| 476 void | |
| 477 printhex_byte(const unsigned char b, FILE *stream) | |
| 478 { | |
| 479 printhex_nibble( b >> 4, stream); | |
| 480 printhex_nibble( b, stream); | |
| 481 } | |
| 482 | |
| 483 void | |
| 484 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
| 485 { | |
| 486 for (uint8_t i = 0; i < n; i++) | |
| 487 { | |
| 488 printhex_byte(id[i], stream); | |
| 489 } | |
| 490 } | |
| 491 | |
| 492 static int8_t | |
| 5 | 493 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
| 494 uint8_t bytes_len) | |
| 2 | 495 { |
| 496 // "N HEXKEY" | |
| 5 | 497 if (strlen(params) != bytes_len*2 + 2) { |
| 20 | 498 printf_P(PSTR("Wrong length key. wanted %d, got %d, '%s'\n"), |
| 499 bytes_len*2+2, strlen(params), params); | |
| 2 | 500 return -1; |
| 501 } | |
| 502 | |
| 503 if (params[1] != ' ') | |
| 504 { | |
| 505 printf_P(PSTR("Missing space\n")); | |
| 506 return -1; | |
| 507 } | |
| 508 | |
| 509 *key_index = from_hex(params[0]); | |
| 510 if (*key_index >= NKEYS) | |
| 511 { | |
| 512 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
| 513 return -1; | |
| 514 } | |
| 515 | |
| 5 | 516 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
| 2 | 517 { |
| 518 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
| 519 } | |
| 520 return 0; | |
| 521 } | |
| 522 | |
| 1 | 523 static void |
| 524 cmd_set_avr_key(const char *params) | |
| 525 { | |
| 2 | 526 uint8_t new_key[KEYLEN]; |
| 527 uint8_t key_index; | |
| 5 | 528 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
| 2 | 529 { |
| 1 | 530 return; |
| 0 | 531 } |
| 2 | 532 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
| 8 | 533 #ifndef SIM_DEBUG |
| 2 | 534 eeprom_write(avr_keys, avr_keys); |
| 8 | 535 #endif |
| 20 | 536 printf_P(PSTR("Set key %d: "), key_index); |
| 537 printhex(new_key, sizeof(new_key), stdout); | |
| 538 putchar('\n'); | |
| 2 | 539 } |
| 540 | |
| 541 static void | |
| 542 cmd_hmac(const char *params) | |
| 543 { | |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
544 uint8_t indata[2+HMACLEN] = {'H', ':'}; |
| 7 | 545 uint8_t outdata[HMACLEN]; |
| 2 | 546 uint8_t key_index; |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
547 if (parse_key(params, &key_index, &indata[2], HMACLEN) != 0) |
| 2 | 548 { |
| 549 printf_P(PSTR("FAIL: Bad input\n")); | |
| 5 | 550 return; |
| 2 | 551 } |
| 0 | 552 |
| 8 | 553 #ifndef SIM_DEBUG |
| 5 | 554 long_delay(200); |
| 8 | 555 #endif |
| 5 | 556 |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
557 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
| 2 | 558 printf_P(PSTR("HMAC: ")); |
| 7 | 559 printhex(outdata, HMACLEN, stdout); |
| 20 | 560 putchar('\n'); |
| 5 | 561 } |
| 562 | |
| 563 static void | |
| 564 cmd_decrypt(const char *params) | |
| 565 { | |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
566 uint8_t indata[HMACLEN+AESLEN]; // XXX |
|
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
567 // a temporary buffer |
|
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
568 uint8_t output[HMACLEN] = {'D', ':'}; |
|
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
569 _Static_assert(AESLEN+2 <= sizeof(output), "sufficient output buffer"); |
| 5 | 570 uint8_t key_index; |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
571 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
| 5 | 572 { |
| 573 printf_P(PSTR("FAIL: Bad input\n")); | |
| 574 return; | |
| 575 } | |
| 576 | |
| 8 | 577 #ifndef SIM_DEBUG |
| 5 | 578 long_delay(200); |
| 8 | 579 #endif |
| 7 | 580 |
| 5 | 581 // check the signature |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
582 memcpy(&output[2], &indata[HMACLEN], AESLEN); |
| 12 | 583 hmac_sha1(output, avr_keys[key_index], KEYLEN*8, output, (2+AESLEN)*8); |
| 5 | 584 |
| 35 | 585 if (!safe_mem_eq(output, indata, HMACLEN)) { |
| 5 | 586 printf_P(PSTR("FAIL: hmac mismatch\n")); |
| 587 } | |
| 588 | |
|
11
e83b35e864d7
hmac and decrypt keys differ now
Matt Johnston <matt@ucc.asn.au>
parents:
8
diff
changeset
|
589 uint8_t tmpbuf[256]; |
| 27 | 590 aesInit(avr_keys[key_index], tmpbuf); |
| 591 aesDecrypt(&indata[HMACLEN], NULL); | |
| 5 | 592 |
| 593 printf_P(PSTR("DECRYPTED: ")); | |
| 594 printhex(output, AESLEN, stdout); | |
| 20 | 595 putchar('\n'); |
| 2 | 596 } |
| 597 | |
| 598 static void | |
| 599 cmd_oneshot_reboot(const char *params) | |
| 600 { | |
| 601 uint32_t new_delay = strtoul(params, NULL, 10); | |
| 602 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 1 | 603 { |
| 2 | 604 oneshot_count = new_delay; |
| 1 | 605 } |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
606 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
| 0 | 607 } |
| 608 | |
| 609 static void | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
610 clamp_params() |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
611 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
612 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
613 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
614 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
615 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
616 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
617 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
618 if (watchdog_short_limit != 0 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
619 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
620 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
621 watchdog_short_limit = 0; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
622 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
623 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
624 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
625 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
626 newboot_limit = NEWBOOT_DEFAULT; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
627 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
628 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
629 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
630 static void |
| 0 | 631 load_params() |
| 632 { | |
| 633 uint16_t magic; | |
| 634 eeprom_read(magic, magic); | |
| 635 if (magic == EXPECT_MAGIC) | |
| 636 { | |
| 1 | 637 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
| 638 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
| 2 | 639 eeprom_read(newboot_limit, newboot_limit); |
| 1 | 640 } |
| 2 | 641 |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
642 clamp_params(); |
| 16 | 643 |
| 2 | 644 eeprom_read(avr_keys, avr_keys); |
| 0 | 645 } |
| 646 | |
| 2 | 647 static void |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
648 cmd_alive() |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
649 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
650 printf_P(PSTR("Ah, good.\n")); |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
651 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
652 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
653 watchdog_long_count = 0; |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
654 watchdog_short_count = 0; |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
655 } |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
656 long_reboot_mode = 0; |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
657 } |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
658 |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
659 static void |
| 35 | 660 cmd_poke() |
| 661 { | |
| 662 printf_P(PSTR("Ah, good.\n")); | |
| 663 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 664 { | |
| 665 watchdog_short_count = 0; | |
| 666 } | |
| 667 } | |
| 668 | |
| 669 static void | |
| 2 | 670 cmd_vcc() |
| 0 | 671 { |
| 2 | 672 uint16_t vcc = adc_vcc(); |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
673 uint16_t v5 = adc_5v(vcc); |
| 21 | 674 uint16_t temp = adc_temp(); |
| 675 // roughly? | |
| 676 uint16_t temp_deg = temp - 290; | |
| 677 printf_P(PSTR("vcc: %u mV\n" | |
| 678 "5v: %u mV\n" | |
| 26 | 679 "temp: %u mV (%dºC)\n" |
| 680 ), | |
| 27 | 681 vcc, v5, temp, temp_deg); |
| 0 | 682 } |
| 683 | |
| 20 | 684 |
| 27 | 685 void(*bootloader)() __attribute__ ((noreturn)) = (void*)0x7800; |
| 686 | |
| 20 | 687 #ifndef PROG_PASSWORD |
| 688 #define PROG_PASSWORD "Y2vvjxO5" | |
| 689 #endif | |
| 690 | |
| 691 static void | |
| 692 cmd_prog(const char* arg) | |
| 693 { | |
| 35 | 694 if (safe_str_eq(arg, PROG_PASSWORD)) |
| 20 | 695 { |
| 696 printf_P(PSTR("Bad prog password\n")); | |
| 697 return; | |
| 698 } | |
| 699 | |
| 700 // disable wdt | |
| 701 wdt_disable(); | |
| 702 | |
| 703 // disable interrupts | |
| 704 TIMSK0 = 0; | |
| 705 TIMSK1 = 0; | |
| 706 TIMSK2 = 0; | |
| 707 EIMSK = 0; | |
| 708 PCMSK0 = 0; | |
| 709 PCMSK1 = 0; | |
| 710 PCMSK2 = 0; | |
| 711 ACSR &= ~_BV(ACIE); | |
| 712 ADCSRA &= ~_BV(ADIE); | |
| 713 UCSR0B &= ~_BV(RXCIE0); | |
| 714 UCSR0B &= _BV(TXCIE0); | |
| 715 // doesn't do TWI, other uart, probably others | |
| 716 | |
| 717 _delay_ms(20); | |
| 718 | |
| 719 bootloader(); | |
| 720 } | |
| 27 | 721 |
| 722 | |
| 723 static void | |
| 724 adc_sleep() | |
| 725 { | |
| 726 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 727 sleep_mode(); | |
| 728 } | |
| 729 | |
| 730 #define BITSET(v, n) (((v) >> (n)) & 1) | |
| 731 | |
| 732 static inline uint8_t | |
| 733 popcnt(uint8_t v) | |
| 734 { | |
| 735 return BITSET(v, 0) | |
| 736 + BITSET(v, 1) | |
| 737 + BITSET(v, 2) | |
| 738 + BITSET(v, 3) | |
| 739 + BITSET(v, 4) | |
| 740 + BITSET(v, 5) | |
| 741 + BITSET(v, 6) | |
| 742 + BITSET(v, 7); | |
| 743 } | |
| 744 | |
| 745 static uint8_t | |
| 746 adc_bit() | |
| 747 { | |
| 748 ADCSRA |= _BV(ADSC); | |
| 749 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 750 uint8_t low = ADCL; | |
| 751 uint8_t high = ADCH; | |
| 35 | 752 uint8_t ret = (popcnt(low)&1) ^ (popcnt(high)&1); |
| 753 return ret; | |
| 27 | 754 } |
| 755 | |
| 756 static void | |
| 757 adc_random(uint8_t admux, | |
| 758 uint8_t *out, uint16_t num, uint32_t *tries) | |
| 759 { | |
| 760 PRR &= ~_BV(PRADC); | |
| 761 // /16 prescaler for 691mhz, no interrupt | |
| 762 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 763 | |
| 35 | 764 ADMUX = admux; |
| 765 | |
| 27 | 766 *tries = 0; |
| 767 for (int i = 0; i < num; i++) | |
| 768 { | |
| 35 | 769 uint8_t ret = 0; |
| 770 uint8_t count = 0; | |
| 771 | |
| 27 | 772 while (count <= 7) |
| 773 { | |
| 774 (*tries)++; | |
| 775 | |
| 776 // Von Neumann extractor | |
| 777 uint8_t one = adc_bit(); | |
| 778 uint8_t two = adc_bit(); | |
| 779 if (one == two) | |
| 780 { | |
| 781 continue; | |
| 782 } | |
| 783 ret |= one << count; | |
| 784 count++; | |
| 785 } | |
| 786 out[i] = ret; | |
| 787 } | |
| 788 ADCSRA = 0; | |
| 789 PRR |= _BV(PRADC); | |
| 790 } | |
| 791 | |
| 792 ISR(ADC_vect) | |
| 793 { | |
| 794 adc_done = 1; | |
| 795 } | |
| 796 | |
| 797 static void | |
| 798 adc_generic(uint8_t admux, uint8_t *ret_num, uint16_t *ret_sum) | |
| 799 { | |
| 800 PRR &= ~_BV(PRADC); | |
| 801 | |
| 31 | 802 // /128 prescaler (86kHz), interrupt |
| 803 ADCSRA = _BV(ADEN) | |
| 804 | _BV(ADPS2) | _BV(ADPS1) | _BV(ADPS0) | |
| 805 | _BV(ADIE); | |
| 27 | 806 |
| 807 // set to measure 1.1 reference | |
| 808 ADMUX = admux; | |
| 809 | |
| 810 // delay after setting reference etc, allow settling | |
| 811 long_delay(300); | |
| 812 // average a number of samples | |
| 813 uint16_t sum = 0; | |
| 814 uint8_t num = 0; | |
| 815 for (uint8_t n = 0; n < 20; n++) | |
| 816 { | |
| 817 while (1) | |
| 818 { | |
| 819 adc_done = 0; | |
| 820 ADCSRA |= _BV(ADSC); | |
| 821 adc_sleep(); | |
| 822 | |
| 823 uint8_t done; | |
| 824 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 825 { | |
| 826 done = adc_done; | |
| 827 } | |
| 828 if (done) | |
| 829 { | |
| 830 break; | |
| 831 } | |
| 832 } | |
| 833 | |
| 834 uint8_t low_11 = ADCL; | |
| 835 uint8_t high_11 = ADCH; | |
| 836 uint16_t val = low_11 + (high_11 << 8); | |
| 837 | |
| 838 if (n >= 4) | |
| 839 { | |
| 840 sum += val; | |
| 841 num++; | |
| 842 } | |
| 843 } | |
| 844 ADCSRA = 0; | |
| 845 PRR |= _BV(PRADC); | |
| 846 | |
| 847 *ret_num = num; | |
| 848 *ret_sum = sum; | |
| 849 } | |
| 850 | |
| 851 static uint16_t | |
| 852 adc_vcc() | |
| 853 { | |
| 854 const uint8_t mux = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 855 uint16_t sum; | |
| 856 uint8_t num; | |
| 857 | |
| 858 adc_generic(mux, &num, &sum); | |
| 859 | |
| 860 //float res_volts = 1.1 * 1024 * num / sum; | |
| 861 //return 1000 * res_volts; | |
| 862 return ((uint32_t)1100*1024*num) / sum; | |
| 863 } | |
| 864 | |
| 865 #define SCALER_5V 2 | |
| 866 | |
| 867 static uint16_t | |
| 868 adc_5v(uint16_t vcc) | |
| 869 { | |
| 870 // set to measure ADC4 against AVCC | |
| 871 const uint8_t mux = _BV(REFS0) | _BV(MUX2); | |
| 872 uint16_t sum; | |
| 873 uint8_t num; | |
| 874 | |
| 875 adc_generic(mux, &num, &sum); | |
| 876 | |
| 877 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024)); | |
| 878 } | |
| 879 | |
| 880 static uint16_t | |
| 881 adc_temp() | |
| 882 { | |
| 883 // set to measure temperature against 1.1v reference. | |
| 884 const uint8_t mux = _BV(REFS0) | _BV(REFS1) | _BV(MUX3); | |
| 885 uint16_t sum; | |
| 886 uint8_t num; | |
| 887 | |
| 888 adc_generic(mux, &num, &sum); | |
| 889 | |
| 890 // return the voltage | |
| 891 | |
| 892 return ((uint32_t)1100*sum) / (num*1024); | |
| 893 } | |
| 894 | |
| 895 static void | |
| 896 cmd_random(const char* params) | |
| 897 { | |
| 898 uint8_t admux; | |
| 899 uint16_t num; | |
| 900 uint8_t buf[100]; | |
| 901 | |
| 902 int ret = sscanf_P(params, PSTR("%hhu %u"), | |
| 903 &admux, &num); | |
| 904 if (!ret) | |
| 905 { | |
| 906 printf_P(PSTR("Bad arguments\n")); | |
| 907 return; | |
| 908 } | |
| 909 uint32_t tries = 0; | |
| 910 printf_P(PSTR("output: ")); | |
| 911 for (int i = 0; i < num; i+= sizeof(buf)) | |
| 912 { | |
| 913 uint32_t t; | |
| 914 uint16_t nr = MIN(num-i, sizeof(buf)); | |
| 915 adc_random(admux, buf, nr, &t); | |
| 916 printhex(buf, nr, stdout); | |
| 917 tries += t; | |
| 918 } | |
| 919 putchar('\n'); | |
| 920 printf_P(PSTR("%ld tries\n"), tries); | |
| 921 } | |
| 922 | |
| 923 | |
| 20 | 924 |
| 0 | 925 static void |
| 926 read_handler() | |
| 927 { | |
| 17 | 928 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
| 929 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
| 930 | |
| 931 LOCAL_PSTR(set_params); | |
| 932 LOCAL_PSTR(set_key); | |
| 933 LOCAL_PSTR(oneshot); | |
| 934 LOCAL_PSTR(hmac); | |
| 935 LOCAL_PSTR(decrypt); | |
| 936 LOCAL_PSTR(alive); | |
| 35 | 937 LOCAL_PSTR(poke); |
| 17 | 938 LOCAL_PSTR(vcc); |
| 939 LOCAL_PSTR(reset); | |
| 940 LOCAL_PSTR(newboot); | |
| 941 LOCAL_PSTR(oldboot); | |
| 20 | 942 LOCAL_PSTR(status); |
| 27 | 943 LOCAL_PSTR(random); |
| 944 LOCAL_PSTR(prog); | |
| 17 | 945 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); |
| 946 LOCAL_HELP(set_key, "20_byte_hex>"); | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
947 LOCAL_HELP(oneshot, "<timeout>"); |
| 27 | 948 LOCAL_HELP(prog, "<password>"); |
| 949 LOCAL_HELP(random, "<admux> <nbytes>"); | |
| 17 | 950 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
| 951 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
| 952 | |
| 953 static const struct handler { | |
| 954 PGM_P name; | |
| 955 void(*cmd)(const char *param); | |
| 956 // existence of arg_help indicates if the cmd takes a parameter. | |
| 957 PGM_P arg_help; | |
| 20 | 958 } handlers[] PROGMEM = |
| 17 | 959 { |
| 20 | 960 {alive_str, cmd_alive, NULL}, |
| 35 | 961 {poke_str, cmd_poke, NULL}, |
| 20 | 962 {newboot_str, cmd_newboot, NULL}, |
| 963 {oldboot_str, cmd_oldboot, NULL}, | |
| 964 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, | |
| 965 {status_str, cmd_status, NULL}, | |
| 966 {hmac_str, cmd_hmac, hmac_help}, | |
| 967 {decrypt_str, cmd_decrypt, decrypt_help}, | |
| 17 | 968 {set_params_str, cmd_set_params, set_params_help}, |
| 969 {set_key_str, cmd_set_avr_key, set_key_help}, | |
| 27 | 970 {random_str, cmd_random, random_help}, |
| 17 | 971 {vcc_str, cmd_vcc, NULL}, |
| 972 {reset_str, cmd_reset, NULL}, | |
| 27 | 973 {prog_str, cmd_prog, prog_help}, |
| 17 | 974 }; |
| 975 | |
| 976 if (readbuf[0] == '\0') | |
| 977 { | |
| 978 return; | |
| 979 } | |
| 980 | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
981 if (strcmp_P(readbuf, PSTR("help")) == 0) |
| 17 | 982 { |
| 983 printf_P(PSTR("Commands:---\n")); | |
| 984 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 985 { | |
| 986 struct handler h; | |
| 987 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 988 printf_P(h.name); | |
| 989 if (h.arg_help) | |
| 990 { | |
| 991 putchar(' '); | |
| 992 printf_P(h.arg_help); | |
| 993 } | |
| 994 putchar('\n'); | |
| 995 }; | |
| 996 printf_P(PSTR("---\n")); | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
997 return; |
| 17 | 998 } |
| 999 | |
| 1000 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 1001 { | |
| 1002 struct handler h; | |
| 1003 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 1004 | |
| 1005 const int h_len = strlen_P(h.name); | |
| 1006 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
| 1007 { | |
| 1008 if (h.arg_help) | |
| 1009 { | |
| 1010 if (readbuf[h_len] == ' ') | |
| 1011 { | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1012 h.cmd(&readbuf[h_len+1]); |
| 17 | 1013 return; |
| 1014 } | |
| 1015 } | |
| 1016 else | |
| 1017 { | |
| 1018 if (readbuf[h_len] == '\0') | |
| 1019 { | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1020 void(*void_cmd)() = h.cmd; |
| 17 | 1021 void_cmd(); |
| 1022 return; | |
| 1023 } | |
| 1024 } | |
| 1025 } | |
| 1026 } | |
| 1027 | |
| 1028 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
| 0 | 1029 } |
| 1030 | |
| 1031 ISR(INT0_vect) | |
| 1032 { | |
| 1033 blink(); | |
| 1034 _delay_ms(100); | |
| 1035 blink(); | |
| 1036 } | |
| 1037 | |
| 1038 ISR(USART_RX_vect) | |
| 1039 { | |
| 1040 char c = UDR0; | |
| 1041 #ifdef HAVE_UART_ECHO | |
| 1042 uart_putchar(c, NULL); | |
| 1043 #endif | |
| 1044 if (c == '\r' || c == '\n') | |
| 1045 { | |
| 1046 if (readpos > 0) | |
| 1047 { | |
| 1048 readbuf[readpos] = '\0'; | |
| 1049 have_cmd = 1; | |
| 1050 readpos = 0; | |
| 1051 } | |
| 1052 } | |
| 1053 else | |
| 1054 { | |
| 1055 readbuf[readpos] = c; | |
| 1056 readpos++; | |
| 1057 if (readpos >= sizeof(readbuf)) | |
| 1058 { | |
| 1059 readpos = 0; | |
| 1060 } | |
| 1061 } | |
| 1062 } | |
| 1063 | |
| 2 | 1064 ISR(TIMER1_COMPA_vect) |
| 0 | 1065 { |
| 2 | 1066 TCNT1 = 0; |
| 0 | 1067 |
| 1068 clock_epoch += TICK; | |
| 1069 | |
| 1 | 1070 // watchdogs count up, continuous |
| 1071 if (watchdog_long_limit > 0) { | |
| 2 | 1072 watchdog_long_count += TICK; |
| 1 | 1073 if (watchdog_long_count >= watchdog_long_limit) |
| 1074 { | |
| 1075 watchdog_long_count = 0; | |
| 1076 watchdog_long_hit = 1; | |
| 1077 } | |
| 0 | 1078 } |
| 1079 | |
| 1 | 1080 if (watchdog_short_limit > 0) { |
| 2 | 1081 watchdog_short_count += TICK; |
| 1 | 1082 if (watchdog_short_count >= watchdog_short_limit) |
| 1083 { | |
| 1084 watchdog_short_count = 0; | |
| 1085 watchdog_short_hit = 1; | |
| 1086 } | |
| 0 | 1087 } |
| 1088 | |
| 2 | 1089 // newboot counts down |
| 1 | 1090 if (newboot_count > 0) |
| 0 | 1091 { |
| 2 | 1092 newboot_count-=TICK; |
| 1093 if (newboot_count <= 0) | |
| 1 | 1094 { |
| 1095 newboot_hit = 1; | |
| 2 | 1096 newboot_count = 0; |
| 1 | 1097 } |
| 0 | 1098 } |
| 1 | 1099 |
| 2 | 1100 if (oneshot_count > 0) |
| 1101 { | |
| 1102 oneshot_count-=TICK; | |
| 1103 if (oneshot_count <= 0) | |
| 1104 { | |
| 1105 oneshot_hit = 1; | |
| 1106 oneshot_count = 0; | |
| 1107 } | |
| 1108 } | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1109 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1110 if (reboot_count > 0) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1111 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1112 reboot_count -= TICK; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1113 if (reboot_count <= 0) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1114 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1115 reboot_hit = 1; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1116 reboot_count = 0; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1117 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1118 } |
| 0 | 1119 } |
| 1120 | |
| 1121 static void | |
| 1122 idle_sleep() | |
| 1123 { | |
| 1124 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 1125 sleep_mode(); | |
| 1126 } | |
| 1127 | |
| 21 | 1128 static void |
| 2 | 1129 reboot_pi() |
| 1130 { | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1131 printf_P(PSTR("Real reboot now\n")); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1132 // pull it low for 200ms |
| 2 | 1133 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
| 1134 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1135 _delay_ms(200); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1136 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1137 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1138 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1139 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1140 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1141 static void |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1142 wait_reboot_pi() |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1143 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1144 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1145 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1146 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1147 reboot_count = WARNING_TIME; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1148 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1149 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
| 2 | 1150 } |
| 1151 | |
| 1152 static void | |
| 1153 set_pi_boot_normal(uint8_t normal) | |
| 1154 { | |
| 22 | 1155 boot_normal_status = normal; |
| 2 | 1156 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
| 1157 if (normal) | |
| 1158 { | |
| 1159 // tristate | |
| 1160 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 1161 } | |
| 1162 else | |
| 1163 { | |
| 1164 // pull it low | |
| 1165 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
| 1166 | |
| 1167 } | |
| 1168 } | |
| 1169 | |
| 1170 static void | |
| 1171 check_flags() | |
| 1172 { | |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1173 if (watchdog_long_hit) |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1174 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1175 // alternate between booting normal and emergency |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1176 if (long_reboot_mode) |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1177 { |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1178 cmd_newboot(); |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1179 } |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1180 long_reboot_mode ^= 1; |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1181 } |
|
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1182 |
| 2 | 1183 if (watchdog_long_hit |
| 1184 || watchdog_short_hit | |
| 1185 || oneshot_hit) | |
| 1186 { | |
| 12 | 1187 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
| 1188 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1189 wait_reboot_pi(); |
| 2 | 1190 } |
| 1191 | |
| 1192 if (newboot_hit) { | |
| 1193 set_pi_boot_normal(0); | |
| 1194 } | |
| 1195 | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1196 if (reboot_hit) { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1197 reboot_pi(); |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1198 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1199 |
| 2 | 1200 watchdog_long_hit = 0; |
| 1201 watchdog_short_hit = 0; | |
| 1202 newboot_hit = 0; | |
| 1203 oneshot_hit = 0; | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1204 reboot_hit = 0; |
| 2 | 1205 } |
| 1206 | |
| 1207 static void | |
| 0 | 1208 do_comms() |
| 1209 { | |
| 1210 // avoid receiving rubbish, perhaps | |
| 1211 uart_on(); | |
| 1212 | |
| 1213 // write sd card here? same 3.3v regulator... | |
| 1214 | |
| 1 | 1215 while (1) |
| 0 | 1216 { |
| 1 | 1217 wdt_reset(); |
| 2 | 1218 |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1219 #ifdef SIM_DEBUG |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1220 if (sim_idx != last_sim_idx) |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1221 { |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1222 last_sim_idx = sim_idx; |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1223 } |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1224 #endif |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1225 |
| 2 | 1226 check_flags(); |
| 1227 | |
| 0 | 1228 if (have_cmd) |
| 1229 { | |
| 1230 have_cmd = 0; | |
| 1231 read_handler(); | |
| 1232 continue; | |
| 1233 } | |
| 1234 | |
| 1235 // wait for commands from the master | |
| 1236 idle_sleep(); | |
| 1237 } | |
| 1238 } | |
| 1239 | |
| 1240 static void | |
| 1241 blink() | |
| 1242 { | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1243 #if 0 |
|
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1244 PORT_ &= ~_BV(PIN_LED); |
| 0 | 1245 _delay_ms(1); |
| 1246 PORT_LED |= _BV(PIN_LED); | |
|
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1247 #endif |
| 0 | 1248 } |
| 1249 | |
| 1250 static void | |
| 22 | 1251 long_delay(uint16_t ms) |
| 0 | 1252 { |
| 22 | 1253 uint16_t iter = ms / 10; |
| 0 | 1254 |
| 22 | 1255 for (uint16_t i = 0; i < iter; i++) |
| 0 | 1256 { |
| 22 | 1257 _delay_ms(10); |
| 0 | 1258 } |
| 1259 } | |
| 1260 | |
| 1261 ISR(BADISR_vect) | |
| 1262 { | |
| 1263 //uart_on(); | |
| 1264 printf_P(PSTR("Bad interrupt\n")); | |
| 1265 } | |
| 1266 | |
| 20 | 1267 // disable watchdog on boot |
| 1268 void wdt_init(void) __attribute__((naked)) __attribute__((section(".init3"))); | |
| 1269 void wdt_init(void) | |
| 1270 { | |
| 1271 MCUSR = 0; | |
| 1272 wdt_disable(); | |
| 1273 } | |
| 1274 | |
| 0 | 1275 int main(void) |
| 1276 { | |
| 17 | 1277 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
| 1278 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
| 20 | 1279 _Static_assert((F_CPU)%(16*(BAUD)) == 0, "baud rate good multiple"); |
|
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1280 |
| 0 | 1281 setup_chip(); |
| 1282 blink(); | |
| 1283 | |
| 1284 stdout = &mystdout; | |
| 1285 uart_on(); | |
| 1286 | |
| 20 | 1287 long_delay(500); |
| 1288 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]\n")); | |
| 0 | 1289 |
| 2 | 1290 set_pi_boot_normal(0); |
| 1291 | |
| 0 | 1292 load_params(); |
| 1293 | |
| 1294 setup_tick_counter(); | |
| 1295 | |
| 1296 sei(); | |
| 1297 | |
| 8 | 1298 #if 0 |
| 1299 // encryption test | |
| 1300 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
| 1301 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
| 12 | 1302 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
| 1303 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
| 1304 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
| 8 | 1305 #endif |
| 1306 | |
| 1 | 1307 // doesn't return |
| 1308 do_comms(); | |
| 0 | 1309 |
| 1310 return 0; /* never reached */ | |
| 1311 } |