Mercurial > pihelp
annotate main.c @ 42:082c8294c86b
get rid of hmac message padding and aes hmac
author | Matt Johnston <matt@ucc.asn.au> |
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date | Sat, 29 Jun 2013 10:36:41 +0800 |
parents | d07aa7644c66 |
children | 69cbf9ce72b5 |
rev | line source |
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0 | 1 #include <stdio.h> |
2 #include <string.h> | |
3 #include <stddef.h> | |
4 #include <stdbool.h> | |
5 #include <stdlib.h> | |
6 #include <avr/io.h> | |
7 #include <avr/interrupt.h> | |
8 #include <avr/sleep.h> | |
9 #include <util/delay.h> | |
10 #include <avr/pgmspace.h> | |
11 #include <avr/eeprom.h> | |
12 #include <avr/wdt.h> | |
13 #include <util/atomic.h> | |
14 #include <util/crc16.h> | |
15 | |
2 | 16 #include "hmac-sha1.h" |
5 | 17 #include "aes.h" |
2 | 18 |
1 | 19 //#include "simple_ds18b20.h" |
20 //#include "onewire.h" | |
0 | 21 |
20 | 22 // not set via bootloader |
23 //LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); | |
5 | 24 |
0 | 25 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
26 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
27 | |
28 // TICK should be 8 or less (8 untested). all timers need | |
29 // to be a multiple. | |
30 | |
1 | 31 #define TICK 1 |
17 | 32 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
5 | 33 #define NKEYS 10 |
34 #define HMACLEN 20 | |
35 #define AESLEN 16 | |
36 #define KEYLEN HMACLEN | |
1 | 37 |
27 | 38 #define BAUD 115200 |
20 | 39 #define UBRR ((F_CPU)/(16*(BAUD))-1) |
0 | 40 |
2 | 41 #define PORT_PI_BOOT PORTD |
42 #define DDR_PI_BOOT DDRD | |
4 | 43 #define PIN_PI_BOOT PD5 |
2 | 44 |
45 #define PORT_PI_RESET PORTD | |
46 #define DDR_PI_RESET DDRD | |
47 #define PIN_PI_RESET PD6 | |
48 | |
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49 #define PORT_PI_WARNING PORTD |
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50 #define DDR_PI_WARNING DDRD |
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51 #define PIN_PI_WARNING PD7 |
0 | 52 |
53 // #define HAVE_UART_ECHO | |
54 | |
7 | 55 // stores a value of clock_epoch combined with the remainder of TCNT1, |
0 | 56 // for 1/32 second accuracy |
57 struct epoch_ticks | |
58 { | |
59 uint32_t ticks; | |
60 // remainder | |
20 | 61 uint16_t rem; |
0 | 62 }; |
63 | |
16 | 64 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
65 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
66 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
67 | |
68 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
69 | |
70 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
71 #define NEWBOOT_MIN (60*2) // 2 minutes | |
72 #define NEWBOOT_MAX (60*30) // 30 mins | |
73 | |
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74 #define WARNING_TIME 10 |
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75 |
1 | 76 // eeprom-settable parameters, default values defined here. |
77 // all timeouts should be a multiple of TICK | |
16 | 78 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
1 | 79 static uint32_t watchdog_short_limit = 0; |
16 | 80 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
0 | 81 |
1 | 82 // avr proves itself |
2 | 83 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
0 | 84 |
85 // ---- Atomic guards required accessing these variables | |
86 // clock_epoch in seconds | |
87 static uint32_t clock_epoch; | |
1 | 88 // watchdog counts up |
89 static uint32_t watchdog_long_count; | |
90 static uint32_t watchdog_short_count; | |
2 | 91 // newboot counts down |
1 | 92 static uint32_t newboot_count; |
2 | 93 // oneshot counts down |
94 static uint32_t oneshot_count; | |
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95 // countdown after the warning. |
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96 static uint8_t reboot_count; |
27 | 97 // set by adc completion interrupt |
98 static uint8_t adc_done; | |
2 | 99 |
0 | 100 // ---- End atomic guards required |
101 | |
102 // boolean flags | |
1 | 103 static uint8_t watchdog_long_hit; |
104 static uint8_t watchdog_short_hit; | |
105 static uint8_t newboot_hit; | |
2 | 106 static uint8_t oneshot_hit; |
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107 static uint8_t reboot_hit; |
0 | 108 |
22 | 109 // informational for status messages |
110 static uint8_t boot_normal_status; | |
111 | |
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112 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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113 // working firmware should boot. set back to 0 for each 'alive' |
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114 // command |
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115 static uint8_t long_reboot_mode = 0; |
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116 |
0 | 117 static uint8_t readpos; |
20 | 118 static char readbuf[150]; |
0 | 119 static uint8_t have_cmd; |
120 | |
121 int uart_putchar(char c, FILE *stream); | |
22 | 122 static void long_delay(uint16_t ms); |
0 | 123 static void blink(); |
124 static uint16_t adc_vcc(); | |
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125 static uint16_t adc_5v(uint16_t vcc); |
20 | 126 static uint16_t adc_temp(); |
2 | 127 static void set_pi_boot_normal(uint8_t normal); |
0 | 128 |
17 | 129 |
0 | 130 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
131 _FDEV_SETUP_WRITE); | |
132 | |
133 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
134 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
135 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
136 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
137 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
138 | |
1 | 139 #define EXPECT_MAGIC 0xdf83 |
0 | 140 |
141 struct __attribute__ ((__packed__)) __eeprom_data { | |
1 | 142 uint32_t watchdog_long_limit; |
143 uint32_t watchdog_short_limit; | |
144 uint32_t newboot_limit; | |
0 | 145 |
2 | 146 uint8_t avr_keys[NKEYS][KEYLEN]; |
0 | 147 |
148 uint16_t magic; | |
149 }; | |
150 | |
151 // Very first setup | |
152 static void | |
153 setup_chip() | |
154 { | |
155 cli(); | |
156 | |
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157 // set to 8 seconds, in case sha1 is slow etc. |
1 | 158 wdt_enable(WDTO_8S); |
159 | |
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160 // Set scaler to /1, -> clock to 8mhz |
0 | 161 CLKPR = _BV(CLKPCE); |
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162 CLKPR = 0; |
0 | 163 |
164 // enable pullups | |
1 | 165 // XXX matt pihelp |
5 | 166 //PORTB = 0xff; // XXX change when using SPI |
167 //PORTD = 0xff; | |
168 //PORTC = 0xff; | |
0 | 169 |
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170 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
0 | 171 |
41 | 172 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
173 | |
5 | 174 #if 0 |
0 | 175 // set pullup |
176 PORTD |= _BV(PD2); | |
177 // INT0 setup | |
178 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
179 EIMSK = _BV(INT0); | |
5 | 180 #endif |
0 | 181 |
182 // comparator disable | |
183 ACSR = _BV(ACD); | |
184 | |
185 // disable adc pin input buffers | |
186 DIDR0 = 0x3F; // acd0-adc5 | |
187 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
188 | |
189 sei(); | |
190 } | |
191 | |
192 static void | |
193 get_epoch_ticks(struct epoch_ticks *t) | |
194 { | |
195 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
196 { | |
197 t->ticks = clock_epoch; | |
7 | 198 t->rem = TCNT1; |
0 | 199 } |
200 } | |
201 | |
202 static void | |
203 setup_tick_counter() | |
204 { | |
2 | 205 // set up counter1 |
206 | |
0 | 207 // set up counter2. |
208 // COM21 COM20 Set OC2 on Compare Match (p116) | |
209 // WGM21 Clear counter on compare | |
210 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
211 // toggle on match | |
2 | 212 TCCR1A = _BV(COM1A0); |
8 | 213 #ifdef SIM_DEBUG |
214 // systemclock/8 | |
215 TCCR1B = _BV(CS11); | |
216 #else | |
20 | 217 // systemclock/256 |
218 TCCR1B = _BV(CS12); | |
8 | 219 #endif |
2 | 220 TCNT1 = 0; |
221 OCR1A = SLEEP_COMPARE; | |
0 | 222 // interrupt |
2 | 223 TIMSK1 = _BV(OCIE1A); |
0 | 224 } |
225 | |
226 static void | |
227 uart_on() | |
228 { | |
229 // Power reduction register | |
230 PRR &= ~_BV(PRUSART0); | |
231 | |
232 // All of this needs to be done each time after turning off the PRR | |
233 // baud rate | |
234 UBRR0H = (unsigned char)(UBRR >> 8); | |
235 UBRR0L = (unsigned char)UBRR; | |
236 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
237 //8N1 | |
238 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
239 } | |
240 | |
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241 #ifdef SIM_DEBUG |
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242 static char sim_out[140]; |
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243 static uint8_t sim_idx = 0; |
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244 static uint8_t last_sim_idx = 0; |
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245 #endif |
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246 |
0 | 247 int |
248 uart_putchar(char c, FILE *stream) | |
249 { | |
250 // XXX could perhaps sleep in the loop for power. | |
251 if (c == '\n') | |
252 { | |
253 loop_until_bit_is_set(UCSR0A, UDRE0); | |
254 UDR0 = '\r'; | |
255 } | |
256 loop_until_bit_is_set(UCSR0A, UDRE0); | |
257 UDR0 = c; | |
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258 #ifdef SIM_DEBUG |
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259 sim_out[sim_idx] = c; |
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260 sim_idx++; |
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261 sim_idx %= sizeof(sim_out); |
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262 #endif |
0 | 263 if (c == '\r') |
264 { | |
265 loop_until_bit_is_set(UCSR0A, UDRE0); | |
266 UDR0 = '\n'; | |
267 } | |
268 return (unsigned char)c; | |
269 } | |
270 | |
20 | 271 static void cmd_reset() __attribute__ ((noreturn)); |
0 | 272 static void |
20 | 273 cmd_reset() |
0 | 274 { |
275 printf_P(PSTR("reset\n")); | |
276 _delay_ms(100); | |
277 cli(); // disable interrupts | |
278 wdt_enable(WDTO_15MS); // enable watchdog | |
279 while(1); // wait for watchdog to reset processor | |
280 } | |
281 | |
2 | 282 static void |
283 cmd_newboot() | |
284 { | |
285 set_pi_boot_normal(1); | |
286 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
287 { | |
288 newboot_count = newboot_limit; | |
289 } | |
20 | 290 printf_P(PSTR("newboot for %d secs\n"), newboot_limit); |
2 | 291 } |
292 | |
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293 static void |
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294 cmd_oldboot() |
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295 { |
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296 set_pi_boot_normal(0); |
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297 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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298 { |
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299 newboot_count = 0; |
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300 } |
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301 printf_P(PSTR("back to old boot\n")); |
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302 } |
1 | 303 |
0 | 304 |
305 static void | |
20 | 306 cmd_status() |
0 | 307 { |
2 | 308 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
20 | 309 struct epoch_ticks t; |
310 | |
311 get_epoch_ticks(&t); | |
312 | |
1 | 313 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
314 { | |
2 | 315 cur_watchdog_long = watchdog_long_count; |
316 cur_watchdog_short = watchdog_short_count; | |
317 cur_newboot = newboot_count; | |
318 cur_oneshot = oneshot_count; | |
1 | 319 } |
320 | |
20 | 321 printf_P(PSTR("limit (current)\n" |
322 "watchdog_long %lu (%lu) watchdog newboot mode %d\n" | |
323 "watchdog_short %lu (%lu)\n" | |
324 "newboot %lu (%lu)\n" | |
325 "oneshot (%lu)\n" | |
326 "uptime %lu rem %u\n" | |
22 | 327 "boot normal %hhu\n" |
20 | 328 ), |
329 watchdog_long_limit, cur_watchdog_long, long_reboot_mode, | |
330 watchdog_short_limit, cur_watchdog_short, | |
331 newboot_limit, cur_newboot, | |
332 cur_oneshot, | |
22 | 333 t.ticks, t.rem, |
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334 boot_normal_status |
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335 ); |
0 | 336 } |
337 | |
338 static void | |
1 | 339 cmd_set_params(const char *params) |
0 | 340 { |
1 | 341 uint32_t new_watchdog_long_limit; |
342 uint32_t new_watchdog_short_limit; | |
343 uint32_t new_newboot_limit; | |
344 | |
345 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
346 &new_watchdog_long_limit, | |
347 &new_watchdog_short_limit, | |
348 &new_newboot_limit); | |
349 | |
350 if (ret != 3) | |
0 | 351 { |
1 | 352 printf_P(PSTR("Bad values\n")); |
353 } | |
354 else | |
355 { | |
356 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
357 { | |
358 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
359 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
360 eeprom_write(new_newboot_limit, newboot_limit); | |
361 uint16_t magic = EXPECT_MAGIC; | |
362 eeprom_write(magic, magic); | |
0 | 363 } |
1 | 364 printf_P(PSTR("set_params for next boot\n")); |
365 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
366 new_watchdog_long_limit, | |
367 new_watchdog_short_limit, | |
368 new_newboot_limit); | |
369 } | |
370 } | |
0 | 371 |
35 | 372 // returns 1 if they are equal, timing independent |
373 static uint8_t | |
374 safe_mem_eq(const uint8_t *a, const uint8_t *b, int len) | |
375 { | |
376 uint8_t result = 0; | |
377 for (int i = 0; i < len; i++) | |
378 { | |
379 result |= a[i] ^ b[i]; | |
380 } | |
381 return result == 0; | |
382 } | |
383 | |
384 // returns 1 if they are equal | |
385 static uint8_t | |
386 safe_str_eq(const char *a, const char *b) | |
387 { | |
388 int la = strlen(a); | |
389 if (la != strlen(b)) | |
390 { | |
391 return 0; | |
392 } | |
393 return safe_mem_eq((const uint8_t*)a, (const uint8_t*)b, la); | |
394 } | |
395 | |
1 | 396 uint8_t from_hex(char c) |
397 { | |
398 if (c >= '0' && c <= '9') { | |
399 return c-'0'; | |
400 } | |
401 if (c >= 'a' && c <= 'f') { | |
402 return c-'a' + 0xa; | |
403 } | |
404 if (c >= 'A' && c <= 'F') { | |
405 return c-'A' + 0xa; | |
406 } | |
407 return 0; | |
408 } | |
409 | |
2 | 410 static void |
411 printhex_nibble(const unsigned char b, FILE *stream) | |
412 { | |
413 unsigned char c = b & 0x0f; | |
414 if ( c > 9 ) { | |
415 c += 'A'-10; | |
416 } | |
417 else { | |
418 c += '0'; | |
419 } | |
420 fputc(c, stream); | |
421 } | |
422 | |
423 void | |
424 printhex_byte(const unsigned char b, FILE *stream) | |
425 { | |
426 printhex_nibble( b >> 4, stream); | |
427 printhex_nibble( b, stream); | |
428 } | |
429 | |
430 void | |
431 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
432 { | |
433 for (uint8_t i = 0; i < n; i++) | |
434 { | |
435 printhex_byte(id[i], stream); | |
436 } | |
437 } | |
438 | |
439 static int8_t | |
5 | 440 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
441 uint8_t bytes_len) | |
2 | 442 { |
443 // "N HEXKEY" | |
5 | 444 if (strlen(params) != bytes_len*2 + 2) { |
20 | 445 printf_P(PSTR("Wrong length key. wanted %d, got %d, '%s'\n"), |
446 bytes_len*2+2, strlen(params), params); | |
2 | 447 return -1; |
448 } | |
449 | |
450 if (params[1] != ' ') | |
451 { | |
452 printf_P(PSTR("Missing space\n")); | |
453 return -1; | |
454 } | |
455 | |
456 *key_index = from_hex(params[0]); | |
457 if (*key_index >= NKEYS) | |
458 { | |
459 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
460 return -1; | |
461 } | |
462 | |
5 | 463 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
2 | 464 { |
465 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
466 } | |
467 return 0; | |
468 } | |
469 | |
1 | 470 static void |
471 cmd_set_avr_key(const char *params) | |
472 { | |
2 | 473 uint8_t new_key[KEYLEN]; |
474 uint8_t key_index; | |
5 | 475 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
2 | 476 { |
1 | 477 return; |
0 | 478 } |
2 | 479 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
8 | 480 #ifndef SIM_DEBUG |
2 | 481 eeprom_write(avr_keys, avr_keys); |
8 | 482 #endif |
20 | 483 printf_P(PSTR("Set key %d: "), key_index); |
484 printhex(new_key, sizeof(new_key), stdout); | |
485 putchar('\n'); | |
2 | 486 } |
487 | |
488 static void | |
489 cmd_hmac(const char *params) | |
490 { | |
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491 uint8_t indata[HMACLEN]; |
7 | 492 uint8_t outdata[HMACLEN]; |
2 | 493 uint8_t key_index; |
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494 if (parse_key(params, &key_index, indata, HMACLEN) != 0) |
2 | 495 { |
496 printf_P(PSTR("FAIL: Bad input\n")); | |
5 | 497 return; |
2 | 498 } |
0 | 499 |
8 | 500 #ifndef SIM_DEBUG |
5 | 501 long_delay(200); |
8 | 502 #endif |
5 | 503 |
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504 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
2 | 505 printf_P(PSTR("HMAC: ")); |
7 | 506 printhex(outdata, HMACLEN, stdout); |
20 | 507 putchar('\n'); |
5 | 508 } |
509 | |
510 static void | |
511 cmd_decrypt(const char *params) | |
512 { | |
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513 uint8_t indata[AESLEN]; |
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514 uint8_t output[AESLEN]; |
5 | 515 uint8_t key_index; |
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516 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
5 | 517 { |
518 printf_P(PSTR("FAIL: Bad input\n")); | |
519 return; | |
520 } | |
521 | |
8 | 522 #ifndef SIM_DEBUG |
5 | 523 long_delay(200); |
8 | 524 #endif |
7 | 525 |
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526 uint8_t tmpbuf[256]; |
27 | 527 aesInit(avr_keys[key_index], tmpbuf); |
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528 aesDecrypt(indata, NULL); |
5 | 529 |
530 printf_P(PSTR("DECRYPTED: ")); | |
531 printhex(output, AESLEN, stdout); | |
20 | 532 putchar('\n'); |
2 | 533 } |
534 | |
535 static void | |
536 cmd_oneshot_reboot(const char *params) | |
537 { | |
538 uint32_t new_delay = strtoul(params, NULL, 10); | |
539 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
1 | 540 { |
2 | 541 oneshot_count = new_delay; |
1 | 542 } |
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543 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
0 | 544 } |
545 | |
546 static void | |
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547 clamp_params() |
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548 { |
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549 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
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550 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
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551 { |
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552 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
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553 } |
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554 |
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555 if (watchdog_short_limit != 0 |
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556 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
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557 { |
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558 watchdog_short_limit = 0; |
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559 } |
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560 |
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561 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
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562 { |
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563 newboot_limit = NEWBOOT_DEFAULT; |
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564 } |
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565 } |
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566 |
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567 static void |
0 | 568 load_params() |
569 { | |
570 uint16_t magic; | |
571 eeprom_read(magic, magic); | |
572 if (magic == EXPECT_MAGIC) | |
573 { | |
1 | 574 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
575 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
2 | 576 eeprom_read(newboot_limit, newboot_limit); |
1 | 577 } |
2 | 578 |
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579 clamp_params(); |
16 | 580 |
2 | 581 eeprom_read(avr_keys, avr_keys); |
0 | 582 } |
583 | |
2 | 584 static void |
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585 cmd_alive() |
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586 { |
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587 printf_P(PSTR("Ah, good.\n")); |
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588 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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589 { |
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590 watchdog_long_count = 0; |
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591 watchdog_short_count = 0; |
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592 } |
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593 long_reboot_mode = 0; |
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594 } |
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595 |
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596 static void |
35 | 597 cmd_poke() |
598 { | |
599 printf_P(PSTR("Ah, good.\n")); | |
600 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
601 { | |
602 watchdog_short_count = 0; | |
603 } | |
604 } | |
605 | |
606 static void | |
2 | 607 cmd_vcc() |
0 | 608 { |
2 | 609 uint16_t vcc = adc_vcc(); |
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610 uint16_t v5 = adc_5v(vcc); |
21 | 611 uint16_t temp = adc_temp(); |
612 // roughly? | |
613 uint16_t temp_deg = temp - 290; | |
614 printf_P(PSTR("vcc: %u mV\n" | |
615 "5v: %u mV\n" | |
26 | 616 "temp: %u mV (%dºC)\n" |
617 ), | |
27 | 618 vcc, v5, temp, temp_deg); |
0 | 619 } |
620 | |
20 | 621 |
27 | 622 void(*bootloader)() __attribute__ ((noreturn)) = (void*)0x7800; |
623 | |
20 | 624 #ifndef PROG_PASSWORD |
625 #define PROG_PASSWORD "Y2vvjxO5" | |
626 #endif | |
627 | |
628 static void | |
629 cmd_prog(const char* arg) | |
630 { | |
36 | 631 if (!safe_str_eq(arg, PROG_PASSWORD)) |
20 | 632 { |
633 printf_P(PSTR("Bad prog password\n")); | |
634 return; | |
635 } | |
636 | |
36 | 637 printf_P(PSTR("Programming...\n")); |
638 long_delay(100); | |
639 | |
20 | 640 // disable wdt |
641 wdt_disable(); | |
41 | 642 MCUSR = 0; |
20 | 643 |
644 // disable interrupts | |
645 TIMSK0 = 0; | |
646 TIMSK1 = 0; | |
647 TIMSK2 = 0; | |
648 EIMSK = 0; | |
649 PCMSK0 = 0; | |
650 PCMSK1 = 0; | |
651 PCMSK2 = 0; | |
652 ACSR &= ~_BV(ACIE); | |
653 ADCSRA &= ~_BV(ADIE); | |
654 UCSR0B &= ~_BV(RXCIE0); | |
655 UCSR0B &= _BV(TXCIE0); | |
656 // doesn't do TWI, other uart, probably others | |
657 | |
658 _delay_ms(20); | |
659 | |
660 bootloader(); | |
661 } | |
27 | 662 |
663 | |
664 static void | |
665 adc_sleep() | |
666 { | |
667 set_sleep_mode(SLEEP_MODE_IDLE); | |
668 sleep_mode(); | |
669 } | |
670 | |
671 #define BITSET(v, n) (((v) >> (n)) & 1) | |
672 | |
673 static inline uint8_t | |
674 popcnt(uint8_t v) | |
675 { | |
676 return BITSET(v, 0) | |
677 + BITSET(v, 1) | |
678 + BITSET(v, 2) | |
679 + BITSET(v, 3) | |
680 + BITSET(v, 4) | |
681 + BITSET(v, 5) | |
682 + BITSET(v, 6) | |
683 + BITSET(v, 7); | |
684 } | |
685 | |
686 static uint8_t | |
687 adc_bit() | |
688 { | |
689 ADCSRA |= _BV(ADSC); | |
690 loop_until_bit_is_clear(ADCSRA, ADSC); | |
691 uint8_t low = ADCL; | |
692 uint8_t high = ADCH; | |
35 | 693 uint8_t ret = (popcnt(low)&1) ^ (popcnt(high)&1); |
694 return ret; | |
27 | 695 } |
696 | |
697 static void | |
698 adc_random(uint8_t admux, | |
699 uint8_t *out, uint16_t num, uint32_t *tries) | |
700 { | |
701 PRR &= ~_BV(PRADC); | |
702 // /16 prescaler for 691mhz, no interrupt | |
703 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
704 | |
35 | 705 ADMUX = admux; |
706 | |
27 | 707 *tries = 0; |
708 for (int i = 0; i < num; i++) | |
709 { | |
35 | 710 uint8_t ret = 0; |
711 uint8_t count = 0; | |
712 | |
27 | 713 while (count <= 7) |
714 { | |
715 (*tries)++; | |
716 | |
717 // Von Neumann extractor | |
718 uint8_t one = adc_bit(); | |
719 uint8_t two = adc_bit(); | |
720 if (one == two) | |
721 { | |
722 continue; | |
723 } | |
724 ret |= one << count; | |
725 count++; | |
726 } | |
727 out[i] = ret; | |
728 } | |
729 ADCSRA = 0; | |
730 PRR |= _BV(PRADC); | |
731 } | |
732 | |
733 ISR(ADC_vect) | |
734 { | |
735 adc_done = 1; | |
736 } | |
737 | |
738 static void | |
739 adc_generic(uint8_t admux, uint8_t *ret_num, uint16_t *ret_sum) | |
740 { | |
741 PRR &= ~_BV(PRADC); | |
742 | |
31 | 743 // /128 prescaler (86kHz), interrupt |
744 ADCSRA = _BV(ADEN) | |
745 | _BV(ADPS2) | _BV(ADPS1) | _BV(ADPS0) | |
746 | _BV(ADIE); | |
27 | 747 |
748 // set to measure 1.1 reference | |
749 ADMUX = admux; | |
750 | |
751 // delay after setting reference etc, allow settling | |
752 long_delay(300); | |
753 // average a number of samples | |
754 uint16_t sum = 0; | |
755 uint8_t num = 0; | |
756 for (uint8_t n = 0; n < 20; n++) | |
757 { | |
758 while (1) | |
759 { | |
760 adc_done = 0; | |
761 ADCSRA |= _BV(ADSC); | |
762 adc_sleep(); | |
763 | |
764 uint8_t done; | |
765 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
766 { | |
767 done = adc_done; | |
768 } | |
769 if (done) | |
770 { | |
771 break; | |
772 } | |
773 } | |
774 | |
775 uint8_t low_11 = ADCL; | |
776 uint8_t high_11 = ADCH; | |
777 uint16_t val = low_11 + (high_11 << 8); | |
778 | |
779 if (n >= 4) | |
780 { | |
781 sum += val; | |
782 num++; | |
783 } | |
784 } | |
785 ADCSRA = 0; | |
786 PRR |= _BV(PRADC); | |
787 | |
788 *ret_num = num; | |
789 *ret_sum = sum; | |
790 } | |
791 | |
792 static uint16_t | |
793 adc_vcc() | |
794 { | |
795 const uint8_t mux = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
796 uint16_t sum; | |
797 uint8_t num; | |
798 | |
799 adc_generic(mux, &num, &sum); | |
800 | |
801 //float res_volts = 1.1 * 1024 * num / sum; | |
802 //return 1000 * res_volts; | |
803 return ((uint32_t)1100*1024*num) / sum; | |
804 } | |
805 | |
806 #define SCALER_5V 2 | |
807 | |
808 static uint16_t | |
809 adc_5v(uint16_t vcc) | |
810 { | |
811 // set to measure ADC4 against AVCC | |
812 const uint8_t mux = _BV(REFS0) | _BV(MUX2); | |
813 uint16_t sum; | |
814 uint8_t num; | |
815 | |
816 adc_generic(mux, &num, &sum); | |
817 | |
818 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024)); | |
819 } | |
820 | |
821 static uint16_t | |
822 adc_temp() | |
823 { | |
824 // set to measure temperature against 1.1v reference. | |
825 const uint8_t mux = _BV(REFS0) | _BV(REFS1) | _BV(MUX3); | |
826 uint16_t sum; | |
827 uint8_t num; | |
828 | |
829 adc_generic(mux, &num, &sum); | |
830 | |
831 // return the voltage | |
832 | |
833 return ((uint32_t)1100*sum) / (num*1024); | |
834 } | |
835 | |
836 static void | |
837 cmd_random(const char* params) | |
838 { | |
839 uint8_t admux; | |
840 uint16_t num; | |
841 uint8_t buf[100]; | |
842 | |
843 int ret = sscanf_P(params, PSTR("%hhu %u"), | |
844 &admux, &num); | |
845 if (!ret) | |
846 { | |
847 printf_P(PSTR("Bad arguments\n")); | |
848 return; | |
849 } | |
850 uint32_t tries = 0; | |
851 printf_P(PSTR("output: ")); | |
852 for (int i = 0; i < num; i+= sizeof(buf)) | |
853 { | |
854 uint32_t t; | |
855 uint16_t nr = MIN(num-i, sizeof(buf)); | |
856 adc_random(admux, buf, nr, &t); | |
857 printhex(buf, nr, stdout); | |
858 tries += t; | |
859 } | |
860 putchar('\n'); | |
861 printf_P(PSTR("%ld tries\n"), tries); | |
862 } | |
863 | |
864 | |
20 | 865 |
0 | 866 static void |
867 read_handler() | |
868 { | |
17 | 869 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
870 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
871 | |
872 LOCAL_PSTR(set_params); | |
873 LOCAL_PSTR(set_key); | |
874 LOCAL_PSTR(oneshot); | |
875 LOCAL_PSTR(hmac); | |
876 LOCAL_PSTR(decrypt); | |
877 LOCAL_PSTR(alive); | |
35 | 878 LOCAL_PSTR(poke); |
17 | 879 LOCAL_PSTR(vcc); |
880 LOCAL_PSTR(reset); | |
881 LOCAL_PSTR(newboot); | |
882 LOCAL_PSTR(oldboot); | |
20 | 883 LOCAL_PSTR(status); |
27 | 884 LOCAL_PSTR(random); |
885 LOCAL_PSTR(prog); | |
17 | 886 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); |
887 LOCAL_HELP(set_key, "20_byte_hex>"); | |
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888 LOCAL_HELP(oneshot, "<timeout>"); |
27 | 889 LOCAL_HELP(prog, "<password>"); |
890 LOCAL_HELP(random, "<admux> <nbytes>"); | |
17 | 891 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
892 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
893 | |
894 static const struct handler { | |
895 PGM_P name; | |
896 void(*cmd)(const char *param); | |
897 // existence of arg_help indicates if the cmd takes a parameter. | |
898 PGM_P arg_help; | |
20 | 899 } handlers[] PROGMEM = |
17 | 900 { |
20 | 901 {alive_str, cmd_alive, NULL}, |
35 | 902 {poke_str, cmd_poke, NULL}, |
20 | 903 {newboot_str, cmd_newboot, NULL}, |
904 {oldboot_str, cmd_oldboot, NULL}, | |
905 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, | |
906 {status_str, cmd_status, NULL}, | |
907 {hmac_str, cmd_hmac, hmac_help}, | |
908 {decrypt_str, cmd_decrypt, decrypt_help}, | |
17 | 909 {set_params_str, cmd_set_params, set_params_help}, |
910 {set_key_str, cmd_set_avr_key, set_key_help}, | |
27 | 911 {random_str, cmd_random, random_help}, |
17 | 912 {vcc_str, cmd_vcc, NULL}, |
913 {reset_str, cmd_reset, NULL}, | |
27 | 914 {prog_str, cmd_prog, prog_help}, |
17 | 915 }; |
916 | |
917 if (readbuf[0] == '\0') | |
918 { | |
919 return; | |
920 } | |
921 | |
18
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922 if (strcmp_P(readbuf, PSTR("help")) == 0) |
17 | 923 { |
924 printf_P(PSTR("Commands:---\n")); | |
925 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
926 { | |
927 struct handler h; | |
928 memcpy_P(&h, &handlers[i], sizeof(h)); | |
929 printf_P(h.name); | |
930 if (h.arg_help) | |
931 { | |
932 putchar(' '); | |
933 printf_P(h.arg_help); | |
934 } | |
935 putchar('\n'); | |
936 }; | |
937 printf_P(PSTR("---\n")); | |
18
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938 return; |
17 | 939 } |
940 | |
941 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
942 { | |
943 struct handler h; | |
944 memcpy_P(&h, &handlers[i], sizeof(h)); | |
945 | |
946 const int h_len = strlen_P(h.name); | |
947 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
948 { | |
949 if (h.arg_help) | |
950 { | |
951 if (readbuf[h_len] == ' ') | |
952 { | |
18
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953 h.cmd(&readbuf[h_len+1]); |
17 | 954 return; |
955 } | |
956 } | |
957 else | |
958 { | |
959 if (readbuf[h_len] == '\0') | |
960 { | |
18
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|
961 void(*void_cmd)() = h.cmd; |
17 | 962 void_cmd(); |
963 return; | |
964 } | |
965 } | |
966 } | |
967 } | |
968 | |
969 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
0 | 970 } |
971 | |
972 ISR(INT0_vect) | |
973 { | |
974 blink(); | |
975 _delay_ms(100); | |
976 blink(); | |
977 } | |
978 | |
979 ISR(USART_RX_vect) | |
980 { | |
981 char c = UDR0; | |
982 #ifdef HAVE_UART_ECHO | |
983 uart_putchar(c, NULL); | |
984 #endif | |
985 if (c == '\r' || c == '\n') | |
986 { | |
987 if (readpos > 0) | |
988 { | |
989 readbuf[readpos] = '\0'; | |
990 have_cmd = 1; | |
991 readpos = 0; | |
992 } | |
993 } | |
994 else | |
995 { | |
996 readbuf[readpos] = c; | |
997 readpos++; | |
998 if (readpos >= sizeof(readbuf)) | |
999 { | |
1000 readpos = 0; | |
1001 } | |
1002 } | |
1003 } | |
1004 | |
2 | 1005 ISR(TIMER1_COMPA_vect) |
0 | 1006 { |
2 | 1007 TCNT1 = 0; |
0 | 1008 |
1009 clock_epoch += TICK; | |
1010 | |
1 | 1011 // watchdogs count up, continuous |
1012 if (watchdog_long_limit > 0) { | |
2 | 1013 watchdog_long_count += TICK; |
1 | 1014 if (watchdog_long_count >= watchdog_long_limit) |
1015 { | |
1016 watchdog_long_count = 0; | |
1017 watchdog_long_hit = 1; | |
1018 } | |
0 | 1019 } |
1020 | |
1 | 1021 if (watchdog_short_limit > 0) { |
2 | 1022 watchdog_short_count += TICK; |
1 | 1023 if (watchdog_short_count >= watchdog_short_limit) |
1024 { | |
1025 watchdog_short_count = 0; | |
1026 watchdog_short_hit = 1; | |
1027 } | |
0 | 1028 } |
1029 | |
2 | 1030 // newboot counts down |
1 | 1031 if (newboot_count > 0) |
0 | 1032 { |
2 | 1033 newboot_count-=TICK; |
1034 if (newboot_count <= 0) | |
1 | 1035 { |
1036 newboot_hit = 1; | |
2 | 1037 newboot_count = 0; |
1 | 1038 } |
0 | 1039 } |
1 | 1040 |
2 | 1041 if (oneshot_count > 0) |
1042 { | |
1043 oneshot_count-=TICK; | |
1044 if (oneshot_count <= 0) | |
1045 { | |
1046 oneshot_hit = 1; | |
1047 oneshot_count = 0; | |
1048 } | |
1049 } | |
18
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1050 |
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1051 if (reboot_count > 0) |
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1052 { |
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1053 reboot_count -= TICK; |
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1054 if (reboot_count <= 0) |
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1055 { |
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1056 reboot_hit = 1; |
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1057 reboot_count = 0; |
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1058 } |
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1059 } |
0 | 1060 } |
1061 | |
1062 static void | |
1063 idle_sleep() | |
1064 { | |
1065 set_sleep_mode(SLEEP_MODE_IDLE); | |
1066 sleep_mode(); | |
1067 } | |
1068 | |
21 | 1069 static void |
2 | 1070 reboot_pi() |
1071 { | |
18
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1072 printf_P(PSTR("Real reboot now\n")); |
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1073 // pull it low for 200ms |
2 | 1074 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
1075 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
18
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1076 _delay_ms(200); |
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1077 |
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1078 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
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1079 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
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1080 } |
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1081 |
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1082 static void |
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1083 wait_reboot_pi() |
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1084 { |
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1085 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
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1086 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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1087 { |
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1088 reboot_count = WARNING_TIME; |
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1089 } |
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|
1090 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
2 | 1091 } |
1092 | |
1093 static void | |
1094 set_pi_boot_normal(uint8_t normal) | |
1095 { | |
22 | 1096 boot_normal_status = normal; |
2 | 1097 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
1098 if (normal) | |
1099 { | |
1100 // tristate | |
1101 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
1102 } | |
1103 else | |
1104 { | |
1105 // pull it low | |
1106 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
1107 } | |
1108 } | |
1109 | |
1110 static void | |
1111 check_flags() | |
1112 { | |
15
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1113 if (watchdog_long_hit) |
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1114 { |
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1115 // alternate between booting normal and emergency |
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|
1116 if (long_reboot_mode) |
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1117 { |
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|
1118 cmd_newboot(); |
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1119 } |
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|
1120 long_reboot_mode ^= 1; |
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1121 } |
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|
1122 |
2 | 1123 if (watchdog_long_hit |
1124 || watchdog_short_hit | |
1125 || oneshot_hit) | |
1126 { | |
12 | 1127 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
1128 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
18
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diff
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1129 wait_reboot_pi(); |
2 | 1130 } |
1131 | |
1132 if (newboot_hit) { | |
1133 set_pi_boot_normal(0); | |
1134 } | |
1135 | |
18
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1136 if (reboot_hit) { |
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1137 reboot_pi(); |
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1138 } |
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1139 |
2 | 1140 watchdog_long_hit = 0; |
1141 watchdog_short_hit = 0; | |
1142 newboot_hit = 0; | |
1143 oneshot_hit = 0; | |
18
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1144 reboot_hit = 0; |
2 | 1145 } |
1146 | |
1147 static void | |
0 | 1148 do_comms() |
1149 { | |
1150 // avoid receiving rubbish, perhaps | |
1151 uart_on(); | |
1152 | |
1153 // write sd card here? same 3.3v regulator... | |
1154 | |
1 | 1155 while (1) |
0 | 1156 { |
1 | 1157 wdt_reset(); |
2 | 1158 |
18
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1159 #ifdef SIM_DEBUG |
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1160 if (sim_idx != last_sim_idx) |
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1161 { |
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1162 last_sim_idx = sim_idx; |
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1163 } |
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1164 #endif |
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1165 |
2 | 1166 check_flags(); |
1167 | |
0 | 1168 if (have_cmd) |
1169 { | |
1170 have_cmd = 0; | |
1171 read_handler(); | |
1172 continue; | |
1173 } | |
1174 | |
1175 // wait for commands from the master | |
1176 idle_sleep(); | |
1177 } | |
1178 } | |
1179 | |
1180 static void | |
1181 blink() | |
1182 { | |
18
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1183 #if 0 |
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1184 PORT_ &= ~_BV(PIN_LED); |
0 | 1185 _delay_ms(1); |
1186 PORT_LED |= _BV(PIN_LED); | |
18
021e6e0006f4
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1187 #endif |
0 | 1188 } |
1189 | |
1190 static void | |
22 | 1191 long_delay(uint16_t ms) |
0 | 1192 { |
22 | 1193 uint16_t iter = ms / 10; |
0 | 1194 |
22 | 1195 for (uint16_t i = 0; i < iter; i++) |
0 | 1196 { |
22 | 1197 _delay_ms(10); |
0 | 1198 } |
1199 } | |
1200 | |
1201 ISR(BADISR_vect) | |
1202 { | |
1203 //uart_on(); | |
1204 printf_P(PSTR("Bad interrupt\n")); | |
1205 } | |
1206 | |
20 | 1207 // disable watchdog on boot |
1208 void wdt_init(void) __attribute__((naked)) __attribute__((section(".init3"))); | |
1209 void wdt_init(void) | |
1210 { | |
1211 MCUSR = 0; | |
1212 wdt_disable(); | |
1213 } | |
1214 | |
0 | 1215 int main(void) |
1216 { | |
17 | 1217 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
1218 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
20 | 1219 _Static_assert((F_CPU)%(16*(BAUD)) == 0, "baud rate good multiple"); |
15
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1220 |
0 | 1221 setup_chip(); |
1222 blink(); | |
1223 | |
1224 stdout = &mystdout; | |
1225 uart_on(); | |
1226 | |
20 | 1227 long_delay(500); |
1228 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]\n")); | |
0 | 1229 |
2 | 1230 set_pi_boot_normal(0); |
1231 | |
0 | 1232 load_params(); |
1233 | |
1234 setup_tick_counter(); | |
1235 | |
1236 sei(); | |
1237 | |
8 | 1238 #if 0 |
1239 // encryption test | |
1240 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
1241 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
12 | 1242 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
1243 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
1244 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
8 | 1245 #endif |
1246 | |
1 | 1247 // doesn't return |
1248 do_comms(); | |
0 | 1249 |
1250 return 0; /* never reached */ | |
1251 } |