Mercurial > pihelp
annotate main.c @ 43:69cbf9ce72b5
bring back testsd
| author | Matt Johnston <matt@ucc.asn.au> |
|---|---|
| date | Sat, 29 Jun 2013 10:42:34 +0800 |
| parents | 082c8294c86b |
| children | a0f2fcc6d9dd |
| rev | line source |
|---|---|
| 0 | 1 #include <stdio.h> |
| 2 #include <string.h> | |
| 3 #include <stddef.h> | |
| 4 #include <stdbool.h> | |
| 5 #include <stdlib.h> | |
| 6 #include <avr/io.h> | |
| 7 #include <avr/interrupt.h> | |
| 8 #include <avr/sleep.h> | |
| 9 #include <util/delay.h> | |
| 10 #include <avr/pgmspace.h> | |
| 11 #include <avr/eeprom.h> | |
| 12 #include <avr/wdt.h> | |
| 13 #include <util/atomic.h> | |
| 14 #include <util/crc16.h> | |
| 15 | |
| 2 | 16 #include "hmac-sha1.h" |
| 5 | 17 #include "aes.h" |
| 2 | 18 |
| 43 | 19 #include "fat.h" |
| 20 #include "fat_config.h" | |
| 21 #include "partition.h" | |
| 22 #include "sd_raw.h" | |
| 23 #include "sd_raw_config.h" | |
| 24 | |
| 1 | 25 //#include "simple_ds18b20.h" |
| 26 //#include "onewire.h" | |
| 0 | 27 |
| 20 | 28 // not set via bootloader |
| 29 //LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); | |
| 5 | 30 |
| 0 | 31 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
| 32 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
| 33 | |
| 34 // TICK should be 8 or less (8 untested). all timers need | |
| 35 // to be a multiple. | |
| 36 | |
| 1 | 37 #define TICK 1 |
| 17 | 38 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
| 5 | 39 #define NKEYS 10 |
| 40 #define HMACLEN 20 | |
| 41 #define AESLEN 16 | |
| 42 #define KEYLEN HMACLEN | |
| 1 | 43 |
| 27 | 44 #define BAUD 115200 |
| 20 | 45 #define UBRR ((F_CPU)/(16*(BAUD))-1) |
| 0 | 46 |
| 2 | 47 #define PORT_PI_BOOT PORTD |
| 48 #define DDR_PI_BOOT DDRD | |
| 4 | 49 #define PIN_PI_BOOT PD5 |
| 2 | 50 |
| 51 #define PORT_PI_RESET PORTD | |
| 52 #define DDR_PI_RESET DDRD | |
| 53 #define PIN_PI_RESET PD6 | |
| 54 | |
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55 #define PORT_PI_WARNING PORTD |
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56 #define DDR_PI_WARNING DDRD |
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57 #define PIN_PI_WARNING PD7 |
| 0 | 58 |
| 59 // #define HAVE_UART_ECHO | |
| 60 | |
| 7 | 61 // stores a value of clock_epoch combined with the remainder of TCNT1, |
| 0 | 62 // for 1/32 second accuracy |
| 63 struct epoch_ticks | |
| 64 { | |
| 65 uint32_t ticks; | |
| 66 // remainder | |
| 20 | 67 uint16_t rem; |
| 0 | 68 }; |
| 69 | |
| 16 | 70 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
| 71 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
| 72 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
| 73 | |
| 74 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
| 75 | |
| 76 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
| 77 #define NEWBOOT_MIN (60*2) // 2 minutes | |
| 78 #define NEWBOOT_MAX (60*30) // 30 mins | |
| 79 | |
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80 #define WARNING_TIME 10 |
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81 |
| 1 | 82 // eeprom-settable parameters, default values defined here. |
| 83 // all timeouts should be a multiple of TICK | |
| 16 | 84 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
| 1 | 85 static uint32_t watchdog_short_limit = 0; |
| 16 | 86 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
| 0 | 87 |
| 1 | 88 // avr proves itself |
| 2 | 89 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
| 0 | 90 |
| 91 // ---- Atomic guards required accessing these variables | |
| 92 // clock_epoch in seconds | |
| 93 static uint32_t clock_epoch; | |
| 1 | 94 // watchdog counts up |
| 95 static uint32_t watchdog_long_count; | |
| 96 static uint32_t watchdog_short_count; | |
| 2 | 97 // newboot counts down |
| 1 | 98 static uint32_t newboot_count; |
| 2 | 99 // oneshot counts down |
| 100 static uint32_t oneshot_count; | |
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101 // countdown after the warning. |
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102 static uint8_t reboot_count; |
| 27 | 103 // set by adc completion interrupt |
| 104 static uint8_t adc_done; | |
| 2 | 105 |
| 0 | 106 // ---- End atomic guards required |
| 107 | |
| 108 // boolean flags | |
| 1 | 109 static uint8_t watchdog_long_hit; |
| 110 static uint8_t watchdog_short_hit; | |
| 111 static uint8_t newboot_hit; | |
| 2 | 112 static uint8_t oneshot_hit; |
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113 static uint8_t reboot_hit; |
| 0 | 114 |
| 22 | 115 // informational for status messages |
| 116 static uint8_t boot_normal_status; | |
| 117 | |
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118 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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119 // working firmware should boot. set back to 0 for each 'alive' |
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120 // command |
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121 static uint8_t long_reboot_mode = 0; |
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122 |
| 0 | 123 static uint8_t readpos; |
| 20 | 124 static char readbuf[150]; |
| 0 | 125 static uint8_t have_cmd; |
| 126 | |
| 127 int uart_putchar(char c, FILE *stream); | |
| 22 | 128 static void long_delay(uint16_t ms); |
| 0 | 129 static void blink(); |
| 130 static uint16_t adc_vcc(); | |
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131 static uint16_t adc_5v(uint16_t vcc); |
| 20 | 132 static uint16_t adc_temp(); |
| 2 | 133 static void set_pi_boot_normal(uint8_t normal); |
| 0 | 134 |
| 17 | 135 |
| 0 | 136 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
| 137 _FDEV_SETUP_WRITE); | |
| 138 | |
| 139 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
| 140 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
| 141 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
| 142 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
| 143 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
| 144 | |
| 1 | 145 #define EXPECT_MAGIC 0xdf83 |
| 0 | 146 |
| 147 struct __attribute__ ((__packed__)) __eeprom_data { | |
| 1 | 148 uint32_t watchdog_long_limit; |
| 149 uint32_t watchdog_short_limit; | |
| 150 uint32_t newboot_limit; | |
| 0 | 151 |
| 2 | 152 uint8_t avr_keys[NKEYS][KEYLEN]; |
| 0 | 153 |
| 154 uint16_t magic; | |
| 155 }; | |
| 156 | |
| 157 // Very first setup | |
| 158 static void | |
| 159 setup_chip() | |
| 160 { | |
| 161 cli(); | |
| 162 | |
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163 // set to 8 seconds, in case sha1 is slow etc. |
| 1 | 164 wdt_enable(WDTO_8S); |
| 165 | |
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166 // Set scaler to /1, -> clock to 8mhz |
| 0 | 167 CLKPR = _BV(CLKPCE); |
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168 CLKPR = 0; |
| 0 | 169 |
| 170 // enable pullups | |
| 1 | 171 // XXX matt pihelp |
| 5 | 172 //PORTB = 0xff; // XXX change when using SPI |
| 173 //PORTD = 0xff; | |
| 174 //PORTC = 0xff; | |
| 0 | 175 |
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176 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
| 0 | 177 |
| 41 | 178 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
| 179 | |
| 5 | 180 #if 0 |
| 0 | 181 // set pullup |
| 182 PORTD |= _BV(PD2); | |
| 183 // INT0 setup | |
| 184 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
| 185 EIMSK = _BV(INT0); | |
| 5 | 186 #endif |
| 0 | 187 |
| 188 // comparator disable | |
| 189 ACSR = _BV(ACD); | |
| 190 | |
| 191 // disable adc pin input buffers | |
| 192 DIDR0 = 0x3F; // acd0-adc5 | |
| 193 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
| 194 | |
| 195 sei(); | |
| 196 } | |
| 197 | |
| 198 static void | |
| 199 get_epoch_ticks(struct epoch_ticks *t) | |
| 200 { | |
| 201 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 202 { | |
| 203 t->ticks = clock_epoch; | |
| 7 | 204 t->rem = TCNT1; |
| 0 | 205 } |
| 206 } | |
| 207 | |
| 208 static void | |
| 209 setup_tick_counter() | |
| 210 { | |
| 2 | 211 // set up counter1 |
| 212 | |
| 0 | 213 // set up counter2. |
| 214 // COM21 COM20 Set OC2 on Compare Match (p116) | |
| 215 // WGM21 Clear counter on compare | |
| 216 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
| 217 // toggle on match | |
| 2 | 218 TCCR1A = _BV(COM1A0); |
| 8 | 219 #ifdef SIM_DEBUG |
| 220 // systemclock/8 | |
| 221 TCCR1B = _BV(CS11); | |
| 222 #else | |
| 20 | 223 // systemclock/256 |
| 224 TCCR1B = _BV(CS12); | |
| 8 | 225 #endif |
| 2 | 226 TCNT1 = 0; |
| 227 OCR1A = SLEEP_COMPARE; | |
| 0 | 228 // interrupt |
| 2 | 229 TIMSK1 = _BV(OCIE1A); |
| 0 | 230 } |
| 231 | |
| 232 static void | |
| 233 uart_on() | |
| 234 { | |
| 235 // Power reduction register | |
| 236 PRR &= ~_BV(PRUSART0); | |
| 237 | |
| 238 // All of this needs to be done each time after turning off the PRR | |
| 239 // baud rate | |
| 240 UBRR0H = (unsigned char)(UBRR >> 8); | |
| 241 UBRR0L = (unsigned char)UBRR; | |
| 242 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
| 243 //8N1 | |
| 244 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
| 245 } | |
| 246 | |
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247 #ifdef SIM_DEBUG |
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248 static char sim_out[140]; |
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249 static uint8_t sim_idx = 0; |
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250 static uint8_t last_sim_idx = 0; |
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251 #endif |
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252 |
| 0 | 253 int |
| 254 uart_putchar(char c, FILE *stream) | |
| 255 { | |
| 256 // XXX could perhaps sleep in the loop for power. | |
| 257 if (c == '\n') | |
| 258 { | |
| 259 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 260 UDR0 = '\r'; | |
| 261 } | |
| 262 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 263 UDR0 = c; | |
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264 #ifdef SIM_DEBUG |
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265 sim_out[sim_idx] = c; |
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266 sim_idx++; |
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267 sim_idx %= sizeof(sim_out); |
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268 #endif |
| 0 | 269 if (c == '\r') |
| 270 { | |
| 271 loop_until_bit_is_set(UCSR0A, UDRE0); | |
| 272 UDR0 = '\n'; | |
| 273 } | |
| 274 return (unsigned char)c; | |
| 275 } | |
| 276 | |
| 43 | 277 uint8_t find_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name, struct fat_dir_entry_struct* dir_entry) |
| 278 { | |
| 279 while(fat_read_dir(dd, dir_entry)) | |
| 280 { | |
| 281 if(strcmp(dir_entry->long_name, name) == 0) | |
| 282 { | |
| 283 fat_reset_dir(dd); | |
| 284 return 1; | |
| 285 } | |
| 286 } | |
| 287 | |
| 288 return 0; | |
| 289 } | |
| 290 | |
| 291 struct fat_file_struct* | |
| 292 open_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name) | |
| 293 { | |
| 294 struct fat_dir_entry_struct file_entry; | |
| 295 if(!find_file_in_dir(fs, dd, name, &file_entry)) | |
| 296 return 0; | |
| 297 | |
| 298 return fat_open_file(fs, &file_entry); | |
| 299 } | |
| 300 | |
| 301 static uint32_t sd_serial = 0; | |
| 302 static char conf_start[30]; | |
| 303 | |
| 304 static void | |
| 305 hmac_file(const char* fn) | |
| 306 { | |
| 307 uint8_t res; | |
| 308 | |
| 309 struct sd_raw_info disk_info; | |
| 310 sd_raw_get_info(&disk_info); | |
| 311 sd_serial = disk_info.serial; | |
| 312 printf_P(PSTR("serial %lx\n"), sd_serial); | |
| 313 | |
| 314 struct partition_struct* partition = partition_open(sd_raw_read, sd_raw_read_interval, sd_raw_write, sd_raw_write_interval, 1); | |
| 315 | |
| 316 if (!partition) | |
| 317 { | |
| 318 sprintf(conf_start, "part"); | |
| 319 return; | |
| 320 } | |
| 321 | |
| 322 struct fat_fs_struct* fs = fat_open(partition); | |
| 323 if (!fs) | |
| 324 { | |
| 325 sprintf(conf_start, "bad fs"); | |
| 326 return; | |
| 327 } | |
| 328 struct fat_dir_entry_struct directory; | |
| 329 res = fat_get_dir_entry_of_path(fs, "/", &directory); | |
| 330 if (!res) | |
| 331 { | |
| 332 sprintf(conf_start, "bad direc"); | |
| 333 return; | |
| 334 } | |
| 335 | |
| 336 struct fat_dir_struct* dd = fat_open_dir(fs, &directory); | |
| 337 if (!dd) | |
| 338 { | |
| 339 sprintf(conf_start, "bad dd"); | |
| 340 return; | |
| 341 } | |
| 342 struct fat_file_struct* fd = open_file_in_dir(fs, dd, fn); | |
| 343 if (!fd) | |
| 344 { | |
| 345 sprintf(conf_start, "bad fd"); | |
| 346 return; | |
| 347 } | |
| 348 | |
| 349 fat_read_file(fd, (uint8_t*)conf_start, sizeof(conf_start)-1); | |
| 350 conf_start[sizeof(conf_start)-1] = '\0'; | |
| 351 | |
| 352 fat_close_file(fd); | |
| 353 fd = NULL; | |
| 354 fat_close_dir(dd); | |
| 355 dd = NULL; | |
| 356 fat_close(fs); | |
| 357 fs = NULL; | |
| 358 partition_close(partition); | |
| 359 partition = NULL; | |
| 360 | |
| 361 #if 0 | |
| 362 char c = 0; | |
| 363 char buf[512]; | |
| 364 for (int i = 0; i < 10; i++) | |
| 365 { | |
| 366 fat_read_file(fd, buf, sizeof(buf)); | |
| 367 c ^= buf[0]; | |
| 368 } | |
| 369 printf("total %d\n", c); | |
| 370 #endif | |
| 371 } | |
| 372 | |
| 373 | |
| 374 static void | |
| 375 cmd_testsd(const char *param) | |
| 376 { | |
| 377 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); | |
| 378 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
| 379 long_delay(200); | |
| 380 | |
| 381 printf_P(PSTR("about to raw init\n")); | |
| 382 | |
| 383 sd_raw_init(); | |
| 384 printf_P(PSTR("done raw init\n")); | |
| 385 hmac_file(param); | |
| 386 printf_P(PSTR("conf_start '%s'\n"), conf_start); | |
| 387 sd_raw_deinit(); | |
| 388 | |
| 389 long_delay(200); | |
| 390 | |
| 391 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); | |
| 392 } | |
| 393 | |
| 20 | 394 static void cmd_reset() __attribute__ ((noreturn)); |
| 0 | 395 static void |
| 20 | 396 cmd_reset() |
| 0 | 397 { |
| 398 printf_P(PSTR("reset\n")); | |
| 399 _delay_ms(100); | |
| 400 cli(); // disable interrupts | |
| 401 wdt_enable(WDTO_15MS); // enable watchdog | |
| 402 while(1); // wait for watchdog to reset processor | |
| 403 } | |
| 404 | |
| 2 | 405 static void |
| 406 cmd_newboot() | |
| 407 { | |
| 408 set_pi_boot_normal(1); | |
| 409 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 410 { | |
| 411 newboot_count = newboot_limit; | |
| 412 } | |
| 20 | 413 printf_P(PSTR("newboot for %d secs\n"), newboot_limit); |
| 2 | 414 } |
| 415 | |
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416 static void |
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417 cmd_oldboot() |
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418 { |
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419 set_pi_boot_normal(0); |
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420 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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421 { |
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422 newboot_count = 0; |
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423 } |
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424 printf_P(PSTR("back to old boot\n")); |
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fix for 8mhz, add flip/flop long watchdog
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parents:
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changeset
|
425 } |
| 1 | 426 |
| 0 | 427 |
| 428 static void | |
| 20 | 429 cmd_status() |
| 0 | 430 { |
| 2 | 431 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
| 20 | 432 struct epoch_ticks t; |
| 433 | |
| 434 get_epoch_ticks(&t); | |
| 435 | |
| 1 | 436 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
| 437 { | |
| 2 | 438 cur_watchdog_long = watchdog_long_count; |
| 439 cur_watchdog_short = watchdog_short_count; | |
| 440 cur_newboot = newboot_count; | |
| 441 cur_oneshot = oneshot_count; | |
| 1 | 442 } |
| 443 | |
| 20 | 444 printf_P(PSTR("limit (current)\n" |
| 445 "watchdog_long %lu (%lu) watchdog newboot mode %d\n" | |
| 446 "watchdog_short %lu (%lu)\n" | |
| 447 "newboot %lu (%lu)\n" | |
| 448 "oneshot (%lu)\n" | |
| 449 "uptime %lu rem %u\n" | |
| 22 | 450 "boot normal %hhu\n" |
| 43 | 451 "disk serial %lx\n" |
| 452 "disk start '%s'\n" | |
| 20 | 453 ), |
| 454 watchdog_long_limit, cur_watchdog_long, long_reboot_mode, | |
| 455 watchdog_short_limit, cur_watchdog_short, | |
| 456 newboot_limit, cur_newboot, | |
| 457 cur_oneshot, | |
| 22 | 458 t.ticks, t.rem, |
| 43 | 459 boot_normal_status, |
| 460 sd_serial, | |
| 461 conf_start); | |
| 0 | 462 } |
| 463 | |
| 464 static void | |
| 1 | 465 cmd_set_params(const char *params) |
| 0 | 466 { |
| 1 | 467 uint32_t new_watchdog_long_limit; |
| 468 uint32_t new_watchdog_short_limit; | |
| 469 uint32_t new_newboot_limit; | |
| 470 | |
| 471 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
| 472 &new_watchdog_long_limit, | |
| 473 &new_watchdog_short_limit, | |
| 474 &new_newboot_limit); | |
| 475 | |
| 476 if (ret != 3) | |
| 0 | 477 { |
| 1 | 478 printf_P(PSTR("Bad values\n")); |
| 479 } | |
| 480 else | |
| 481 { | |
| 482 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 483 { | |
| 484 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
| 485 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
| 486 eeprom_write(new_newboot_limit, newboot_limit); | |
| 487 uint16_t magic = EXPECT_MAGIC; | |
| 488 eeprom_write(magic, magic); | |
| 0 | 489 } |
| 1 | 490 printf_P(PSTR("set_params for next boot\n")); |
| 491 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
| 492 new_watchdog_long_limit, | |
| 493 new_watchdog_short_limit, | |
| 494 new_newboot_limit); | |
| 495 } | |
| 496 } | |
| 0 | 497 |
| 35 | 498 // returns 1 if they are equal, timing independent |
| 499 static uint8_t | |
| 500 safe_mem_eq(const uint8_t *a, const uint8_t *b, int len) | |
| 501 { | |
| 502 uint8_t result = 0; | |
| 503 for (int i = 0; i < len; i++) | |
| 504 { | |
| 505 result |= a[i] ^ b[i]; | |
| 506 } | |
| 507 return result == 0; | |
| 508 } | |
| 509 | |
| 510 // returns 1 if they are equal | |
| 511 static uint8_t | |
| 512 safe_str_eq(const char *a, const char *b) | |
| 513 { | |
| 514 int la = strlen(a); | |
| 515 if (la != strlen(b)) | |
| 516 { | |
| 517 return 0; | |
| 518 } | |
| 519 return safe_mem_eq((const uint8_t*)a, (const uint8_t*)b, la); | |
| 520 } | |
| 521 | |
| 1 | 522 uint8_t from_hex(char c) |
| 523 { | |
| 524 if (c >= '0' && c <= '9') { | |
| 525 return c-'0'; | |
| 526 } | |
| 527 if (c >= 'a' && c <= 'f') { | |
| 528 return c-'a' + 0xa; | |
| 529 } | |
| 530 if (c >= 'A' && c <= 'F') { | |
| 531 return c-'A' + 0xa; | |
| 532 } | |
| 533 return 0; | |
| 534 } | |
| 535 | |
| 2 | 536 static void |
| 537 printhex_nibble(const unsigned char b, FILE *stream) | |
| 538 { | |
| 539 unsigned char c = b & 0x0f; | |
| 540 if ( c > 9 ) { | |
| 541 c += 'A'-10; | |
| 542 } | |
| 543 else { | |
| 544 c += '0'; | |
| 545 } | |
| 546 fputc(c, stream); | |
| 547 } | |
| 548 | |
| 549 void | |
| 550 printhex_byte(const unsigned char b, FILE *stream) | |
| 551 { | |
| 552 printhex_nibble( b >> 4, stream); | |
| 553 printhex_nibble( b, stream); | |
| 554 } | |
| 555 | |
| 556 void | |
| 557 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
| 558 { | |
| 559 for (uint8_t i = 0; i < n; i++) | |
| 560 { | |
| 561 printhex_byte(id[i], stream); | |
| 562 } | |
| 563 } | |
| 564 | |
| 565 static int8_t | |
| 5 | 566 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
| 567 uint8_t bytes_len) | |
| 2 | 568 { |
| 569 // "N HEXKEY" | |
| 5 | 570 if (strlen(params) != bytes_len*2 + 2) { |
| 20 | 571 printf_P(PSTR("Wrong length key. wanted %d, got %d, '%s'\n"), |
| 572 bytes_len*2+2, strlen(params), params); | |
| 2 | 573 return -1; |
| 574 } | |
| 575 | |
| 576 if (params[1] != ' ') | |
| 577 { | |
| 578 printf_P(PSTR("Missing space\n")); | |
| 579 return -1; | |
| 580 } | |
| 581 | |
| 582 *key_index = from_hex(params[0]); | |
| 583 if (*key_index >= NKEYS) | |
| 584 { | |
| 585 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
| 586 return -1; | |
| 587 } | |
| 588 | |
| 5 | 589 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
| 2 | 590 { |
| 591 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
| 592 } | |
| 593 return 0; | |
| 594 } | |
| 595 | |
| 1 | 596 static void |
| 597 cmd_set_avr_key(const char *params) | |
| 598 { | |
| 2 | 599 uint8_t new_key[KEYLEN]; |
| 600 uint8_t key_index; | |
| 5 | 601 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
| 2 | 602 { |
| 1 | 603 return; |
| 0 | 604 } |
| 2 | 605 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
| 8 | 606 #ifndef SIM_DEBUG |
| 2 | 607 eeprom_write(avr_keys, avr_keys); |
| 8 | 608 #endif |
| 20 | 609 printf_P(PSTR("Set key %d: "), key_index); |
| 610 printhex(new_key, sizeof(new_key), stdout); | |
| 611 putchar('\n'); | |
| 2 | 612 } |
| 613 | |
| 614 static void | |
| 615 cmd_hmac(const char *params) | |
| 616 { | |
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get rid of hmac message padding and aes hmac
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617 uint8_t indata[HMACLEN]; |
| 7 | 618 uint8_t outdata[HMACLEN]; |
| 2 | 619 uint8_t key_index; |
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get rid of hmac message padding and aes hmac
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620 if (parse_key(params, &key_index, indata, HMACLEN) != 0) |
| 2 | 621 { |
| 622 printf_P(PSTR("FAIL: Bad input\n")); | |
| 5 | 623 return; |
| 2 | 624 } |
| 0 | 625 |
| 8 | 626 #ifndef SIM_DEBUG |
| 5 | 627 long_delay(200); |
| 8 | 628 #endif |
| 5 | 629 |
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hmac and decrypt keys differ now
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630 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
| 2 | 631 printf_P(PSTR("HMAC: ")); |
| 7 | 632 printhex(outdata, HMACLEN, stdout); |
| 20 | 633 putchar('\n'); |
| 5 | 634 } |
| 635 | |
| 636 static void | |
| 637 cmd_decrypt(const char *params) | |
| 638 { | |
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639 uint8_t indata[AESLEN]; |
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640 uint8_t output[AESLEN]; |
| 5 | 641 uint8_t key_index; |
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642 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
| 5 | 643 { |
| 644 printf_P(PSTR("FAIL: Bad input\n")); | |
| 645 return; | |
| 646 } | |
| 647 | |
| 8 | 648 #ifndef SIM_DEBUG |
| 5 | 649 long_delay(200); |
| 8 | 650 #endif |
| 7 | 651 |
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652 uint8_t tmpbuf[256]; |
| 27 | 653 aesInit(avr_keys[key_index], tmpbuf); |
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654 aesDecrypt(indata, NULL); |
| 5 | 655 |
| 656 printf_P(PSTR("DECRYPTED: ")); | |
| 657 printhex(output, AESLEN, stdout); | |
| 20 | 658 putchar('\n'); |
| 2 | 659 } |
| 660 | |
| 661 static void | |
| 662 cmd_oneshot_reboot(const char *params) | |
| 663 { | |
| 664 uint32_t new_delay = strtoul(params, NULL, 10); | |
| 665 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 1 | 666 { |
| 2 | 667 oneshot_count = new_delay; |
| 1 | 668 } |
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fix for 8mhz, add flip/flop long watchdog
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669 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
| 0 | 670 } |
| 671 | |
| 672 static void | |
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debug printing, 5v adc, fixes
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673 clamp_params() |
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674 { |
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675 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
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676 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
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677 { |
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678 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
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679 } |
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680 |
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681 if (watchdog_short_limit != 0 |
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682 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
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683 { |
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684 watchdog_short_limit = 0; |
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685 } |
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686 |
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687 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
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688 { |
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689 newboot_limit = NEWBOOT_DEFAULT; |
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690 } |
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691 } |
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692 |
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693 static void |
| 0 | 694 load_params() |
| 695 { | |
| 696 uint16_t magic; | |
| 697 eeprom_read(magic, magic); | |
| 698 if (magic == EXPECT_MAGIC) | |
| 699 { | |
| 1 | 700 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
| 701 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
| 2 | 702 eeprom_read(newboot_limit, newboot_limit); |
| 1 | 703 } |
| 2 | 704 |
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705 clamp_params(); |
| 16 | 706 |
| 2 | 707 eeprom_read(avr_keys, avr_keys); |
| 0 | 708 } |
| 709 | |
| 2 | 710 static void |
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fix for 8mhz, add flip/flop long watchdog
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711 cmd_alive() |
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parents:
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712 { |
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parents:
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713 printf_P(PSTR("Ah, good.\n")); |
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parents:
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714 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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fix for 8mhz, add flip/flop long watchdog
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parents:
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715 { |
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fix for 8mhz, add flip/flop long watchdog
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parents:
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716 watchdog_long_count = 0; |
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parents:
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717 watchdog_short_count = 0; |
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parents:
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718 } |
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parents:
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719 long_reboot_mode = 0; |
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parents:
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720 } |
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915be6f0ff13
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parents:
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721 |
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parents:
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722 static void |
| 35 | 723 cmd_poke() |
| 724 { | |
| 725 printf_P(PSTR("Ah, good.\n")); | |
| 726 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 727 { | |
| 728 watchdog_short_count = 0; | |
| 729 } | |
| 730 } | |
| 731 | |
| 732 static void | |
| 2 | 733 cmd_vcc() |
| 0 | 734 { |
| 2 | 735 uint16_t vcc = adc_vcc(); |
|
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736 uint16_t v5 = adc_5v(vcc); |
| 21 | 737 uint16_t temp = adc_temp(); |
| 738 // roughly? | |
| 739 uint16_t temp_deg = temp - 290; | |
| 740 printf_P(PSTR("vcc: %u mV\n" | |
| 741 "5v: %u mV\n" | |
| 26 | 742 "temp: %u mV (%dºC)\n" |
| 743 ), | |
| 27 | 744 vcc, v5, temp, temp_deg); |
| 0 | 745 } |
| 746 | |
| 20 | 747 |
| 27 | 748 void(*bootloader)() __attribute__ ((noreturn)) = (void*)0x7800; |
| 749 | |
| 20 | 750 #ifndef PROG_PASSWORD |
| 751 #define PROG_PASSWORD "Y2vvjxO5" | |
| 752 #endif | |
| 753 | |
| 754 static void | |
| 755 cmd_prog(const char* arg) | |
| 756 { | |
| 36 | 757 if (!safe_str_eq(arg, PROG_PASSWORD)) |
| 20 | 758 { |
| 759 printf_P(PSTR("Bad prog password\n")); | |
| 760 return; | |
| 761 } | |
| 762 | |
| 36 | 763 printf_P(PSTR("Programming...\n")); |
| 764 long_delay(100); | |
| 765 | |
| 20 | 766 // disable wdt |
| 767 wdt_disable(); | |
| 41 | 768 MCUSR = 0; |
| 20 | 769 |
| 770 // disable interrupts | |
| 771 TIMSK0 = 0; | |
| 772 TIMSK1 = 0; | |
| 773 TIMSK2 = 0; | |
| 774 EIMSK = 0; | |
| 775 PCMSK0 = 0; | |
| 776 PCMSK1 = 0; | |
| 777 PCMSK2 = 0; | |
| 778 ACSR &= ~_BV(ACIE); | |
| 779 ADCSRA &= ~_BV(ADIE); | |
| 780 UCSR0B &= ~_BV(RXCIE0); | |
| 781 UCSR0B &= _BV(TXCIE0); | |
| 782 // doesn't do TWI, other uart, probably others | |
| 783 | |
| 784 _delay_ms(20); | |
| 785 | |
| 786 bootloader(); | |
| 787 } | |
| 27 | 788 |
| 789 | |
| 790 static void | |
| 791 adc_sleep() | |
| 792 { | |
| 793 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 794 sleep_mode(); | |
| 795 } | |
| 796 | |
| 797 #define BITSET(v, n) (((v) >> (n)) & 1) | |
| 798 | |
| 799 static inline uint8_t | |
| 800 popcnt(uint8_t v) | |
| 801 { | |
| 802 return BITSET(v, 0) | |
| 803 + BITSET(v, 1) | |
| 804 + BITSET(v, 2) | |
| 805 + BITSET(v, 3) | |
| 806 + BITSET(v, 4) | |
| 807 + BITSET(v, 5) | |
| 808 + BITSET(v, 6) | |
| 809 + BITSET(v, 7); | |
| 810 } | |
| 811 | |
| 812 static uint8_t | |
| 813 adc_bit() | |
| 814 { | |
| 815 ADCSRA |= _BV(ADSC); | |
| 816 loop_until_bit_is_clear(ADCSRA, ADSC); | |
| 817 uint8_t low = ADCL; | |
| 818 uint8_t high = ADCH; | |
| 35 | 819 uint8_t ret = (popcnt(low)&1) ^ (popcnt(high)&1); |
| 820 return ret; | |
| 27 | 821 } |
| 822 | |
| 823 static void | |
| 824 adc_random(uint8_t admux, | |
| 825 uint8_t *out, uint16_t num, uint32_t *tries) | |
| 826 { | |
| 827 PRR &= ~_BV(PRADC); | |
| 828 // /16 prescaler for 691mhz, no interrupt | |
| 829 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
| 830 | |
| 35 | 831 ADMUX = admux; |
| 832 | |
| 27 | 833 *tries = 0; |
| 834 for (int i = 0; i < num; i++) | |
| 835 { | |
| 35 | 836 uint8_t ret = 0; |
| 837 uint8_t count = 0; | |
| 838 | |
| 27 | 839 while (count <= 7) |
| 840 { | |
| 841 (*tries)++; | |
| 842 | |
| 843 // Von Neumann extractor | |
| 844 uint8_t one = adc_bit(); | |
| 845 uint8_t two = adc_bit(); | |
| 846 if (one == two) | |
| 847 { | |
| 848 continue; | |
| 849 } | |
| 850 ret |= one << count; | |
| 851 count++; | |
| 852 } | |
| 853 out[i] = ret; | |
| 854 } | |
| 855 ADCSRA = 0; | |
| 856 PRR |= _BV(PRADC); | |
| 857 } | |
| 858 | |
| 859 ISR(ADC_vect) | |
| 860 { | |
| 861 adc_done = 1; | |
| 862 } | |
| 863 | |
| 864 static void | |
| 865 adc_generic(uint8_t admux, uint8_t *ret_num, uint16_t *ret_sum) | |
| 866 { | |
| 867 PRR &= ~_BV(PRADC); | |
| 868 | |
| 31 | 869 // /128 prescaler (86kHz), interrupt |
| 870 ADCSRA = _BV(ADEN) | |
| 871 | _BV(ADPS2) | _BV(ADPS1) | _BV(ADPS0) | |
| 872 | _BV(ADIE); | |
| 27 | 873 |
| 874 // set to measure 1.1 reference | |
| 875 ADMUX = admux; | |
| 876 | |
| 877 // delay after setting reference etc, allow settling | |
| 878 long_delay(300); | |
| 879 // average a number of samples | |
| 880 uint16_t sum = 0; | |
| 881 uint8_t num = 0; | |
| 882 for (uint8_t n = 0; n < 20; n++) | |
| 883 { | |
| 884 while (1) | |
| 885 { | |
| 886 adc_done = 0; | |
| 887 ADCSRA |= _BV(ADSC); | |
| 888 adc_sleep(); | |
| 889 | |
| 890 uint8_t done; | |
| 891 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
| 892 { | |
| 893 done = adc_done; | |
| 894 } | |
| 895 if (done) | |
| 896 { | |
| 897 break; | |
| 898 } | |
| 899 } | |
| 900 | |
| 901 uint8_t low_11 = ADCL; | |
| 902 uint8_t high_11 = ADCH; | |
| 903 uint16_t val = low_11 + (high_11 << 8); | |
| 904 | |
| 905 if (n >= 4) | |
| 906 { | |
| 907 sum += val; | |
| 908 num++; | |
| 909 } | |
| 910 } | |
| 911 ADCSRA = 0; | |
| 912 PRR |= _BV(PRADC); | |
| 913 | |
| 914 *ret_num = num; | |
| 915 *ret_sum = sum; | |
| 916 } | |
| 917 | |
| 918 static uint16_t | |
| 919 adc_vcc() | |
| 920 { | |
| 921 const uint8_t mux = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
| 922 uint16_t sum; | |
| 923 uint8_t num; | |
| 924 | |
| 925 adc_generic(mux, &num, &sum); | |
| 926 | |
| 927 //float res_volts = 1.1 * 1024 * num / sum; | |
| 928 //return 1000 * res_volts; | |
| 929 return ((uint32_t)1100*1024*num) / sum; | |
| 930 } | |
| 931 | |
| 932 #define SCALER_5V 2 | |
| 933 | |
| 934 static uint16_t | |
| 935 adc_5v(uint16_t vcc) | |
| 936 { | |
| 937 // set to measure ADC4 against AVCC | |
| 938 const uint8_t mux = _BV(REFS0) | _BV(MUX2); | |
| 939 uint16_t sum; | |
| 940 uint8_t num; | |
| 941 | |
| 942 adc_generic(mux, &num, &sum); | |
| 943 | |
| 944 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024)); | |
| 945 } | |
| 946 | |
| 947 static uint16_t | |
| 948 adc_temp() | |
| 949 { | |
| 950 // set to measure temperature against 1.1v reference. | |
| 951 const uint8_t mux = _BV(REFS0) | _BV(REFS1) | _BV(MUX3); | |
| 952 uint16_t sum; | |
| 953 uint8_t num; | |
| 954 | |
| 955 adc_generic(mux, &num, &sum); | |
| 956 | |
| 957 // return the voltage | |
| 958 | |
| 959 return ((uint32_t)1100*sum) / (num*1024); | |
| 960 } | |
| 961 | |
| 962 static void | |
| 963 cmd_random(const char* params) | |
| 964 { | |
| 965 uint8_t admux; | |
| 966 uint16_t num; | |
| 967 uint8_t buf[100]; | |
| 968 | |
| 969 int ret = sscanf_P(params, PSTR("%hhu %u"), | |
| 970 &admux, &num); | |
| 971 if (!ret) | |
| 972 { | |
| 973 printf_P(PSTR("Bad arguments\n")); | |
| 974 return; | |
| 975 } | |
| 976 uint32_t tries = 0; | |
| 977 printf_P(PSTR("output: ")); | |
| 978 for (int i = 0; i < num; i+= sizeof(buf)) | |
| 979 { | |
| 980 uint32_t t; | |
| 981 uint16_t nr = MIN(num-i, sizeof(buf)); | |
| 982 adc_random(admux, buf, nr, &t); | |
| 983 printhex(buf, nr, stdout); | |
| 984 tries += t; | |
| 985 } | |
| 986 putchar('\n'); | |
| 987 printf_P(PSTR("%ld tries\n"), tries); | |
| 988 } | |
| 989 | |
| 990 | |
| 20 | 991 |
| 0 | 992 static void |
| 993 read_handler() | |
| 994 { | |
| 17 | 995 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
| 996 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
| 997 | |
| 998 LOCAL_PSTR(set_params); | |
| 999 LOCAL_PSTR(set_key); | |
| 1000 LOCAL_PSTR(oneshot); | |
| 1001 LOCAL_PSTR(hmac); | |
| 1002 LOCAL_PSTR(decrypt); | |
| 1003 LOCAL_PSTR(alive); | |
| 35 | 1004 LOCAL_PSTR(poke); |
| 17 | 1005 LOCAL_PSTR(vcc); |
| 1006 LOCAL_PSTR(reset); | |
| 1007 LOCAL_PSTR(newboot); | |
| 1008 LOCAL_PSTR(oldboot); | |
| 20 | 1009 LOCAL_PSTR(status); |
| 27 | 1010 LOCAL_PSTR(random); |
| 1011 LOCAL_PSTR(prog); | |
| 43 | 1012 LOCAL_PSTR(testsd); |
| 17 | 1013 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); |
| 1014 LOCAL_HELP(set_key, "20_byte_hex>"); | |
|
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1015 LOCAL_HELP(oneshot, "<timeout>"); |
| 27 | 1016 LOCAL_HELP(prog, "<password>"); |
| 1017 LOCAL_HELP(random, "<admux> <nbytes>"); | |
| 17 | 1018 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
| 1019 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
| 43 | 1020 LOCAL_HELP(testsd, "<filename>"); |
| 17 | 1021 |
| 1022 static const struct handler { | |
| 1023 PGM_P name; | |
| 1024 void(*cmd)(const char *param); | |
| 1025 // existence of arg_help indicates if the cmd takes a parameter. | |
| 1026 PGM_P arg_help; | |
| 20 | 1027 } handlers[] PROGMEM = |
| 17 | 1028 { |
| 20 | 1029 {alive_str, cmd_alive, NULL}, |
| 35 | 1030 {poke_str, cmd_poke, NULL}, |
| 20 | 1031 {newboot_str, cmd_newboot, NULL}, |
| 1032 {oldboot_str, cmd_oldboot, NULL}, | |
| 1033 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, | |
| 1034 {status_str, cmd_status, NULL}, | |
| 1035 {hmac_str, cmd_hmac, hmac_help}, | |
| 1036 {decrypt_str, cmd_decrypt, decrypt_help}, | |
| 17 | 1037 {set_params_str, cmd_set_params, set_params_help}, |
| 1038 {set_key_str, cmd_set_avr_key, set_key_help}, | |
| 27 | 1039 {random_str, cmd_random, random_help}, |
| 17 | 1040 {vcc_str, cmd_vcc, NULL}, |
| 1041 {reset_str, cmd_reset, NULL}, | |
| 43 | 1042 {testsd_str, cmd_testsd, testsd_help}, |
| 27 | 1043 {prog_str, cmd_prog, prog_help}, |
| 17 | 1044 }; |
| 1045 | |
| 1046 if (readbuf[0] == '\0') | |
| 1047 { | |
| 1048 return; | |
| 1049 } | |
| 1050 | |
|
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1051 if (strcmp_P(readbuf, PSTR("help")) == 0) |
| 17 | 1052 { |
| 1053 printf_P(PSTR("Commands:---\n")); | |
| 1054 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 1055 { | |
| 1056 struct handler h; | |
| 1057 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 1058 printf_P(h.name); | |
| 1059 if (h.arg_help) | |
| 1060 { | |
| 1061 putchar(' '); | |
| 1062 printf_P(h.arg_help); | |
| 1063 } | |
| 1064 putchar('\n'); | |
| 1065 }; | |
| 1066 printf_P(PSTR("---\n")); | |
|
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1067 return; |
| 17 | 1068 } |
| 1069 | |
| 1070 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
| 1071 { | |
| 1072 struct handler h; | |
| 1073 memcpy_P(&h, &handlers[i], sizeof(h)); | |
| 1074 | |
| 1075 const int h_len = strlen_P(h.name); | |
| 1076 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
| 1077 { | |
| 1078 if (h.arg_help) | |
| 1079 { | |
| 1080 if (readbuf[h_len] == ' ') | |
| 1081 { | |
|
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1082 h.cmd(&readbuf[h_len+1]); |
| 17 | 1083 return; |
| 1084 } | |
| 1085 } | |
| 1086 else | |
| 1087 { | |
| 1088 if (readbuf[h_len] == '\0') | |
| 1089 { | |
|
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1090 void(*void_cmd)() = h.cmd; |
| 17 | 1091 void_cmd(); |
| 1092 return; | |
| 1093 } | |
| 1094 } | |
| 1095 } | |
| 1096 } | |
| 1097 | |
| 1098 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
| 0 | 1099 } |
| 1100 | |
| 1101 ISR(INT0_vect) | |
| 1102 { | |
| 1103 blink(); | |
| 1104 _delay_ms(100); | |
| 1105 blink(); | |
| 1106 } | |
| 1107 | |
| 1108 ISR(USART_RX_vect) | |
| 1109 { | |
| 1110 char c = UDR0; | |
| 1111 #ifdef HAVE_UART_ECHO | |
| 1112 uart_putchar(c, NULL); | |
| 1113 #endif | |
| 1114 if (c == '\r' || c == '\n') | |
| 1115 { | |
| 1116 if (readpos > 0) | |
| 1117 { | |
| 1118 readbuf[readpos] = '\0'; | |
| 1119 have_cmd = 1; | |
| 1120 readpos = 0; | |
| 1121 } | |
| 1122 } | |
| 1123 else | |
| 1124 { | |
| 1125 readbuf[readpos] = c; | |
| 1126 readpos++; | |
| 1127 if (readpos >= sizeof(readbuf)) | |
| 1128 { | |
| 1129 readpos = 0; | |
| 1130 } | |
| 1131 } | |
| 1132 } | |
| 1133 | |
| 2 | 1134 ISR(TIMER1_COMPA_vect) |
| 0 | 1135 { |
| 2 | 1136 TCNT1 = 0; |
| 0 | 1137 |
| 1138 clock_epoch += TICK; | |
| 1139 | |
| 1 | 1140 // watchdogs count up, continuous |
| 1141 if (watchdog_long_limit > 0) { | |
| 2 | 1142 watchdog_long_count += TICK; |
| 1 | 1143 if (watchdog_long_count >= watchdog_long_limit) |
| 1144 { | |
| 1145 watchdog_long_count = 0; | |
| 1146 watchdog_long_hit = 1; | |
| 1147 } | |
| 0 | 1148 } |
| 1149 | |
| 1 | 1150 if (watchdog_short_limit > 0) { |
| 2 | 1151 watchdog_short_count += TICK; |
| 1 | 1152 if (watchdog_short_count >= watchdog_short_limit) |
| 1153 { | |
| 1154 watchdog_short_count = 0; | |
| 1155 watchdog_short_hit = 1; | |
| 1156 } | |
| 0 | 1157 } |
| 1158 | |
| 2 | 1159 // newboot counts down |
| 1 | 1160 if (newboot_count > 0) |
| 0 | 1161 { |
| 2 | 1162 newboot_count-=TICK; |
| 1163 if (newboot_count <= 0) | |
| 1 | 1164 { |
| 1165 newboot_hit = 1; | |
| 2 | 1166 newboot_count = 0; |
| 1 | 1167 } |
| 0 | 1168 } |
| 1 | 1169 |
| 2 | 1170 if (oneshot_count > 0) |
| 1171 { | |
| 1172 oneshot_count-=TICK; | |
| 1173 if (oneshot_count <= 0) | |
| 1174 { | |
| 1175 oneshot_hit = 1; | |
| 1176 oneshot_count = 0; | |
| 1177 } | |
| 1178 } | |
|
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1179 |
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1180 if (reboot_count > 0) |
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1181 { |
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1182 reboot_count -= TICK; |
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1183 if (reboot_count <= 0) |
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1184 { |
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1185 reboot_hit = 1; |
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1186 reboot_count = 0; |
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1187 } |
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1188 } |
| 0 | 1189 } |
| 1190 | |
| 1191 static void | |
| 1192 idle_sleep() | |
| 1193 { | |
| 1194 set_sleep_mode(SLEEP_MODE_IDLE); | |
| 1195 sleep_mode(); | |
| 1196 } | |
| 1197 | |
| 21 | 1198 static void |
| 2 | 1199 reboot_pi() |
| 1200 { | |
|
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1201 printf_P(PSTR("Real reboot now\n")); |
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1202 // pull it low for 200ms |
| 2 | 1203 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
| 1204 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
|
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1205 _delay_ms(200); |
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1206 |
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1207 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
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1208 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
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1209 } |
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1210 |
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1211 static void |
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1212 wait_reboot_pi() |
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1213 { |
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1214 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
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1215 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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1216 { |
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1217 reboot_count = WARNING_TIME; |
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1218 } |
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1219 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
| 2 | 1220 } |
| 1221 | |
| 1222 static void | |
| 1223 set_pi_boot_normal(uint8_t normal) | |
| 1224 { | |
| 22 | 1225 boot_normal_status = normal; |
| 2 | 1226 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
| 1227 if (normal) | |
| 1228 { | |
| 1229 // tristate | |
| 1230 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
| 1231 } | |
| 1232 else | |
| 1233 { | |
| 1234 // pull it low | |
| 1235 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
| 1236 } | |
| 1237 } | |
| 1238 | |
| 1239 static void | |
| 1240 check_flags() | |
| 1241 { | |
|
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1242 if (watchdog_long_hit) |
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1243 { |
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1244 // alternate between booting normal and emergency |
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1245 if (long_reboot_mode) |
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1246 { |
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1247 cmd_newboot(); |
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1248 } |
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1249 long_reboot_mode ^= 1; |
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1250 } |
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1251 |
| 2 | 1252 if (watchdog_long_hit |
| 1253 || watchdog_short_hit | |
| 1254 || oneshot_hit) | |
| 1255 { | |
| 12 | 1256 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
| 1257 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
|
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1258 wait_reboot_pi(); |
| 2 | 1259 } |
| 1260 | |
| 1261 if (newboot_hit) { | |
| 1262 set_pi_boot_normal(0); | |
| 1263 } | |
| 1264 | |
|
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1265 if (reboot_hit) { |
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1266 reboot_pi(); |
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1267 } |
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1268 |
| 2 | 1269 watchdog_long_hit = 0; |
| 1270 watchdog_short_hit = 0; | |
| 1271 newboot_hit = 0; | |
| 1272 oneshot_hit = 0; | |
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1273 reboot_hit = 0; |
| 2 | 1274 } |
| 1275 | |
| 1276 static void | |
| 0 | 1277 do_comms() |
| 1278 { | |
| 1279 // avoid receiving rubbish, perhaps | |
| 1280 uart_on(); | |
| 1281 | |
| 1282 // write sd card here? same 3.3v regulator... | |
| 1283 | |
| 1 | 1284 while (1) |
| 0 | 1285 { |
| 1 | 1286 wdt_reset(); |
| 2 | 1287 |
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1288 #ifdef SIM_DEBUG |
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1289 if (sim_idx != last_sim_idx) |
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1290 { |
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1291 last_sim_idx = sim_idx; |
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1292 } |
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1293 #endif |
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1294 |
| 2 | 1295 check_flags(); |
| 1296 | |
| 0 | 1297 if (have_cmd) |
| 1298 { | |
| 1299 have_cmd = 0; | |
| 1300 read_handler(); | |
| 1301 continue; | |
| 1302 } | |
| 1303 | |
| 1304 // wait for commands from the master | |
| 1305 idle_sleep(); | |
| 1306 } | |
| 1307 } | |
| 1308 | |
| 1309 static void | |
| 1310 blink() | |
| 1311 { | |
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1312 #if 0 |
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1313 PORT_ &= ~_BV(PIN_LED); |
| 0 | 1314 _delay_ms(1); |
| 1315 PORT_LED |= _BV(PIN_LED); | |
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1316 #endif |
| 0 | 1317 } |
| 1318 | |
| 1319 static void | |
| 22 | 1320 long_delay(uint16_t ms) |
| 0 | 1321 { |
| 22 | 1322 uint16_t iter = ms / 10; |
| 0 | 1323 |
| 22 | 1324 for (uint16_t i = 0; i < iter; i++) |
| 0 | 1325 { |
| 22 | 1326 _delay_ms(10); |
| 0 | 1327 } |
| 1328 } | |
| 1329 | |
| 1330 ISR(BADISR_vect) | |
| 1331 { | |
| 1332 //uart_on(); | |
| 1333 printf_P(PSTR("Bad interrupt\n")); | |
| 1334 } | |
| 1335 | |
| 20 | 1336 // disable watchdog on boot |
| 1337 void wdt_init(void) __attribute__((naked)) __attribute__((section(".init3"))); | |
| 1338 void wdt_init(void) | |
| 1339 { | |
| 1340 MCUSR = 0; | |
| 1341 wdt_disable(); | |
| 1342 } | |
| 1343 | |
| 0 | 1344 int main(void) |
| 1345 { | |
| 17 | 1346 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
| 1347 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
| 20 | 1348 _Static_assert((F_CPU)%(16*(BAUD)) == 0, "baud rate good multiple"); |
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1349 |
| 0 | 1350 setup_chip(); |
| 1351 blink(); | |
| 1352 | |
| 1353 stdout = &mystdout; | |
| 1354 uart_on(); | |
| 1355 | |
| 20 | 1356 long_delay(500); |
| 1357 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]\n")); | |
| 0 | 1358 |
| 2 | 1359 set_pi_boot_normal(0); |
| 1360 | |
| 0 | 1361 load_params(); |
| 1362 | |
| 1363 setup_tick_counter(); | |
| 1364 | |
| 1365 sei(); | |
| 1366 | |
| 8 | 1367 #if 0 |
| 1368 // encryption test | |
| 1369 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
| 1370 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
| 12 | 1371 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
| 1372 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
| 1373 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
| 8 | 1374 #endif |
| 1375 | |
| 1 | 1376 // doesn't return |
| 1377 do_comms(); | |
| 0 | 1378 |
| 1379 return 0; /* never reached */ | |
| 1380 } |