Mercurial > pihelp
annotate main.c @ 45:a0f2fcc6d9dd
add buildid
author | Matt Johnston <matt@ucc.asn.au> |
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date | Sat, 29 Jun 2013 23:46:39 +0800 |
parents | 69cbf9ce72b5 |
children | b1c27f1d6289 |
rev | line source |
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0 | 1 #include <stdio.h> |
2 #include <string.h> | |
3 #include <stddef.h> | |
4 #include <stdbool.h> | |
5 #include <stdlib.h> | |
6 #include <avr/io.h> | |
7 #include <avr/interrupt.h> | |
8 #include <avr/sleep.h> | |
9 #include <util/delay.h> | |
10 #include <avr/pgmspace.h> | |
11 #include <avr/eeprom.h> | |
12 #include <avr/wdt.h> | |
13 #include <util/atomic.h> | |
14 #include <util/crc16.h> | |
15 | |
45 | 16 #include "buildid.h" |
17 | |
2 | 18 #include "hmac-sha1.h" |
5 | 19 #include "aes.h" |
2 | 20 |
43 | 21 #include "fat.h" |
22 #include "fat_config.h" | |
23 #include "partition.h" | |
24 #include "sd_raw.h" | |
25 #include "sd_raw_config.h" | |
26 | |
1 | 27 //#include "simple_ds18b20.h" |
28 //#include "onewire.h" | |
0 | 29 |
20 | 30 // not set via bootloader |
31 //LOCKBITS = (LB_MODE_3 & BLB0_MODE_4 & BLB1_MODE_4); | |
5 | 32 |
0 | 33 #define MIN(X,Y) ((X) < (Y) ? (X) : (Y)) |
34 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y)) | |
35 | |
36 // TICK should be 8 or less (8 untested). all timers need | |
37 // to be a multiple. | |
38 | |
1 | 39 #define TICK 1 |
17 | 40 #define SLEEP_COMPARE (F_CPU/256) // == 19200 for 4915200mhz |
5 | 41 #define NKEYS 10 |
42 #define HMACLEN 20 | |
43 #define AESLEN 16 | |
44 #define KEYLEN HMACLEN | |
45 | 45 // 64 bits is enough for a realtime challenge |
46 #define CHALLEN 8 | |
1 | 47 |
27 | 48 #define BAUD 115200 |
20 | 49 #define UBRR ((F_CPU)/(16*(BAUD))-1) |
0 | 50 |
2 | 51 #define PORT_PI_BOOT PORTD |
52 #define DDR_PI_BOOT DDRD | |
4 | 53 #define PIN_PI_BOOT PD5 |
2 | 54 |
55 #define PORT_PI_RESET PORTD | |
56 #define DDR_PI_RESET DDRD | |
57 #define PIN_PI_RESET PD6 | |
58 | |
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59 #define PORT_PI_WARNING PORTD |
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60 #define DDR_PI_WARNING DDRD |
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61 #define PIN_PI_WARNING PD7 |
0 | 62 |
63 // #define HAVE_UART_ECHO | |
64 | |
7 | 65 // stores a value of clock_epoch combined with the remainder of TCNT1, |
0 | 66 // for 1/32 second accuracy |
67 struct epoch_ticks | |
68 { | |
69 uint32_t ticks; | |
70 // remainder | |
20 | 71 uint16_t rem; |
0 | 72 }; |
73 | |
16 | 74 #define WATCHDOG_LONG_MIN (60L*40) // 40 mins |
75 #define WATCHDOG_LONG_MAX (60L*60*72) // 72 hours | |
76 #define WATCHDOG_LONG_DEFAULT (60L*60*6) // 6 hours | |
77 | |
78 #define WATCHDOG_SHORT_MIN (60L*15) // 15 mins | |
79 | |
80 #define NEWBOOT_DEFAULT (60*10) // 10 minutes | |
81 #define NEWBOOT_MIN (60*2) // 2 minutes | |
82 #define NEWBOOT_MAX (60*30) // 30 mins | |
83 | |
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84 #define WARNING_TIME 10 |
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85 |
1 | 86 // eeprom-settable parameters, default values defined here. |
87 // all timeouts should be a multiple of TICK | |
16 | 88 static uint32_t watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
1 | 89 static uint32_t watchdog_short_limit = 0; |
16 | 90 static uint32_t newboot_limit = NEWBOOT_DEFAULT; |
0 | 91 |
1 | 92 // avr proves itself |
2 | 93 static uint8_t avr_keys[NKEYS][KEYLEN] = {{0}}; |
0 | 94 |
95 // ---- Atomic guards required accessing these variables | |
96 // clock_epoch in seconds | |
97 static uint32_t clock_epoch; | |
1 | 98 // watchdog counts up |
99 static uint32_t watchdog_long_count; | |
100 static uint32_t watchdog_short_count; | |
2 | 101 // newboot counts down |
1 | 102 static uint32_t newboot_count; |
2 | 103 // oneshot counts down |
104 static uint32_t oneshot_count; | |
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105 // countdown after the warning. |
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106 static uint8_t reboot_count; |
27 | 107 // set by adc completion interrupt |
108 static uint8_t adc_done; | |
2 | 109 |
0 | 110 // ---- End atomic guards required |
111 | |
112 // boolean flags | |
1 | 113 static uint8_t watchdog_long_hit; |
114 static uint8_t watchdog_short_hit; | |
115 static uint8_t newboot_hit; | |
2 | 116 static uint8_t oneshot_hit; |
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117 static uint8_t reboot_hit; |
0 | 118 |
22 | 119 // informational for status messages |
120 static uint8_t boot_normal_status; | |
121 | |
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122 // flips between 0 and 1 each watchdog_long_hit, so eventually a |
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123 // working firmware should boot. set back to 0 for each 'alive' |
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124 // command |
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125 static uint8_t long_reboot_mode = 0; |
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126 |
45 | 127 static uint8_t boot_id_set = 0; |
128 static uint8_t boot_id[HMACLEN]; | |
129 | |
0 | 130 static uint8_t readpos; |
20 | 131 static char readbuf[150]; |
0 | 132 static uint8_t have_cmd; |
133 | |
134 int uart_putchar(char c, FILE *stream); | |
22 | 135 static void long_delay(uint16_t ms); |
0 | 136 static void blink(); |
137 static uint16_t adc_vcc(); | |
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138 static uint16_t adc_5v(uint16_t vcc); |
20 | 139 static uint16_t adc_temp(); |
2 | 140 static void set_pi_boot_normal(uint8_t normal); |
45 | 141 static void adc_random(uint8_t admux, |
142 uint8_t *out, uint16_t num, uint32_t *tries); | |
17 | 143 |
0 | 144 static FILE mystdout = FDEV_SETUP_STREAM(uart_putchar, NULL, |
145 _FDEV_SETUP_WRITE); | |
146 | |
147 // thanks to http://projectgus.com/2010/07/eeprom-access-with-arduino/ | |
148 #define eeprom_read_to(dst_p, eeprom_field, dst_size) eeprom_read_block((dst_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (dst_size)) | |
149 #define eeprom_read(dst, eeprom_field) eeprom_read_to((&dst), eeprom_field, sizeof(dst)) | |
150 #define eeprom_write_from(src_p, eeprom_field, src_size) eeprom_write_block((src_p), (void *)offsetof(struct __eeprom_data, eeprom_field), (src_size)) | |
151 #define eeprom_write(src, eeprom_field) { eeprom_write_from(&src, eeprom_field, sizeof(src)); } | |
152 | |
1 | 153 #define EXPECT_MAGIC 0xdf83 |
0 | 154 |
155 struct __attribute__ ((__packed__)) __eeprom_data { | |
1 | 156 uint32_t watchdog_long_limit; |
157 uint32_t watchdog_short_limit; | |
158 uint32_t newboot_limit; | |
0 | 159 |
2 | 160 uint8_t avr_keys[NKEYS][KEYLEN]; |
0 | 161 |
162 uint16_t magic; | |
163 }; | |
164 | |
165 // Very first setup | |
166 static void | |
167 setup_chip() | |
168 { | |
169 cli(); | |
170 | |
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171 // set to 8 seconds, in case sha1 is slow etc. |
1 | 172 wdt_enable(WDTO_8S); |
173 | |
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174 // Set scaler to /1, -> clock to 8mhz |
0 | 175 CLKPR = _BV(CLKPCE); |
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176 CLKPR = 0; |
0 | 177 |
178 // enable pullups | |
1 | 179 // XXX matt pihelp |
5 | 180 //PORTB = 0xff; // XXX change when using SPI |
181 //PORTD = 0xff; | |
182 //PORTC = 0xff; | |
0 | 183 |
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184 DDR_PI_WARNING |= _BV(PIN_PI_WARNING); |
0 | 185 |
41 | 186 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
187 | |
5 | 188 #if 0 |
0 | 189 // set pullup |
190 PORTD |= _BV(PD2); | |
191 // INT0 setup | |
192 EICRA = (1<<ISC01); // falling edge - data sheet says it won't work? | |
193 EIMSK = _BV(INT0); | |
5 | 194 #endif |
0 | 195 |
196 // comparator disable | |
197 ACSR = _BV(ACD); | |
198 | |
199 // disable adc pin input buffers | |
200 DIDR0 = 0x3F; // acd0-adc5 | |
201 DIDR1 = (1<<AIN1D)|(1<<AIN0D); // ain0/ain1 | |
202 | |
203 sei(); | |
204 } | |
205 | |
206 static void | |
207 get_epoch_ticks(struct epoch_ticks *t) | |
208 { | |
209 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
210 { | |
211 t->ticks = clock_epoch; | |
7 | 212 t->rem = TCNT1; |
0 | 213 } |
214 } | |
215 | |
216 static void | |
217 setup_tick_counter() | |
218 { | |
2 | 219 // set up counter1 |
220 | |
0 | 221 // set up counter2. |
222 // COM21 COM20 Set OC2 on Compare Match (p116) | |
223 // WGM21 Clear counter on compare | |
224 //TCCR2A = _BV(COM2A1) | _BV(COM2A0) | _BV(WGM21); | |
225 // toggle on match | |
2 | 226 TCCR1A = _BV(COM1A0); |
8 | 227 #ifdef SIM_DEBUG |
228 // systemclock/8 | |
229 TCCR1B = _BV(CS11); | |
230 #else | |
20 | 231 // systemclock/256 |
232 TCCR1B = _BV(CS12); | |
8 | 233 #endif |
2 | 234 TCNT1 = 0; |
235 OCR1A = SLEEP_COMPARE; | |
0 | 236 // interrupt |
2 | 237 TIMSK1 = _BV(OCIE1A); |
0 | 238 } |
239 | |
240 static void | |
241 uart_on() | |
242 { | |
243 // Power reduction register | |
244 PRR &= ~_BV(PRUSART0); | |
245 | |
246 // All of this needs to be done each time after turning off the PRR | |
247 // baud rate | |
248 UBRR0H = (unsigned char)(UBRR >> 8); | |
249 UBRR0L = (unsigned char)UBRR; | |
250 UCSR0B = _BV(RXCIE0) | _BV(RXEN0) | _BV(TXEN0); | |
251 //8N1 | |
252 UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); | |
253 } | |
254 | |
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255 #ifdef SIM_DEBUG |
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256 static char sim_out[140]; |
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257 static uint8_t sim_idx = 0; |
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258 static uint8_t last_sim_idx = 0; |
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259 #endif |
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260 |
0 | 261 int |
262 uart_putchar(char c, FILE *stream) | |
263 { | |
264 // XXX could perhaps sleep in the loop for power. | |
265 if (c == '\n') | |
266 { | |
267 loop_until_bit_is_set(UCSR0A, UDRE0); | |
268 UDR0 = '\r'; | |
269 } | |
270 loop_until_bit_is_set(UCSR0A, UDRE0); | |
271 UDR0 = c; | |
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272 #ifdef SIM_DEBUG |
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273 sim_out[sim_idx] = c; |
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274 sim_idx++; |
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275 sim_idx %= sizeof(sim_out); |
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276 #endif |
0 | 277 if (c == '\r') |
278 { | |
279 loop_until_bit_is_set(UCSR0A, UDRE0); | |
280 UDR0 = '\n'; | |
281 } | |
282 return (unsigned char)c; | |
283 } | |
284 | |
45 | 285 #if 0 |
286 | |
43 | 287 uint8_t find_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name, struct fat_dir_entry_struct* dir_entry) |
288 { | |
289 while(fat_read_dir(dd, dir_entry)) | |
290 { | |
291 if(strcmp(dir_entry->long_name, name) == 0) | |
292 { | |
293 fat_reset_dir(dd); | |
294 return 1; | |
295 } | |
296 } | |
297 | |
298 return 0; | |
299 } | |
300 | |
301 struct fat_file_struct* | |
302 open_file_in_dir(struct fat_fs_struct* fs, struct fat_dir_struct* dd, const char* name) | |
303 { | |
304 struct fat_dir_entry_struct file_entry; | |
305 if(!find_file_in_dir(fs, dd, name, &file_entry)) | |
306 return 0; | |
307 | |
308 return fat_open_file(fs, &file_entry); | |
309 } | |
310 | |
311 static uint32_t sd_serial = 0; | |
312 static char conf_start[30]; | |
313 | |
314 static void | |
315 hmac_file(const char* fn) | |
316 { | |
317 uint8_t res; | |
318 | |
319 struct sd_raw_info disk_info; | |
320 sd_raw_get_info(&disk_info); | |
321 sd_serial = disk_info.serial; | |
322 printf_P(PSTR("serial %lx\n"), sd_serial); | |
323 | |
324 struct partition_struct* partition = partition_open(sd_raw_read, sd_raw_read_interval, sd_raw_write, sd_raw_write_interval, 1); | |
325 | |
326 if (!partition) | |
327 { | |
328 sprintf(conf_start, "part"); | |
329 return; | |
330 } | |
331 | |
332 struct fat_fs_struct* fs = fat_open(partition); | |
333 if (!fs) | |
334 { | |
335 sprintf(conf_start, "bad fs"); | |
336 return; | |
337 } | |
338 struct fat_dir_entry_struct directory; | |
339 res = fat_get_dir_entry_of_path(fs, "/", &directory); | |
340 if (!res) | |
341 { | |
342 sprintf(conf_start, "bad direc"); | |
343 return; | |
344 } | |
345 | |
346 struct fat_dir_struct* dd = fat_open_dir(fs, &directory); | |
347 if (!dd) | |
348 { | |
349 sprintf(conf_start, "bad dd"); | |
350 return; | |
351 } | |
352 struct fat_file_struct* fd = open_file_in_dir(fs, dd, fn); | |
353 if (!fd) | |
354 { | |
355 sprintf(conf_start, "bad fd"); | |
356 return; | |
357 } | |
358 | |
359 fat_read_file(fd, (uint8_t*)conf_start, sizeof(conf_start)-1); | |
360 conf_start[sizeof(conf_start)-1] = '\0'; | |
361 | |
362 fat_close_file(fd); | |
363 fd = NULL; | |
364 fat_close_dir(dd); | |
365 dd = NULL; | |
366 fat_close(fs); | |
367 fs = NULL; | |
368 partition_close(partition); | |
369 partition = NULL; | |
370 | |
371 #if 0 | |
372 char c = 0; | |
373 char buf[512]; | |
374 for (int i = 0; i < 10; i++) | |
375 { | |
376 fat_read_file(fd, buf, sizeof(buf)); | |
377 c ^= buf[0]; | |
378 } | |
379 printf("total %d\n", c); | |
380 #endif | |
381 } | |
382 | |
383 | |
384 static void | |
385 cmd_testsd(const char *param) | |
386 { | |
45 | 387 boot_id_set = 0; |
43 | 388 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
389 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
390 long_delay(200); | |
391 | |
392 printf_P(PSTR("about to raw init\n")); | |
393 | |
394 sd_raw_init(); | |
395 printf_P(PSTR("done raw init\n")); | |
396 hmac_file(param); | |
397 printf_P(PSTR("conf_start '%s'\n"), conf_start); | |
398 sd_raw_deinit(); | |
399 | |
400 long_delay(200); | |
401 | |
402 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); | |
403 } | |
45 | 404 #endif |
43 | 405 |
20 | 406 static void cmd_reset() __attribute__ ((noreturn)); |
0 | 407 static void |
20 | 408 cmd_reset() |
0 | 409 { |
410 printf_P(PSTR("reset\n")); | |
45 | 411 long_delay(100); |
0 | 412 cli(); // disable interrupts |
413 wdt_enable(WDTO_15MS); // enable watchdog | |
414 while(1); // wait for watchdog to reset processor | |
415 } | |
416 | |
2 | 417 static void |
418 cmd_newboot() | |
419 { | |
420 set_pi_boot_normal(1); | |
421 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
422 { | |
423 newboot_count = newboot_limit; | |
424 } | |
20 | 425 printf_P(PSTR("newboot for %d secs\n"), newboot_limit); |
2 | 426 } |
427 | |
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428 static void |
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429 cmd_oldboot() |
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430 { |
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431 set_pi_boot_normal(0); |
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432 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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433 { |
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434 newboot_count = 0; |
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435 } |
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436 printf_P(PSTR("back to old boot\n")); |
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437 } |
1 | 438 |
0 | 439 |
440 static void | |
20 | 441 cmd_status() |
0 | 442 { |
2 | 443 uint32_t cur_watchdog_long, cur_watchdog_short, cur_newboot, cur_oneshot; |
20 | 444 struct epoch_ticks t; |
445 | |
446 get_epoch_ticks(&t); | |
447 | |
1 | 448 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
449 { | |
2 | 450 cur_watchdog_long = watchdog_long_count; |
451 cur_watchdog_short = watchdog_short_count; | |
452 cur_newboot = newboot_count; | |
453 cur_oneshot = oneshot_count; | |
1 | 454 } |
455 | |
20 | 456 printf_P(PSTR("limit (current)\n" |
457 "watchdog_long %lu (%lu) watchdog newboot mode %d\n" | |
458 "watchdog_short %lu (%lu)\n" | |
459 "newboot %lu (%lu)\n" | |
460 "oneshot (%lu)\n" | |
461 "uptime %lu rem %u\n" | |
22 | 462 "boot normal %hhu\n" |
20 | 463 ), |
464 watchdog_long_limit, cur_watchdog_long, long_reboot_mode, | |
465 watchdog_short_limit, cur_watchdog_short, | |
466 newboot_limit, cur_newboot, | |
467 cur_oneshot, | |
22 | 468 t.ticks, t.rem, |
45 | 469 boot_normal_status); |
0 | 470 } |
471 | |
472 static void | |
1 | 473 cmd_set_params(const char *params) |
0 | 474 { |
1 | 475 uint32_t new_watchdog_long_limit; |
476 uint32_t new_watchdog_short_limit; | |
477 uint32_t new_newboot_limit; | |
478 | |
479 int ret = sscanf_P(params, PSTR("%lu %lu %lu"), | |
480 &new_watchdog_long_limit, | |
481 &new_watchdog_short_limit, | |
482 &new_newboot_limit); | |
483 | |
484 if (ret != 3) | |
0 | 485 { |
1 | 486 printf_P(PSTR("Bad values\n")); |
487 } | |
488 else | |
489 { | |
490 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
491 { | |
492 eeprom_write(new_watchdog_long_limit, watchdog_long_limit); | |
493 eeprom_write(new_watchdog_short_limit, watchdog_short_limit); | |
494 eeprom_write(new_newboot_limit, newboot_limit); | |
495 uint16_t magic = EXPECT_MAGIC; | |
496 eeprom_write(magic, magic); | |
0 | 497 } |
1 | 498 printf_P(PSTR("set_params for next boot\n")); |
499 printf_P(PSTR("watchdog_long %lu watchdog_short %lu newboot %lu\n"), | |
500 new_watchdog_long_limit, | |
501 new_watchdog_short_limit, | |
502 new_newboot_limit); | |
503 } | |
504 } | |
0 | 505 |
35 | 506 // returns 1 if they are equal, timing independent |
507 static uint8_t | |
508 safe_mem_eq(const uint8_t *a, const uint8_t *b, int len) | |
509 { | |
510 uint8_t result = 0; | |
511 for (int i = 0; i < len; i++) | |
512 { | |
513 result |= a[i] ^ b[i]; | |
514 } | |
515 return result == 0; | |
516 } | |
517 | |
518 // returns 1 if they are equal | |
519 static uint8_t | |
520 safe_str_eq(const char *a, const char *b) | |
521 { | |
522 int la = strlen(a); | |
523 if (la != strlen(b)) | |
524 { | |
525 return 0; | |
526 } | |
527 return safe_mem_eq((const uint8_t*)a, (const uint8_t*)b, la); | |
528 } | |
529 | |
1 | 530 uint8_t from_hex(char c) |
531 { | |
532 if (c >= '0' && c <= '9') { | |
533 return c-'0'; | |
534 } | |
535 if (c >= 'a' && c <= 'f') { | |
536 return c-'a' + 0xa; | |
537 } | |
538 if (c >= 'A' && c <= 'F') { | |
539 return c-'A' + 0xa; | |
540 } | |
541 return 0; | |
542 } | |
543 | |
2 | 544 static void |
545 printhex_nibble(const unsigned char b, FILE *stream) | |
546 { | |
547 unsigned char c = b & 0x0f; | |
548 if ( c > 9 ) { | |
549 c += 'A'-10; | |
550 } | |
551 else { | |
552 c += '0'; | |
553 } | |
554 fputc(c, stream); | |
555 } | |
556 | |
557 void | |
558 printhex_byte(const unsigned char b, FILE *stream) | |
559 { | |
560 printhex_nibble( b >> 4, stream); | |
561 printhex_nibble( b, stream); | |
562 } | |
563 | |
564 void | |
565 printhex(uint8_t *id, uint8_t n, FILE *stream) | |
566 { | |
567 for (uint8_t i = 0; i < n; i++) | |
568 { | |
569 printhex_byte(id[i], stream); | |
570 } | |
571 } | |
572 | |
573 static int8_t | |
5 | 574 parse_key(const char *params, uint8_t *key_index, uint8_t *bytes, |
575 uint8_t bytes_len) | |
2 | 576 { |
577 // "N HEXKEY" | |
5 | 578 if (strlen(params) != bytes_len*2 + 2) { |
20 | 579 printf_P(PSTR("Wrong length key. wanted %d, got %d, '%s'\n"), |
580 bytes_len*2+2, strlen(params), params); | |
2 | 581 return -1; |
582 } | |
583 | |
584 if (params[1] != ' ') | |
585 { | |
586 printf_P(PSTR("Missing space\n")); | |
587 return -1; | |
588 } | |
589 | |
590 *key_index = from_hex(params[0]); | |
591 if (*key_index >= NKEYS) | |
592 { | |
593 printf_P(PSTR("Bad key index %d, max %d\n"), *key_index, NKEYS); | |
594 return -1; | |
595 } | |
596 | |
5 | 597 for (int i = 0, p = 0; i < bytes_len; i++, p += 2) |
2 | 598 { |
599 bytes[i] = (from_hex(params[p+2]) << 4) | from_hex(params[p+3]); | |
600 } | |
601 return 0; | |
602 } | |
603 | |
1 | 604 static void |
605 cmd_set_avr_key(const char *params) | |
606 { | |
2 | 607 uint8_t new_key[KEYLEN]; |
608 uint8_t key_index; | |
5 | 609 if (parse_key(params, &key_index, new_key, sizeof(new_key)) != 0) |
2 | 610 { |
1 | 611 return; |
0 | 612 } |
2 | 613 memcpy(avr_keys[key_index], new_key, sizeof(new_key)); |
8 | 614 #ifndef SIM_DEBUG |
2 | 615 eeprom_write(avr_keys, avr_keys); |
8 | 616 #endif |
20 | 617 printf_P(PSTR("Set key %d: "), key_index); |
618 printhex(new_key, sizeof(new_key), stdout); | |
619 putchar('\n'); | |
2 | 620 } |
621 | |
622 static void | |
623 cmd_hmac(const char *params) | |
624 { | |
42
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625 uint8_t indata[HMACLEN]; |
7 | 626 uint8_t outdata[HMACLEN]; |
2 | 627 uint8_t key_index; |
42
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628 if (parse_key(params, &key_index, indata, HMACLEN) != 0) |
2 | 629 { |
630 printf_P(PSTR("FAIL: Bad input\n")); | |
5 | 631 return; |
2 | 632 } |
0 | 633 |
8 | 634 #ifndef SIM_DEBUG |
5 | 635 long_delay(200); |
8 | 636 #endif |
5 | 637 |
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638 hmac_sha1(outdata, avr_keys[key_index], KEYLEN*8, indata, sizeof(indata)*8); |
2 | 639 printf_P(PSTR("HMAC: ")); |
7 | 640 printhex(outdata, HMACLEN, stdout); |
20 | 641 putchar('\n'); |
5 | 642 } |
643 | |
644 static void | |
645 cmd_decrypt(const char *params) | |
646 { | |
42
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647 uint8_t indata[AESLEN]; |
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648 uint8_t output[AESLEN]; |
5 | 649 uint8_t key_index; |
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650 if (parse_key(params, &key_index, indata, sizeof(indata)) != 0) |
5 | 651 { |
652 printf_P(PSTR("FAIL: Bad input\n")); | |
653 return; | |
654 } | |
655 | |
8 | 656 #ifndef SIM_DEBUG |
5 | 657 long_delay(200); |
8 | 658 #endif |
7 | 659 |
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660 uint8_t tmpbuf[256]; |
27 | 661 aesInit(avr_keys[key_index], tmpbuf); |
42
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662 aesDecrypt(indata, NULL); |
5 | 663 |
664 printf_P(PSTR("DECRYPTED: ")); | |
665 printhex(output, AESLEN, stdout); | |
20 | 666 putchar('\n'); |
2 | 667 } |
668 | |
669 static void | |
670 cmd_oneshot_reboot(const char *params) | |
671 { | |
672 uint32_t new_delay = strtoul(params, NULL, 10); | |
673 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
1 | 674 { |
2 | 675 oneshot_count = new_delay; |
1 | 676 } |
15
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677 printf_P(PSTR("oneshot new delay %lu\n"), new_delay); |
0 | 678 } |
679 | |
680 static void | |
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681 clamp_params() |
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682 { |
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683 if (watchdog_long_limit < WATCHDOG_LONG_MIN |
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684 || watchdog_long_limit > WATCHDOG_LONG_MAX) |
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685 { |
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686 watchdog_long_limit = WATCHDOG_LONG_DEFAULT; |
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687 } |
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688 |
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689 if (watchdog_short_limit != 0 |
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690 && watchdog_short_limit < WATCHDOG_SHORT_MIN) |
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691 { |
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692 watchdog_short_limit = 0; |
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693 } |
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694 |
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695 if (newboot_limit < NEWBOOT_MIN || newboot_limit > NEWBOOT_MAX) |
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696 { |
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697 newboot_limit = NEWBOOT_DEFAULT; |
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698 } |
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699 } |
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700 |
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701 static void |
0 | 702 load_params() |
703 { | |
704 uint16_t magic; | |
705 eeprom_read(magic, magic); | |
706 if (magic == EXPECT_MAGIC) | |
707 { | |
1 | 708 eeprom_read(watchdog_long_limit, watchdog_long_limit); |
709 eeprom_read(watchdog_short_limit, watchdog_short_limit); | |
2 | 710 eeprom_read(newboot_limit, newboot_limit); |
1 | 711 } |
2 | 712 |
18
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713 clamp_params(); |
16 | 714 |
2 | 715 eeprom_read(avr_keys, avr_keys); |
0 | 716 } |
717 | |
2 | 718 static void |
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719 cmd_alive() |
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720 { |
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721 printf_P(PSTR("Ah, good.\n")); |
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722 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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723 { |
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724 watchdog_long_count = 0; |
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725 watchdog_short_count = 0; |
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726 } |
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727 long_reboot_mode = 0; |
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728 } |
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729 |
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730 static void |
35 | 731 cmd_poke() |
732 { | |
733 printf_P(PSTR("Ah, good.\n")); | |
734 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
735 { | |
736 watchdog_short_count = 0; | |
737 } | |
738 } | |
739 | |
740 static void | |
2 | 741 cmd_vcc() |
0 | 742 { |
2 | 743 uint16_t vcc = adc_vcc(); |
18
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744 uint16_t v5 = adc_5v(vcc); |
21 | 745 uint16_t temp = adc_temp(); |
746 // roughly? | |
747 uint16_t temp_deg = temp - 290; | |
748 printf_P(PSTR("vcc: %u mV\n" | |
749 "5v: %u mV\n" | |
26 | 750 "temp: %u mV (%dºC)\n" |
751 ), | |
27 | 752 vcc, v5, temp, temp_deg); |
0 | 753 } |
754 | |
45 | 755 static void |
756 get_random(uint8_t *out) | |
757 { | |
758 uint32_t tries; | |
759 uint8_t rnd[20]; | |
760 adc_random(0x44, rnd, sizeof(rnd), &tries); | |
761 hmac_sha1(out, buildid, sizeof(buildid)*8, rnd, sizeof(rnd)*8); | |
762 } | |
763 | |
764 static void | |
765 cmd_bootid(const char *arg) | |
766 { | |
767 uint8_t hmac[HMACLEN]; | |
768 uint8_t input[CHALLEN+sizeof(boot_id)]; | |
769 | |
770 if (strlen(arg) != CHALLEN*2) | |
771 { | |
772 printf_P(PSTR("Bad challenge\n")); | |
773 } | |
774 for (int i = 0, p = 0; i < CHALLEN; i++, p += 2) | |
775 { | |
776 input[i] = (from_hex(arg[p]) << 4) | from_hex(arg[p+1]); | |
777 } | |
778 memcpy(&input[CHALLEN], boot_id, sizeof(boot_id)); | |
779 | |
780 if (!boot_id_set) | |
781 { | |
782 _Static_assert(sizeof(boot_id) == HMACLEN, "boot_id size correct"); | |
783 get_random(boot_id); | |
784 boot_id_set = 1; | |
785 } | |
786 hmac_sha1(hmac, avr_keys[0], KEYLEN*8, input, sizeof(input)*8); | |
787 printf_P(PSTR("bootid: ")); | |
788 printhex(boot_id, sizeof(boot_id), stdout); | |
789 putchar(' '); | |
790 printhex(hmac, sizeof(hmac), stdout); | |
791 putchar('\n'); | |
792 } | |
20 | 793 |
27 | 794 void(*bootloader)() __attribute__ ((noreturn)) = (void*)0x7800; |
795 | |
20 | 796 #ifndef PROG_PASSWORD |
797 #define PROG_PASSWORD "Y2vvjxO5" | |
798 #endif | |
799 | |
800 static void | |
801 cmd_prog(const char* arg) | |
802 { | |
36 | 803 if (!safe_str_eq(arg, PROG_PASSWORD)) |
20 | 804 { |
805 printf_P(PSTR("Bad prog password\n")); | |
806 return; | |
807 } | |
808 | |
36 | 809 printf_P(PSTR("Programming...\n")); |
810 long_delay(100); | |
811 | |
20 | 812 // disable wdt |
813 wdt_disable(); | |
41 | 814 MCUSR = 0; |
20 | 815 |
816 // disable interrupts | |
817 TIMSK0 = 0; | |
818 TIMSK1 = 0; | |
819 TIMSK2 = 0; | |
820 EIMSK = 0; | |
821 PCMSK0 = 0; | |
822 PCMSK1 = 0; | |
823 PCMSK2 = 0; | |
824 ACSR &= ~_BV(ACIE); | |
825 ADCSRA &= ~_BV(ADIE); | |
826 UCSR0B &= ~_BV(RXCIE0); | |
827 UCSR0B &= _BV(TXCIE0); | |
828 // doesn't do TWI, other uart, probably others | |
829 | |
830 _delay_ms(20); | |
831 | |
832 bootloader(); | |
833 } | |
27 | 834 |
835 | |
836 static void | |
837 adc_sleep() | |
838 { | |
839 set_sleep_mode(SLEEP_MODE_IDLE); | |
840 sleep_mode(); | |
841 } | |
842 | |
843 #define BITSET(v, n) (((v) >> (n)) & 1) | |
844 | |
845 static inline uint8_t | |
846 popcnt(uint8_t v) | |
847 { | |
848 return BITSET(v, 0) | |
849 + BITSET(v, 1) | |
850 + BITSET(v, 2) | |
851 + BITSET(v, 3) | |
852 + BITSET(v, 4) | |
853 + BITSET(v, 5) | |
854 + BITSET(v, 6) | |
855 + BITSET(v, 7); | |
856 } | |
857 | |
858 static uint8_t | |
859 adc_bit() | |
860 { | |
861 ADCSRA |= _BV(ADSC); | |
862 loop_until_bit_is_clear(ADCSRA, ADSC); | |
863 uint8_t low = ADCL; | |
864 uint8_t high = ADCH; | |
35 | 865 uint8_t ret = (popcnt(low)&1) ^ (popcnt(high)&1); |
866 return ret; | |
27 | 867 } |
868 | |
869 static void | |
870 adc_random(uint8_t admux, | |
871 uint8_t *out, uint16_t num, uint32_t *tries) | |
872 { | |
873 PRR &= ~_BV(PRADC); | |
874 // /16 prescaler for 691mhz, no interrupt | |
875 ADCSRA = _BV(ADEN) | _BV(ADPS2); | |
876 | |
35 | 877 ADMUX = admux; |
878 | |
27 | 879 *tries = 0; |
880 for (int i = 0; i < num; i++) | |
881 { | |
35 | 882 uint8_t ret = 0; |
883 uint8_t count = 0; | |
884 | |
27 | 885 while (count <= 7) |
886 { | |
887 (*tries)++; | |
888 | |
889 // Von Neumann extractor | |
890 uint8_t one = adc_bit(); | |
891 uint8_t two = adc_bit(); | |
892 if (one == two) | |
893 { | |
894 continue; | |
895 } | |
896 ret |= one << count; | |
897 count++; | |
898 } | |
899 out[i] = ret; | |
900 } | |
901 ADCSRA = 0; | |
902 PRR |= _BV(PRADC); | |
903 } | |
904 | |
905 ISR(ADC_vect) | |
906 { | |
907 adc_done = 1; | |
908 } | |
909 | |
910 static void | |
911 adc_generic(uint8_t admux, uint8_t *ret_num, uint16_t *ret_sum) | |
912 { | |
913 PRR &= ~_BV(PRADC); | |
914 | |
31 | 915 // /128 prescaler (86kHz), interrupt |
916 ADCSRA = _BV(ADEN) | |
917 | _BV(ADPS2) | _BV(ADPS1) | _BV(ADPS0) | |
918 | _BV(ADIE); | |
27 | 919 |
920 // set to measure 1.1 reference | |
921 ADMUX = admux; | |
922 | |
923 // delay after setting reference etc, allow settling | |
924 long_delay(300); | |
925 // average a number of samples | |
926 uint16_t sum = 0; | |
927 uint8_t num = 0; | |
928 for (uint8_t n = 0; n < 20; n++) | |
929 { | |
930 while (1) | |
931 { | |
932 adc_done = 0; | |
933 ADCSRA |= _BV(ADSC); | |
934 adc_sleep(); | |
935 | |
936 uint8_t done; | |
937 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) | |
938 { | |
939 done = adc_done; | |
940 } | |
941 if (done) | |
942 { | |
943 break; | |
944 } | |
945 } | |
946 | |
947 uint8_t low_11 = ADCL; | |
948 uint8_t high_11 = ADCH; | |
949 uint16_t val = low_11 + (high_11 << 8); | |
950 | |
951 if (n >= 4) | |
952 { | |
953 sum += val; | |
954 num++; | |
955 } | |
956 } | |
957 ADCSRA = 0; | |
958 PRR |= _BV(PRADC); | |
959 | |
960 *ret_num = num; | |
961 *ret_sum = sum; | |
962 } | |
963 | |
964 static uint16_t | |
965 adc_vcc() | |
966 { | |
967 const uint8_t mux = _BV(REFS0) | _BV(MUX3) | _BV(MUX2) | _BV(MUX1); | |
968 uint16_t sum; | |
969 uint8_t num; | |
970 | |
971 adc_generic(mux, &num, &sum); | |
972 | |
973 //float res_volts = 1.1 * 1024 * num / sum; | |
974 //return 1000 * res_volts; | |
975 return ((uint32_t)1100*1024*num) / sum; | |
976 } | |
977 | |
978 #define SCALER_5V 2 | |
979 | |
980 static uint16_t | |
981 adc_5v(uint16_t vcc) | |
982 { | |
983 // set to measure ADC4 against AVCC | |
984 const uint8_t mux = _BV(REFS0) | _BV(MUX2); | |
985 uint16_t sum; | |
986 uint8_t num; | |
987 | |
988 adc_generic(mux, &num, &sum); | |
989 | |
990 return ((uint32_t)vcc*sum*SCALER_5V/(num*1024)); | |
991 } | |
992 | |
993 static uint16_t | |
994 adc_temp() | |
995 { | |
996 // set to measure temperature against 1.1v reference. | |
997 const uint8_t mux = _BV(REFS0) | _BV(REFS1) | _BV(MUX3); | |
998 uint16_t sum; | |
999 uint8_t num; | |
1000 | |
1001 adc_generic(mux, &num, &sum); | |
1002 | |
1003 // return the voltage | |
1004 | |
1005 return ((uint32_t)1100*sum) / (num*1024); | |
1006 } | |
1007 | |
1008 static void | |
1009 cmd_random(const char* params) | |
1010 { | |
1011 uint8_t admux; | |
1012 uint16_t num; | |
1013 uint8_t buf[100]; | |
1014 | |
1015 int ret = sscanf_P(params, PSTR("%hhu %u"), | |
1016 &admux, &num); | |
1017 if (!ret) | |
1018 { | |
1019 printf_P(PSTR("Bad arguments\n")); | |
1020 return; | |
1021 } | |
1022 uint32_t tries = 0; | |
1023 printf_P(PSTR("output: ")); | |
1024 for (int i = 0; i < num; i+= sizeof(buf)) | |
1025 { | |
1026 uint32_t t; | |
1027 uint16_t nr = MIN(num-i, sizeof(buf)); | |
1028 adc_random(admux, buf, nr, &t); | |
1029 printhex(buf, nr, stdout); | |
1030 tries += t; | |
1031 } | |
1032 putchar('\n'); | |
1033 printf_P(PSTR("%ld tries\n"), tries); | |
1034 } | |
1035 | |
1036 | |
20 | 1037 |
0 | 1038 static void |
1039 read_handler() | |
1040 { | |
17 | 1041 #define LOCAL_PSTR(x) const static char x ## _str[] PROGMEM = #x; |
1042 #define LOCAL_HELP(x, d) const static char x ## _help[] PROGMEM = d; | |
1043 | |
1044 LOCAL_PSTR(set_params); | |
1045 LOCAL_PSTR(set_key); | |
1046 LOCAL_PSTR(oneshot); | |
1047 LOCAL_PSTR(hmac); | |
1048 LOCAL_PSTR(decrypt); | |
1049 LOCAL_PSTR(alive); | |
35 | 1050 LOCAL_PSTR(poke); |
17 | 1051 LOCAL_PSTR(vcc); |
1052 LOCAL_PSTR(reset); | |
1053 LOCAL_PSTR(newboot); | |
1054 LOCAL_PSTR(oldboot); | |
20 | 1055 LOCAL_PSTR(status); |
27 | 1056 LOCAL_PSTR(random); |
1057 LOCAL_PSTR(prog); | |
45 | 1058 LOCAL_PSTR(bootid); |
17 | 1059 LOCAL_HELP(set_params, "<long_limit> <short_limit> <newboot_limit>"); |
1060 LOCAL_HELP(set_key, "20_byte_hex>"); | |
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1061 LOCAL_HELP(oneshot, "<timeout>"); |
27 | 1062 LOCAL_HELP(prog, "<password>"); |
1063 LOCAL_HELP(random, "<admux> <nbytes>"); | |
17 | 1064 LOCAL_HELP(hmac, "<key_index> <20_byte_hex_data>"); |
1065 LOCAL_HELP(decrypt, "<key_index> <20_byte_hmac|16_byte_aes_block>"); | |
45 | 1066 LOCAL_HELP(bootid, "<8_byte_challenge>") |
17 | 1067 |
1068 static const struct handler { | |
1069 PGM_P name; | |
1070 void(*cmd)(const char *param); | |
1071 // existence of arg_help indicates if the cmd takes a parameter. | |
1072 PGM_P arg_help; | |
20 | 1073 } handlers[] PROGMEM = |
17 | 1074 { |
20 | 1075 {alive_str, cmd_alive, NULL}, |
35 | 1076 {poke_str, cmd_poke, NULL}, |
20 | 1077 {newboot_str, cmd_newboot, NULL}, |
1078 {oldboot_str, cmd_oldboot, NULL}, | |
1079 {oneshot_str, cmd_oneshot_reboot, oneshot_help}, | |
1080 {status_str, cmd_status, NULL}, | |
1081 {hmac_str, cmd_hmac, hmac_help}, | |
1082 {decrypt_str, cmd_decrypt, decrypt_help}, | |
17 | 1083 {set_params_str, cmd_set_params, set_params_help}, |
1084 {set_key_str, cmd_set_avr_key, set_key_help}, | |
27 | 1085 {random_str, cmd_random, random_help}, |
17 | 1086 {vcc_str, cmd_vcc, NULL}, |
1087 {reset_str, cmd_reset, NULL}, | |
27 | 1088 {prog_str, cmd_prog, prog_help}, |
45 | 1089 {bootid_str, cmd_bootid, bootid_help}, |
17 | 1090 }; |
1091 | |
1092 if (readbuf[0] == '\0') | |
1093 { | |
1094 return; | |
1095 } | |
1096 | |
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1097 if (strcmp_P(readbuf, PSTR("help")) == 0) |
17 | 1098 { |
1099 printf_P(PSTR("Commands:---\n")); | |
1100 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
1101 { | |
1102 struct handler h; | |
1103 memcpy_P(&h, &handlers[i], sizeof(h)); | |
1104 printf_P(h.name); | |
1105 if (h.arg_help) | |
1106 { | |
1107 putchar(' '); | |
1108 printf_P(h.arg_help); | |
1109 } | |
1110 putchar('\n'); | |
1111 }; | |
1112 printf_P(PSTR("---\n")); | |
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1113 return; |
17 | 1114 } |
1115 | |
1116 for (int i = 0; i < sizeof(handlers) / sizeof(handlers[0]); i++) | |
1117 { | |
1118 struct handler h; | |
1119 memcpy_P(&h, &handlers[i], sizeof(h)); | |
1120 | |
1121 const int h_len = strlen_P(h.name); | |
1122 if (strncmp_P(readbuf, h.name, h_len) == 0) | |
1123 { | |
1124 if (h.arg_help) | |
1125 { | |
1126 if (readbuf[h_len] == ' ') | |
1127 { | |
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1128 h.cmd(&readbuf[h_len+1]); |
17 | 1129 return; |
1130 } | |
1131 } | |
1132 else | |
1133 { | |
1134 if (readbuf[h_len] == '\0') | |
1135 { | |
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1136 void(*void_cmd)() = h.cmd; |
17 | 1137 void_cmd(); |
1138 return; | |
1139 } | |
1140 } | |
1141 } | |
1142 } | |
1143 | |
1144 printf_P(PSTR("Bad command '%s'\n"), readbuf); | |
0 | 1145 } |
1146 | |
1147 ISR(INT0_vect) | |
1148 { | |
1149 blink(); | |
45 | 1150 long_delay(100); |
0 | 1151 blink(); |
1152 } | |
1153 | |
1154 ISR(USART_RX_vect) | |
1155 { | |
1156 char c = UDR0; | |
1157 #ifdef HAVE_UART_ECHO | |
1158 uart_putchar(c, NULL); | |
1159 #endif | |
1160 if (c == '\r' || c == '\n') | |
1161 { | |
1162 if (readpos > 0) | |
1163 { | |
1164 readbuf[readpos] = '\0'; | |
1165 have_cmd = 1; | |
1166 readpos = 0; | |
1167 } | |
1168 } | |
1169 else | |
1170 { | |
1171 readbuf[readpos] = c; | |
1172 readpos++; | |
1173 if (readpos >= sizeof(readbuf)) | |
1174 { | |
1175 readpos = 0; | |
1176 } | |
1177 } | |
1178 } | |
1179 | |
2 | 1180 ISR(TIMER1_COMPA_vect) |
0 | 1181 { |
2 | 1182 TCNT1 = 0; |
0 | 1183 |
1184 clock_epoch += TICK; | |
1185 | |
1 | 1186 // watchdogs count up, continuous |
1187 if (watchdog_long_limit > 0) { | |
2 | 1188 watchdog_long_count += TICK; |
1 | 1189 if (watchdog_long_count >= watchdog_long_limit) |
1190 { | |
1191 watchdog_long_count = 0; | |
1192 watchdog_long_hit = 1; | |
1193 } | |
0 | 1194 } |
1195 | |
1 | 1196 if (watchdog_short_limit > 0) { |
2 | 1197 watchdog_short_count += TICK; |
1 | 1198 if (watchdog_short_count >= watchdog_short_limit) |
1199 { | |
1200 watchdog_short_count = 0; | |
1201 watchdog_short_hit = 1; | |
1202 } | |
0 | 1203 } |
1204 | |
2 | 1205 // newboot counts down |
1 | 1206 if (newboot_count > 0) |
0 | 1207 { |
2 | 1208 newboot_count-=TICK; |
1209 if (newboot_count <= 0) | |
1 | 1210 { |
1211 newboot_hit = 1; | |
2 | 1212 newboot_count = 0; |
1 | 1213 } |
0 | 1214 } |
1 | 1215 |
2 | 1216 if (oneshot_count > 0) |
1217 { | |
1218 oneshot_count-=TICK; | |
1219 if (oneshot_count <= 0) | |
1220 { | |
1221 oneshot_hit = 1; | |
1222 oneshot_count = 0; | |
1223 } | |
1224 } | |
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1225 |
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1226 if (reboot_count > 0) |
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1227 { |
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1228 reboot_count -= TICK; |
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1229 if (reboot_count <= 0) |
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1230 { |
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1231 reboot_hit = 1; |
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1232 reboot_count = 0; |
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1233 } |
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1234 } |
0 | 1235 } |
1236 | |
1237 static void | |
1238 idle_sleep() | |
1239 { | |
1240 set_sleep_mode(SLEEP_MODE_IDLE); | |
1241 sleep_mode(); | |
1242 } | |
1243 | |
21 | 1244 static void |
2 | 1245 reboot_pi() |
1246 { | |
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1247 printf_P(PSTR("Real reboot now\n")); |
45 | 1248 boot_id_set = 0; |
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1249 // pull it low for 200ms |
2 | 1250 PORT_PI_RESET &= ~_BV(PIN_PI_RESET); |
1251 DDR_PI_RESET |= _BV(PIN_PI_RESET); | |
45 | 1252 long_delay(200); |
18
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1253 |
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1254 PORT_PI_WARNING &= ~_BV(PIN_PI_WARNING); |
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1255 DDR_PI_RESET &= ~_BV(PIN_PI_RESET); |
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1256 } |
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1257 |
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1258 static void |
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1259 wait_reboot_pi() |
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1260 { |
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1261 PORT_PI_WARNING |= _BV(PIN_PI_WARNING); |
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1262 ATOMIC_BLOCK(ATOMIC_RESTORESTATE) |
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1263 { |
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1264 reboot_count = WARNING_TIME; |
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1265 } |
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1266 printf_P(PSTR("Rebooting in %hhu seconds\n"), reboot_count); |
2 | 1267 } |
1268 | |
1269 static void | |
1270 set_pi_boot_normal(uint8_t normal) | |
1271 { | |
22 | 1272 boot_normal_status = normal; |
2 | 1273 PORT_PI_BOOT &= ~_BV(PIN_PI_BOOT); |
1274 if (normal) | |
1275 { | |
1276 // tristate | |
1277 DDR_PI_BOOT &= ~_BV(PIN_PI_BOOT); | |
1278 } | |
1279 else | |
1280 { | |
1281 // pull it low | |
1282 DDR_PI_RESET |= _BV(PIN_PI_BOOT); | |
1283 } | |
1284 } | |
1285 | |
1286 static void | |
1287 check_flags() | |
1288 { | |
15
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1289 if (watchdog_long_hit) |
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1290 { |
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1291 // alternate between booting normal and emergency |
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1292 if (long_reboot_mode) |
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1293 { |
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1294 cmd_newboot(); |
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1295 } |
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1296 long_reboot_mode ^= 1; |
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1297 } |
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1298 |
2 | 1299 if (watchdog_long_hit |
1300 || watchdog_short_hit | |
1301 || oneshot_hit) | |
1302 { | |
12 | 1303 printf_P(PSTR("Rebooting! long %d, short %d, oneshot %d\n"), |
1304 watchdog_long_hit, watchdog_short_hit, oneshot_hit); | |
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1305 wait_reboot_pi(); |
2 | 1306 } |
1307 | |
1308 if (newboot_hit) { | |
1309 set_pi_boot_normal(0); | |
1310 } | |
1311 | |
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1312 if (reboot_hit) { |
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1313 reboot_pi(); |
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1314 } |
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1315 |
2 | 1316 watchdog_long_hit = 0; |
1317 watchdog_short_hit = 0; | |
1318 newboot_hit = 0; | |
1319 oneshot_hit = 0; | |
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1320 reboot_hit = 0; |
2 | 1321 } |
1322 | |
1323 static void | |
0 | 1324 do_comms() |
1325 { | |
1326 // avoid receiving rubbish, perhaps | |
1327 uart_on(); | |
1328 | |
1329 // write sd card here? same 3.3v regulator... | |
1330 | |
1 | 1331 while (1) |
0 | 1332 { |
1 | 1333 wdt_reset(); |
2 | 1334 |
18
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1335 #ifdef SIM_DEBUG |
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1336 if (sim_idx != last_sim_idx) |
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1337 { |
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1338 last_sim_idx = sim_idx; |
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1339 } |
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1340 #endif |
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1341 |
2 | 1342 check_flags(); |
1343 | |
0 | 1344 if (have_cmd) |
1345 { | |
1346 have_cmd = 0; | |
1347 read_handler(); | |
1348 continue; | |
1349 } | |
1350 | |
1351 // wait for commands from the master | |
1352 idle_sleep(); | |
1353 } | |
1354 } | |
1355 | |
1356 static void | |
1357 blink() | |
1358 { | |
18
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changeset
|
1359 #if 0 |
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1360 PORT_ &= ~_BV(PIN_LED); |
0 | 1361 _delay_ms(1); |
1362 PORT_LED |= _BV(PIN_LED); | |
18
021e6e0006f4
debug printing, 5v adc, fixes
Matt Johnston <matt@ucc.asn.au>
parents:
17
diff
changeset
|
1363 #endif |
0 | 1364 } |
1365 | |
1366 static void | |
22 | 1367 long_delay(uint16_t ms) |
0 | 1368 { |
22 | 1369 uint16_t iter = ms / 10; |
0 | 1370 |
22 | 1371 for (uint16_t i = 0; i < iter; i++) |
0 | 1372 { |
22 | 1373 _delay_ms(10); |
0 | 1374 } |
1375 } | |
1376 | |
1377 ISR(BADISR_vect) | |
1378 { | |
1379 //uart_on(); | |
1380 printf_P(PSTR("Bad interrupt\n")); | |
1381 } | |
1382 | |
20 | 1383 // disable watchdog on boot |
1384 void wdt_init(void) __attribute__((naked)) __attribute__((section(".init3"))); | |
1385 void wdt_init(void) | |
1386 { | |
1387 MCUSR = 0; | |
1388 wdt_disable(); | |
1389 } | |
1390 | |
0 | 1391 int main(void) |
1392 { | |
17 | 1393 _Static_assert(F_CPU % 256 == 0, "clock prescaler remainder 0"); |
1394 _Static_assert(NEWBOOT_MAX < WATCHDOG_LONG_MIN, "newboot max shorter than watchdog min"); | |
20 | 1395 _Static_assert((F_CPU)%(16*(BAUD)) == 0, "baud rate good multiple"); |
15
915be6f0ff13
fix for 8mhz, add flip/flop long watchdog
Matt Johnston <matt@ucc.asn.au>
parents:
12
diff
changeset
|
1396 |
0 | 1397 setup_chip(); |
1398 blink(); | |
1399 | |
1400 stdout = &mystdout; | |
1401 uart_on(); | |
1402 | |
20 | 1403 long_delay(500); |
1404 printf_P(PSTR("Pi Watchdog\nMatt Johnston [email protected]\n")); | |
0 | 1405 |
2 | 1406 set_pi_boot_normal(0); |
1407 | |
0 | 1408 load_params(); |
1409 | |
1410 setup_tick_counter(); | |
1411 | |
1412 sei(); | |
1413 | |
8 | 1414 #if 0 |
1415 // encryption test | |
1416 cmd_set_avr_key("1 6161626263636464656566666767686800000000"); | |
1417 cmd_set_avr_key("2 7979757569696f6f646465656666717164646969"); | |
12 | 1418 //cmd_decrypt("1 ecd858ee07a8e16575723513d2d072a7565865e40ba302059bfc650d4491268448102119"); |
1419 cmd_decrypt("1 5a587b50fd48688bbda1b510cf9a3fab6fd4737b" "0ba302059bfc650d4491268448102119"); | |
1420 cmd_hmac("2 7979757569696f6f646465656666717164646969"); | |
8 | 1421 #endif |
1422 | |
1 | 1423 // doesn't return |
1424 do_comms(); | |
0 | 1425 |
1426 return 0; /* never reached */ | |
1427 } |